demo sample to drive PCU9955 and PCA9629

Dependencies:   mbed I2C_slaves PCU9669 parallel_bus

Fork of mini_board_PCU9669 by InetrfaceProducts NXP

What is this?

This is a sample code to operate PCU9955 (16ch constant-current LED controller) and PCA9629 (intelligent stepper motor controller) through PCU9669 (3 channels (UltraFast mode * 2ch, FastModePlus *1ch) I2C bus controller).

This demo is written based on mini_board_PCU9669 sample code library and its API.
http://mbed.org/users/nxp_ip/code/mini_board_PCU9669/

Demo will shows how the LED controllers and stepper motor controllers works.
It uses a mini_board_PCU9669 board with mbed, 8 of PCU9955s and 5 PCA9629s.

/media/uploads/nxp_ip/dsc_0414ss.png
Demo setup
(left-top: PCU9955 boards, left-bottom: mini-board PCU9669 with mbed, right: PCA9629 x5 board)

/media/uploads/nxp_ip/demo-config-ss.png
Board connections and device addresses

Reference:

User manual of PCU9669 demo board: Mini board PCU9669

http://www.nxp.com/documents/user_manual/UM10580.pdf

sample code : mbed programs

Import programmini_board_PCU9669

mini board PCU9669 (and PCA9665) sample code

Import programPCA9955_Hello

PCA9955 16 channel current drive(sink) LED driver sample code

Import programPCA9955_simple

very simple sample code for PCA9955 (16 channel current control LED driver)

Import programPCA9629_Hello

Sample code for PCA9629 operation

device infomation

PCU9669 (Parallel bus to 1 channel Fm+ and 2 channel UFm I2C-bus controller)
PCU9955 (16-channel UFm I²C-bus 57 mA constant current LED driver)
PCA9955 (16-channel Fm+ I²C-bus 57 mA constant current LED driver)
PCU9629 (Fm+ I2C-bus stepper motor controller)

Committer:
nxp_ip
Date:
Fri Jul 06 08:31:45 2012 +0000
Revision:
14:b2e3797242b6
using lib of "PCU9669_BURST_DATA_ACCESS" fixed version

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nxp_ip 14:b2e3797242b6 1 /** A sample code for "mini board PCU9669/PCA9665"
nxp_ip 14:b2e3797242b6 2 *
nxp_ip 14:b2e3797242b6 3 * @author Akifumi (Tedd) OKANO, NXP Semiconductors
nxp_ip 14:b2e3797242b6 4 * @version 1.0
nxp_ip 14:b2e3797242b6 5 * @date 26-Mar-2012
nxp_ip 14:b2e3797242b6 6 *
nxp_ip 14:b2e3797242b6 7 * Released under the MIT License: http://mbed.org/license/mit
nxp_ip 14:b2e3797242b6 8 *
nxp_ip 14:b2e3797242b6 9 * An operation sample of PCU9669/PCA9665 I2C bus controller.
nxp_ip 14:b2e3797242b6 10 * The mbed accesses the bus controller's parallel port (8/2 bit address and 8 bit data) by bit-banging.
nxp_ip 14:b2e3797242b6 11 * The bit-banging is poerformed by PortInOut function of mbed library.
nxp_ip 14:b2e3797242b6 12 *
nxp_ip 14:b2e3797242b6 13 * To make the code porting easier, all codes are partitioned into layers to abstract other parts.
nxp_ip 14:b2e3797242b6 14 * The mbed specific parts are concentrated in lowest layer: "hardware_abs.*".
nxp_ip 14:b2e3797242b6 15 * This module may need to be modified for the porting.
nxp_ip 14:b2e3797242b6 16 *
nxp_ip 14:b2e3797242b6 17 * All other upper layers are writen in standard-C.
nxp_ip 14:b2e3797242b6 18 *
nxp_ip 14:b2e3797242b6 19 * base code is written from 05-Sep-2011 to 09-Sep-2011.
nxp_ip 14:b2e3797242b6 20 * And demo code has been build on 11-Sep-2011.
nxp_ip 14:b2e3797242b6 21 * Debug and code adjustment has been done on 08-Sep-2011.
nxp_ip 14:b2e3797242b6 22 * Small sanitization for main.cpp. All mbed related codes are moved in to "hardware_abs.*". 13-Oct-2011
nxp_ip 14:b2e3797242b6 23 * hardware_abs are moved into parallel_bus library folder, 3 LED driver operation sample 13-Feb.-2012
nxp_ip 14:b2e3797242b6 24 * PCU9669 and PCA9665 codes are packed in a project 14-Feb-2012.
nxp_ip 14:b2e3797242b6 25 *
nxp_ip 14:b2e3797242b6 26 * Before builidng the code, please edit the file mini_board_PCU9669/config.h
nxp_ip 14:b2e3797242b6 27 * Un-comment the target name what you want to target.
nxp_ip 14:b2e3797242b6 28 */
nxp_ip 14:b2e3797242b6 29
nxp_ip 14:b2e3797242b6 30 /** @note Application layer module of PCU9669
nxp_ip 14:b2e3797242b6 31 *
nxp_ip 14:b2e3797242b6 32 * This code is made to explain basic PCU9669 operation.
nxp_ip 14:b2e3797242b6 33 * And also, it demonstrates 3 channels of I2C operation with several slaves on those buses.
nxp_ip 14:b2e3797242b6 34 *
nxp_ip 14:b2e3797242b6 35 * The ch0 is an Fm+ bus that has a PCA9955 as slave device
nxp_ip 14:b2e3797242b6 36 * The ch1 and ch2 are UFm buses. Each bus has a PCU9955 as slave devices.
nxp_ip 14:b2e3797242b6 37 */
nxp_ip 14:b2e3797242b6 38
nxp_ip 14:b2e3797242b6 39 #include "config.h"
nxp_ip 14:b2e3797242b6 40 #include "hardware_abs.h"
nxp_ip 14:b2e3797242b6 41 #include "transfer_manager.h" // abstracting the access of PCU9669 internal buffer
nxp_ip 14:b2e3797242b6 42 #include "PCU9669_access.h" // PCU9669 chip access interface
nxp_ip 14:b2e3797242b6 43 #include "PCx9955_reg.h" // slave specific definitions
nxp_ip 14:b2e3797242b6 44 #include "PCA9629_reg.h"
nxp_ip 14:b2e3797242b6 45 #include "utility.h" //
nxp_ip 14:b2e3797242b6 46 //#include "mbed.h" // this header is required only when printf() is used.
nxp_ip 14:b2e3797242b6 47
nxp_ip 14:b2e3797242b6 48 #if defined( CODE_FOR_PCU9669 ) || defined( CODE_FOR_PCA9663 )
nxp_ip 14:b2e3797242b6 49
nxp_ip 14:b2e3797242b6 50 #ifdef CODE_FOR_PCU9669
nxp_ip 14:b2e3797242b6 51 #define TARGET_CHIP_ID PCU9669_ID
nxp_ip 14:b2e3797242b6 52 #endif
nxp_ip 14:b2e3797242b6 53
nxp_ip 14:b2e3797242b6 54 #ifdef CODE_FOR_PCA9663
nxp_ip 14:b2e3797242b6 55 #define TARGET_CHIP_ID PCA9663_ID
nxp_ip 14:b2e3797242b6 56 #endif
nxp_ip 14:b2e3797242b6 57
nxp_ip 14:b2e3797242b6 58 #define RESET_PULSE_WIDTH_US 10 // Minimum pulse width is 4us for PCU9669
nxp_ip 14:b2e3797242b6 59 #define RESET_RECOVERY_US 1000
nxp_ip 14:b2e3797242b6 60
nxp_ip 14:b2e3797242b6 61 /**
nxp_ip 14:b2e3797242b6 62 * register settings for PCx9955
nxp_ip 14:b2e3797242b6 63 */
nxp_ip 14:b2e3797242b6 64
nxp_ip 14:b2e3797242b6 65 char PCx9955_reg_data[] = {
nxp_ip 14:b2e3797242b6 66 0x80, // Strat register address with AutoIncrement bit
nxp_ip 14:b2e3797242b6 67 0x00, 0x05, // MODE1, MODE2
nxp_ip 14:b2e3797242b6 68 0xAA, 0xAA, 0xAA, 0xAA, // LEDOUT[3:0]
nxp_ip 14:b2e3797242b6 69 0x80, 0x00, // GRPPWM, GRPFREQ
nxp_ip 14:b2e3797242b6 70 PWM_INIT, PWM_INIT, PWM_INIT, PWM_INIT, // PWM[3:0]
nxp_ip 14:b2e3797242b6 71 PWM_INIT, PWM_INIT, PWM_INIT, PWM_INIT, // PWM[7:4]
nxp_ip 14:b2e3797242b6 72 PWM_INIT, PWM_INIT, PWM_INIT, PWM_INIT, // PWM[11:8]
nxp_ip 14:b2e3797242b6 73 PWM_INIT, PWM_INIT, PWM_INIT, PWM_INIT, // PWM[15:12]
nxp_ip 14:b2e3797242b6 74 IREF_INIT, IREF_INIT, IREF_INIT, IREF_INIT, // IREF[3:0]
nxp_ip 14:b2e3797242b6 75 IREF_INIT, IREF_INIT, IREF_INIT, IREF_INIT, // IREF[7:4]
nxp_ip 14:b2e3797242b6 76 IREF_INIT, IREF_INIT, IREF_INIT, IREF_INIT, // IREF[11:8]
nxp_ip 14:b2e3797242b6 77 IREF_INIT, IREF_INIT, IREF_INIT, IREF_INIT, // IREF[15:12]
nxp_ip 14:b2e3797242b6 78 0x08 // OFFSET: 1uS offsets
nxp_ip 14:b2e3797242b6 79 };
nxp_ip 14:b2e3797242b6 80
nxp_ip 14:b2e3797242b6 81
nxp_ip 14:b2e3797242b6 82 char PCx9955_reg_read_start_address = 0x80;
nxp_ip 14:b2e3797242b6 83
nxp_ip 14:b2e3797242b6 84 char read_buffer[ 41 ];
nxp_ip 14:b2e3797242b6 85
nxp_ip 14:b2e3797242b6 86 transaction ufm_transactions[] = {
nxp_ip 14:b2e3797242b6 87 { PCx9955_ADDR0, PCx9955_reg_data, sizeof( PCx9955_reg_data ) }
nxp_ip 14:b2e3797242b6 88 };
nxp_ip 14:b2e3797242b6 89
nxp_ip 14:b2e3797242b6 90 transaction fm_plus_transactions[] = {
nxp_ip 14:b2e3797242b6 91 { PCx9955_ADDR0, PCx9955_reg_data, sizeof( PCx9955_reg_data ) },
nxp_ip 14:b2e3797242b6 92 { PCx9955_ADDR0, &PCx9955_reg_read_start_address, 1 },
nxp_ip 14:b2e3797242b6 93 { PCx9955_ADDR0 | 0x01, read_buffer, sizeof( read_buffer ) }
nxp_ip 14:b2e3797242b6 94 };
nxp_ip 14:b2e3797242b6 95
nxp_ip 14:b2e3797242b6 96 char read_done = 0;
nxp_ip 14:b2e3797242b6 97
nxp_ip 14:b2e3797242b6 98 void interrupt_handler( void );
nxp_ip 14:b2e3797242b6 99
nxp_ip 14:b2e3797242b6 100 int main() {
nxp_ip 14:b2e3797242b6 101 char clear[ 16 ] = { 0 };
nxp_ip 14:b2e3797242b6 102 int count = 0;
nxp_ip 14:b2e3797242b6 103 int i;
nxp_ip 14:b2e3797242b6 104 int j;
nxp_ip 14:b2e3797242b6 105
nxp_ip 14:b2e3797242b6 106 // printf( "\r\nPCU9669 simple demo program on mbed\r\n build : %s (UTC), %s \r\n\r\n", __TIME__, __DATE__ );
nxp_ip 14:b2e3797242b6 107
nxp_ip 14:b2e3797242b6 108 hardware_initialize(); // initializing bit-banging parallel port
nxp_ip 14:b2e3797242b6 109 reset( RESET_PULSE_WIDTH_US, RESET_RECOVERY_US ); // assert hardware /RESET sgnal
nxp_ip 14:b2e3797242b6 110
nxp_ip 14:b2e3797242b6 111 if ( start_bus_controller( TARGET_CHIP_ID ) ) // wait the bus controller ready and check chip ID
nxp_ip 14:b2e3797242b6 112 return 1;
nxp_ip 14:b2e3797242b6 113
nxp_ip 14:b2e3797242b6 114 write_ch_register( CH_FM_PLUS, INTMSK, 0x30 ); // set bus controller to ignore NAK return from Fm+ slaves
nxp_ip 14:b2e3797242b6 115 install_ISR( &interrupt_handler ); // interrupt service routine install
nxp_ip 14:b2e3797242b6 116
nxp_ip 14:b2e3797242b6 117 setup_transfer( CH_FM_PLUS, fm_plus_transactions, sizeof( fm_plus_transactions ) / sizeof( transaction ) );
nxp_ip 14:b2e3797242b6 118 setup_transfer( CH_UFM1, ufm_transactions, sizeof( ufm_transactions ) / sizeof( transaction ) );
nxp_ip 14:b2e3797242b6 119 setup_transfer( CH_UFM2, ufm_transactions, sizeof( ufm_transactions ) / sizeof( transaction ) );
nxp_ip 14:b2e3797242b6 120
nxp_ip 14:b2e3797242b6 121 while ( 1 ) {
nxp_ip 14:b2e3797242b6 122 for ( i = 0; i < 16; i++ ) {
nxp_ip 14:b2e3797242b6 123 for ( j = 0; j < 256; j += 4 ) {
nxp_ip 14:b2e3797242b6 124 buffer_overwrite( CH_FM_PLUS, 0, 9 + i, (char *)&j, 1 );
nxp_ip 14:b2e3797242b6 125 buffer_overwrite( CH_UFM1, 0, 9 + i, (char *)&j, 1 );
nxp_ip 14:b2e3797242b6 126 buffer_overwrite( CH_UFM2, 0, 9 + i, (char *)&j, 1 );
nxp_ip 14:b2e3797242b6 127
nxp_ip 14:b2e3797242b6 128 read_done = 0;
nxp_ip 14:b2e3797242b6 129
nxp_ip 14:b2e3797242b6 130 set_n_of_transaction( CH_FM_PLUS, (sizeof( fm_plus_transactions ) / sizeof( transaction )) - ((count % 256) ? 1 : 0) );
nxp_ip 14:b2e3797242b6 131
nxp_ip 14:b2e3797242b6 132 start( CH_FM_PLUS );
nxp_ip 14:b2e3797242b6 133 start( CH_UFM1 );
nxp_ip 14:b2e3797242b6 134 start( CH_UFM2 );
nxp_ip 14:b2e3797242b6 135
nxp_ip 14:b2e3797242b6 136 #if 0
nxp_ip 14:b2e3797242b6 137 if ( read_done ) {
nxp_ip 14:b2e3797242b6 138 buffer_read( CH_FM_PLUS, 2, 0, read_buffer, sizeof( read_buffer ) );
nxp_ip 14:b2e3797242b6 139 dump_read_data( read_buffer, sizeof( read_buffer ) );
nxp_ip 14:b2e3797242b6 140 read_done = 0;
nxp_ip 14:b2e3797242b6 141 }
nxp_ip 14:b2e3797242b6 142 #endif
nxp_ip 14:b2e3797242b6 143 wait_sec( 0.01 );
nxp_ip 14:b2e3797242b6 144 count++;
nxp_ip 14:b2e3797242b6 145 }
nxp_ip 14:b2e3797242b6 146 }
nxp_ip 14:b2e3797242b6 147 buffer_overwrite( CH_FM_PLUS, 0, 9, clear, 16 );
nxp_ip 14:b2e3797242b6 148 buffer_overwrite( CH_UFM1, 0, 9, clear, 16 );
nxp_ip 14:b2e3797242b6 149 buffer_overwrite( CH_UFM2, 0, 9, clear, 16 );
nxp_ip 14:b2e3797242b6 150 }
nxp_ip 14:b2e3797242b6 151 }
nxp_ip 14:b2e3797242b6 152
nxp_ip 14:b2e3797242b6 153 void interrupt_handler( void ) {
nxp_ip 14:b2e3797242b6 154 char global_status;
nxp_ip 14:b2e3797242b6 155 char channel_status;
nxp_ip 14:b2e3797242b6 156
nxp_ip 14:b2e3797242b6 157 global_status = read_data( CTRLSTATUS );
nxp_ip 14:b2e3797242b6 158
nxp_ip 14:b2e3797242b6 159 if ( global_status & 0x01 ) { // ch0
nxp_ip 14:b2e3797242b6 160 channel_status = read_ch_register( 0, CHSTATUS );
nxp_ip 14:b2e3797242b6 161
nxp_ip 14:b2e3797242b6 162 if ( channel_status & 0x80 )
nxp_ip 14:b2e3797242b6 163 read_done = 1;
nxp_ip 14:b2e3797242b6 164 }
nxp_ip 14:b2e3797242b6 165 if ( global_status & 0x02 ) {
nxp_ip 14:b2e3797242b6 166 channel_status = read_ch_register( 1, CHSTATUS );
nxp_ip 14:b2e3797242b6 167 }
nxp_ip 14:b2e3797242b6 168 if ( global_status & 0x04 ) {
nxp_ip 14:b2e3797242b6 169 channel_status = read_ch_register( 2, CHSTATUS );
nxp_ip 14:b2e3797242b6 170 }
nxp_ip 14:b2e3797242b6 171 // printf( "ISR channel_status 0x%02X\r\n", channel_status );
nxp_ip 14:b2e3797242b6 172 }
nxp_ip 14:b2e3797242b6 173
nxp_ip 14:b2e3797242b6 174 #endif // CODE_FOR_PCU9669
nxp_ip 14:b2e3797242b6 175
nxp_ip 14:b2e3797242b6 176
nxp_ip 14:b2e3797242b6 177
nxp_ip 14:b2e3797242b6 178
nxp_ip 14:b2e3797242b6 179
nxp_ip 14:b2e3797242b6 180