Manuel Caballero / ADS111X

Ultra-Small, Low-Power, I2C-Compatible, 860-SPS, 16-Bit ADCs With Internal Reference, Oscillator, and Programmable Comparator

ADS111X.h@3:4a9619b441f0, 2020-06-19 (annotated)

Committer:
mcm
Date:
Fri Jun 19 10:16:03 2020 +0000
Revision:
3:4a9619b441f0
Parent:
1:8593e6fcf0c3
Child:
4:7853bced749c
The driver was completed and tested ( NUCLEO-L476RG ), it works as expected.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mcm 1:8593e6fcf0c3 1 /**
mcm 1:8593e6fcf0c3 2 * @brief ADS111X.h
mcm 1:8593e6fcf0c3 3 * @details Ultra-Small, Low-Power, I2C-Compatible, 860-SPS, 16-Bit ADCs With Internal Reference, Oscillator, and Programmable Comparator.
mcm 1:8593e6fcf0c3 4 * Header file.
mcm 1:8593e6fcf0c3 5 *
mcm 1:8593e6fcf0c3 6 *
mcm 1:8593e6fcf0c3 7 * @return N/A
mcm 1:8593e6fcf0c3 8 *
mcm 1:8593e6fcf0c3 9 * @author Manuel Caballero
mcm 1:8593e6fcf0c3 10 * @date 18/June/2020
mcm 1:8593e6fcf0c3 11 * @version 18/June/2020 The ORIGIN
mcm 1:8593e6fcf0c3 12 * @pre N/A.
mcm 1:8593e6fcf0c3 13 * @warning N/A
mcm 1:8593e6fcf0c3 14 * @pre This code belongs to AqueronteBlog ( http://unbarquero.blogspot.com ).
mcm 1:8593e6fcf0c3 15 */
mcm 1:8593e6fcf0c3 16 #ifndef ADS111X_H
mcm 1:8593e6fcf0c3 17 #define ADS111X_H
mcm 1:8593e6fcf0c3 18
mcm 1:8593e6fcf0c3 19 #include "mbed.h"
mcm 1:8593e6fcf0c3 20
mcm 1:8593e6fcf0c3 21
mcm 1:8593e6fcf0c3 22 /**
mcm 1:8593e6fcf0c3 23 Example:
mcm 1:8593e6fcf0c3 24 @code
mcm 3:4a9619b441f0 25 #include "mbed.h"
mcm 3:4a9619b441f0 26 #include "ADS111X.h"
mcm 1:8593e6fcf0c3 27
mcm 3:4a9619b441f0 28 ADS111X myADS111X ( I2C_SDA, I2C_SCL, ADS111X::ADS111X_ADDRESS_GND, 100000, ADS111X::DEVICE_ADS1115 ); // I2C_SDA | I2C_SCL | DEVICE_ADS1115
mcm 3:4a9619b441f0 29 Serial pc ( USBTX, USBRX ); // tx, rx
mcm 3:4a9619b441f0 30
mcm 3:4a9619b441f0 31 DigitalOut myled ( LED1 );
mcm 3:4a9619b441f0 32 Ticker newAction;
mcm 3:4a9619b441f0 33
mcm 3:4a9619b441f0 34
mcm 3:4a9619b441f0 35 //@brief Constants.
mcm 3:4a9619b441f0 36
mcm 3:4a9619b441f0 37
mcm 3:4a9619b441f0 38 //@brief Variables.
mcm 3:4a9619b441f0 39 volatile uint32_t myState; // State that indicates when to perform a new sample
mcm 3:4a9619b441f0 40
mcm 3:4a9619b441f0 41
mcm 3:4a9619b441f0 42 //@brief FUNCTION PROTOTYPES
mcm 3:4a9619b441f0 43 void changeDATA ( void );
mcm 3:4a9619b441f0 44
mcm 3:4a9619b441f0 45
mcm 3:4a9619b441f0 46 //@brief FUNCTION FOR APPLICATION MAIN ENTRY.
mcm 3:4a9619b441f0 47 int main()
mcm 3:4a9619b441f0 48 {
mcm 3:4a9619b441f0 49 ADS111X::ADS111X_status_t aux;
mcm 3:4a9619b441f0 50 ADS111X::ADS111X_data_t myADS111X_Data;
mcm 3:4a9619b441f0 51
mcm 3:4a9619b441f0 52 pc.baud ( 115200 );
mcm 3:4a9619b441f0 53
mcm 3:4a9619b441f0 54 myled = 1;
mcm 3:4a9619b441f0 55 wait(3);
mcm 3:4a9619b441f0 56 myled = 0;
mcm 3:4a9619b441f0 57
mcm 3:4a9619b441f0 58 // Perform a softreset
mcm 3:4a9619b441f0 59 aux = myADS111X.ADS111X_SoftReset ();
mcm 3:4a9619b441f0 60 wait_ms ( 500U );
mcm 3:4a9619b441f0 61
mcm 3:4a9619b441f0 62 // Input multiplexor configuration ( channels ): AINp = AIN0 | AINn = GND
mcm 3:4a9619b441f0 63 myADS111X_Data.config.mux = ADS111X::CONFIG_MUX_AINP_AIN0_AND_AINN_GND;
mcm 3:4a9619b441f0 64 aux = myADS111X.ADS111X_SetMux ( myADS111X_Data );
mcm 3:4a9619b441f0 65
mcm 3:4a9619b441f0 66 // Gain: ±4.096V
mcm 3:4a9619b441f0 67 myADS111X_Data.config.pga = ADS111X::CONFIG_PGA_FSR_4_096_V;
mcm 3:4a9619b441f0 68 aux = myADS111X.ADS111X_SetGain ( myADS111X_Data );
mcm 3:4a9619b441f0 69
mcm 3:4a9619b441f0 70 // Mode: Single-shot
mcm 3:4a9619b441f0 71 myADS111X_Data.config.mode = ADS111X::CONFIG_MODE_SINGLE_SHOT;
mcm 3:4a9619b441f0 72 aux = myADS111X.ADS111X_SetMode ( myADS111X_Data.config );
mcm 3:4a9619b441f0 73
mcm 3:4a9619b441f0 74 // Data rate: 1600 SPS
mcm 3:4a9619b441f0 75 myADS111X_Data.config.dr = ADS111X::CONFIG_DR_128_SPS;
mcm 3:4a9619b441f0 76 aux = myADS111X.ADS111X_SetDataRate ( myADS111X_Data.config );
mcm 3:4a9619b441f0 77
mcm 3:4a9619b441f0 78 // Comparator: Disabled
mcm 3:4a9619b441f0 79 myADS111X_Data.config.comp_que = ADS111X::CONFIG_COMP_QUE_DISABLED;
mcm 3:4a9619b441f0 80 aux = myADS111X.ADS111X_SetComparator ( myADS111X_Data );
mcm 3:4a9619b441f0 81
mcm 3:4a9619b441f0 82 myState = 0UL; // Reset the variable
mcm 3:4a9619b441f0 83 newAction.attach( &changeDATA, 1U ); // the address of the function to be attached ( changeDATA ) and the interval ( 1s )
mcm 3:4a9619b441f0 84
mcm 3:4a9619b441f0 85 // Let the callbacks take care of everything
mcm 3:4a9619b441f0 86 while(1) {
mcm 3:4a9619b441f0 87 sleep();
mcm 3:4a9619b441f0 88
mcm 3:4a9619b441f0 89 if ( myState == 1UL ) {
mcm 3:4a9619b441f0 90 myled = 1U;
mcm 3:4a9619b441f0 91
mcm 3:4a9619b441f0 92 // Trigger a new conversion
mcm 3:4a9619b441f0 93 aux = myADS111X.ADS111X_StartSingleConversion ();
mcm 3:4a9619b441f0 94
mcm 3:4a9619b441f0 95 // Wait until the conversion is completed
mcm 3:4a9619b441f0 96 do {
mcm 3:4a9619b441f0 97 aux = myADS111X.ADS111X_GetOS ( &myADS111X_Data.config );
mcm 3:4a9619b441f0 98 } while( ( myADS111X_Data.config.os & ADS111X::CONFIG_OS_MASK ) == ADS111X::CONFIG_OS_BUSY ); // [TODO] Too dangerous! the uC may get stuck here
mcm 3:4a9619b441f0 99 // [WORKAROUND] Insert a counter.
mcm 3:4a9619b441f0 100 // Get the result
mcm 3:4a9619b441f0 101 aux = myADS111X.ADS111X_GetConversion ( &myADS111X_Data );
mcm 3:4a9619b441f0 102
mcm 3:4a9619b441f0 103 // Send data through the UART
mcm 3:4a9619b441f0 104 pc.printf ( "V: %d mV\r\n", (int32_t)( 1000 * myADS111X_Data.conversion.conversion ) );
mcm 3:4a9619b441f0 105
mcm 3:4a9619b441f0 106
mcm 3:4a9619b441f0 107 // Reset the variables
mcm 3:4a9619b441f0 108 myState = 0UL;
mcm 3:4a9619b441f0 109 myled = 0U;
mcm 3:4a9619b441f0 110 }
mcm 3:4a9619b441f0 111 }
mcm 3:4a9619b441f0 112 }
mcm 3:4a9619b441f0 113
mcm 3:4a9619b441f0 114
mcm 3:4a9619b441f0 115 // @brief changeDATA ( void )
mcm 3:4a9619b441f0 116 //
mcm 3:4a9619b441f0 117 // @details It changes myState variable
mcm 3:4a9619b441f0 118 //
mcm 3:4a9619b441f0 119 // @param[in] N/A
mcm 3:4a9619b441f0 120 //
mcm 3:4a9619b441f0 121 // @param[out] N/A.
mcm 3:4a9619b441f0 122 //
mcm 3:4a9619b441f0 123 // @return N/A.
mcm 3:4a9619b441f0 124 //
mcm 3:4a9619b441f0 125 // @author Manuel Caballero
mcm 3:4a9619b441f0 126 // @date 18/June/2020
mcm 3:4a9619b441f0 127 // @version 18/June/2020 The ORIGIN
mcm 3:4a9619b441f0 128 // @pre N/A
mcm 3:4a9619b441f0 129 // @warning N/A.
mcm 3:4a9619b441f0 130 void changeDATA ( void )
mcm 3:4a9619b441f0 131 {
mcm 3:4a9619b441f0 132 myState = 1UL;
mcm 3:4a9619b441f0 133 }
mcm 1:8593e6fcf0c3 134 @endcode
mcm 1:8593e6fcf0c3 135 */
mcm 1:8593e6fcf0c3 136
mcm 1:8593e6fcf0c3 137
mcm 1:8593e6fcf0c3 138 /*!
mcm 1:8593e6fcf0c3 139 Library for the ADS111X Ultra-Small, Low-Power, I2C-Compatible, 860-SPS, 16-Bit ADCs With Internal Reference, Oscillator, and Programmable Comparator.
mcm 1:8593e6fcf0c3 140 */
mcm 1:8593e6fcf0c3 141 class ADS111X
mcm 1:8593e6fcf0c3 142 {
mcm 1:8593e6fcf0c3 143 public:
mcm 1:8593e6fcf0c3 144 /**
mcm 1:8593e6fcf0c3 145 * @brief DEFAULT ADDRESSES
mcm 1:8593e6fcf0c3 146 */
mcm 1:8593e6fcf0c3 147 typedef enum {
mcm 3:4a9619b441f0 148 ADS111X_ADDRESS_GND = ( 0b1001000 << 1U ), /*!< I2C slave address byte, ADDR = GND */
mcm 3:4a9619b441f0 149 ADS111X_ADDRESS_VDD = ( 0b1001001 << 1U ), /*!< I2C slave address byte, ADDR = VDD */
mcm 3:4a9619b441f0 150 ADS111X_ADDRESS_SDA = ( 0b1001010 << 1U ), /*!< I2C slave address byte, ADDR = SDA */
mcm 3:4a9619b441f0 151 ADS111X_ADDRESS_SCL = ( 0b1001011 << 1U ) /*!< I2C slave address byte, ADDR = SCL */
mcm 1:8593e6fcf0c3 152 } ADS111X_addresses_t;
mcm 1:8593e6fcf0c3 153
mcm 1:8593e6fcf0c3 154
mcm 1:8593e6fcf0c3 155
mcm 1:8593e6fcf0c3 156 /**
mcm 1:8593e6fcf0c3 157 * @brief REGISTER MAP
mcm 1:8593e6fcf0c3 158 */
mcm 1:8593e6fcf0c3 159 typedef enum {
mcm 1:8593e6fcf0c3 160 ADS111X_CONVERSION = 0x00, /*!< Conversion register */
mcm 1:8593e6fcf0c3 161 ADS111X_CONFIG = 0x01, /*!< Config register */
mcm 1:8593e6fcf0c3 162 ADS111X_LO_THRESH = 0x02, /*!< Lo threshold register */
mcm 1:8593e6fcf0c3 163 ADS111X_HI_THRESH = 0x03, /*!< Hi threshold register */
mcm 1:8593e6fcf0c3 164 ADS111X_RESET_COMMAND = 0x06 /*!< Reset command ( with a general call ) */
mcm 1:8593e6fcf0c3 165 } ADS111X_register_map_t;
mcm 1:8593e6fcf0c3 166
mcm 1:8593e6fcf0c3 167
mcm 1:8593e6fcf0c3 168
mcm 1:8593e6fcf0c3 169 /**
mcm 1:8593e6fcf0c3 170 * @brief DEVICE.
mcm 1:8593e6fcf0c3 171 * NOTE: The user MUST define which device to use: ADS1013, ADS1014 or ADS1015.
mcm 1:8593e6fcf0c3 172 */
mcm 1:8593e6fcf0c3 173 typedef enum {
mcm 1:8593e6fcf0c3 174 DEVICE_ADS1113 = 0x00, /*!< Device: ADS1113 */
mcm 1:8593e6fcf0c3 175 DEVICE_ADS1114 = 0x01, /*!< Device: ADS1114 */
mcm 1:8593e6fcf0c3 176 DEVICE_ADS1115 = 0x02 /*!< Device: ADS1115 */
mcm 1:8593e6fcf0c3 177 } ADS111X_device_t;
mcm 1:8593e6fcf0c3 178
mcm 1:8593e6fcf0c3 179
mcm 1:8593e6fcf0c3 180
mcm 1:8593e6fcf0c3 181 /**
mcm 1:8593e6fcf0c3 182 * @brief CONFIG REGISTER. ( Default: 0x8583 )
mcm 1:8593e6fcf0c3 183 * NOTE: The 16-bit Config register is used to control the operating mode, input selection, data rate, full-scale range, and
mcm 1:8593e6fcf0c3 184 * comparator modes.
mcm 1:8593e6fcf0c3 185 */
mcm 1:8593e6fcf0c3 186 /* OS <15>
mcm 1:8593e6fcf0c3 187 * NOTE: Operational status or single-shot conversion start.
mcm 1:8593e6fcf0c3 188 */
mcm 1:8593e6fcf0c3 189 typedef enum {
mcm 1:8593e6fcf0c3 190 CONFIG_OS_MASK = ( 1U << 15U ), /*!< OS mask */
mcm 1:8593e6fcf0c3 191 CONFIG_OS_BUSY = ( 1U << 15U ), /*!< Device is not currently performing a conversion/Start a single conversion (when in power-down state) [Default] */
mcm 1:8593e6fcf0c3 192 CONFIG_OS_NOT_BUSY = ( 0U << 15U ) /*!< Device is currently performing a conversion */
mcm 1:8593e6fcf0c3 193 } ADS111X_config_os_t;
mcm 1:8593e6fcf0c3 194
mcm 1:8593e6fcf0c3 195
mcm 1:8593e6fcf0c3 196 /* MUX <14:12>
mcm 1:8593e6fcf0c3 197 * NOTE: Input multiplexer configuration ( ADS1115 only ).
mcm 1:8593e6fcf0c3 198 */
mcm 1:8593e6fcf0c3 199 typedef enum {
mcm 1:8593e6fcf0c3 200 CONFIG_MUX_MASK = ( 0b111 << 12U ), /*!< MUX mask */
mcm 1:8593e6fcf0c3 201 CONFIG_MUX_AINP_AIN0_AND_AINN_AIN1 = ( 0b000 << 12U ), /*!< AINP = AIN0 and AINN = AIN1 [ Default ] */
mcm 1:8593e6fcf0c3 202 CONFIG_MUX_AINP_AIN0_AND_AINN_AIN3 = ( 0b001 << 12U ), /*!< AINP = AIN0 and AINN = AIN3 */
mcm 1:8593e6fcf0c3 203 CONFIG_MUX_AINP_AIN1_AND_AINN_AIN3 = ( 0b010 << 12U ), /*!< AINP = AIN1 and AINN = AIN3 */
mcm 1:8593e6fcf0c3 204 CONFIG_MUX_AINP_AIN2_AND_AINN_AIN3 = ( 0b011 << 12U ), /*!< AINP = AIN2 and AINN = AIN3 */
mcm 1:8593e6fcf0c3 205 CONFIG_MUX_AINP_AIN0_AND_AINN_GND = ( 0b100 << 12U ), /*!< AINP = AIN0 and AINN = GND */
mcm 1:8593e6fcf0c3 206 CONFIG_MUX_AINP_AIN1_AND_AINN_GND = ( 0b101 << 12U ), /*!< AINP = AIN1 and AINN = GND */
mcm 1:8593e6fcf0c3 207 CONFIG_MUX_AINP_AIN2_AND_AINN_GND = ( 0b110 << 12U ), /*!< AINP = AIN2 and AINN = GND */
mcm 1:8593e6fcf0c3 208 CONFIG_MUX_AINP_AIN3_AND_AINN_GND = ( 0b111 << 12U ) /*!< AINP = AIN3 and AINN = GND */
mcm 1:8593e6fcf0c3 209 } ADS111X_config_mux_t;
mcm 1:8593e6fcf0c3 210
mcm 1:8593e6fcf0c3 211
mcm 1:8593e6fcf0c3 212 /* PGA <11:9>
mcm 1:8593e6fcf0c3 213 * NOTE: Programmable gain amplifier configuration ( These bits serve NO function on the ADS1113 ).
mcm 1:8593e6fcf0c3 214 */
mcm 1:8593e6fcf0c3 215 typedef enum {
mcm 1:8593e6fcf0c3 216 CONFIG_PGA_MASK = ( 0b111 << 9U ), /*!< PGA mask */
mcm 3:4a9619b441f0 217 CONFIG_PGA_FSR_6_144_V = ( 0b000 << 9U ), /*!< FSR = ±6.144 V */
mcm 3:4a9619b441f0 218 CONFIG_PGA_FSR_4_096_V = ( 0b001 << 9U ), /*!< FSR = ±4.096 V */
mcm 3:4a9619b441f0 219 CONFIG_PGA_FSR_2_048_V = ( 0b010 << 9U ), /*!< FSR = ±2.048 V [ Default ] */
mcm 3:4a9619b441f0 220 CONFIG_PGA_FSR_1_024_V = ( 0b011 << 9U ), /*!< FSR = ±1.024 V */
mcm 3:4a9619b441f0 221 CONFIG_PGA_FSR_0_512_V = ( 0b100 << 9U ), /*!< FSR = ±0.512 V */
mcm 3:4a9619b441f0 222 CONFIG_PGA_FSR_0_256_V = ( 0b101 << 9U ) /*!< FSR = ±0.256 V */
mcm 1:8593e6fcf0c3 223 } ADS111X_config_pga_t;
mcm 1:8593e6fcf0c3 224
mcm 1:8593e6fcf0c3 225
mcm 1:8593e6fcf0c3 226 /* MODE <8>
mcm 1:8593e6fcf0c3 227 * NOTE: Device operating mode.
mcm 1:8593e6fcf0c3 228 */
mcm 1:8593e6fcf0c3 229 typedef enum {
mcm 1:8593e6fcf0c3 230 CONFIG_MODE_MASK = ( 1U << 8U ), /*!< MODE mask */
mcm 1:8593e6fcf0c3 231 CONFIG_MODE_CONTINUOUS_CONVERSION = ( 0U << 8U ), /*!< Continuous-conversion mode */
mcm 1:8593e6fcf0c3 232 CONFIG_MODE_SINGLE_SHOT = ( 1U << 8U ) /*!< Single-shot mode or power-down state [ Default ] */
mcm 1:8593e6fcf0c3 233 } ADS111X_config_mode_t;
mcm 1:8593e6fcf0c3 234
mcm 1:8593e6fcf0c3 235
mcm 1:8593e6fcf0c3 236 /* DR <7:5>
mcm 1:8593e6fcf0c3 237 * NOTE: Data rate.
mcm 1:8593e6fcf0c3 238 */
mcm 1:8593e6fcf0c3 239 typedef enum {
mcm 1:8593e6fcf0c3 240 CONFIG_DR_MASK = ( 0b111 << 5U ), /*!< DR mask */
mcm 1:8593e6fcf0c3 241 CONFIG_DR_8_SPS = ( 0b000 << 5U ), /*!< 8 SPS */
mcm 1:8593e6fcf0c3 242 CONFIG_DR_16_SPS = ( 0b001 << 5U ), /*!< 16 SPS */
mcm 1:8593e6fcf0c3 243 CONFIG_DR_32_SPS = ( 0b010 << 5U ), /*!< 32 SPS */
mcm 1:8593e6fcf0c3 244 CONFIG_DR_64_SPS = ( 0b011 << 5U ), /*!< 64 SPS */
mcm 1:8593e6fcf0c3 245 CONFIG_DR_128_SPS = ( 0b100 << 5U ), /*!< 128 SPS [ Default ] */
mcm 1:8593e6fcf0c3 246 CONFIG_DR_250_SPS = ( 0b101 << 5U ), /*!< 250 SPS */
mcm 1:8593e6fcf0c3 247 CONFIG_DR_475_SPS = ( 0b110 << 5U ), /*!< 475 SPS */
mcm 1:8593e6fcf0c3 248 CONFIG_DR_860_SPS = ( 0b111 << 5U ) /*!< 860 SPS */
mcm 1:8593e6fcf0c3 249 } ADS111X_config_dr_t;
mcm 1:8593e6fcf0c3 250
mcm 1:8593e6fcf0c3 251
mcm 1:8593e6fcf0c3 252 /* COMP_MODE <4>
mcm 1:8593e6fcf0c3 253 * NOTE: Comparator mode ( ADS1114 and ADS1115 only )
mcm 1:8593e6fcf0c3 254 */
mcm 1:8593e6fcf0c3 255 typedef enum {
mcm 1:8593e6fcf0c3 256 CONFIG_COMP_MODE_MASK = ( 1U << 4U ), /*!< COMP_MODE mask */
mcm 1:8593e6fcf0c3 257 CONFIG_COMP_MODE_TRADITIONAL_COMPARATOR = ( 0U << 4U ), /*!< Traditional comparator [ Default ] */
mcm 1:8593e6fcf0c3 258 CONFIG_COMP_MODE_WINDOW_COMPARATOR = ( 1U << 4U ) /*!< Window comparator */
mcm 1:8593e6fcf0c3 259 } ADS111X_config_comp_mode_t;
mcm 1:8593e6fcf0c3 260
mcm 1:8593e6fcf0c3 261
mcm 1:8593e6fcf0c3 262 /* COMP_POL <3>
mcm 1:8593e6fcf0c3 263 * NOTE: Comparator polarity ( ADS1114 and ADS1115 only )
mcm 1:8593e6fcf0c3 264 */
mcm 1:8593e6fcf0c3 265 typedef enum {
mcm 1:8593e6fcf0c3 266 CONFIG_COMP_POL_MASK = ( 1U << 3U ), /*!< COMP_POL mask */
mcm 1:8593e6fcf0c3 267 CONFIG_COMP_POL_ACTIVE_LOW = ( 0U << 3U ), /*!< Active low [ Default ] */
mcm 1:8593e6fcf0c3 268 CONFIG_COMP_POL_ACTIVE_HIGH = ( 1U << 3U ) /*!< Active high */
mcm 1:8593e6fcf0c3 269 } ADS111X_config_comp_pol_t;
mcm 1:8593e6fcf0c3 270
mcm 1:8593e6fcf0c3 271
mcm 1:8593e6fcf0c3 272 /* COMP_LAT <2>
mcm 1:8593e6fcf0c3 273 * NOTE: Latching comparator ( ADS1114 and ADS1115 only )
mcm 1:8593e6fcf0c3 274 */
mcm 1:8593e6fcf0c3 275 typedef enum {
mcm 1:8593e6fcf0c3 276 CONFIG_COMP_LAT_MASK = ( 1U << 2U ), /*!< COMP_LAT mask */
mcm 1:8593e6fcf0c3 277 CONFIG_COMP_LAT_NONLATCHING_COMPARATOR = ( 0U << 2U ), /*!< Nonlatching comparator [ Default ] */
mcm 1:8593e6fcf0c3 278 CONFIG_COMP_LAT_LATCHING_COMPARATOR = ( 1U << 2U ) /*!< Latching comparator */
mcm 1:8593e6fcf0c3 279 } ADS111X_config_comp_lat_t;
mcm 1:8593e6fcf0c3 280
mcm 1:8593e6fcf0c3 281
mcm 1:8593e6fcf0c3 282 /* COMP_QUE <1:0>
mcm 1:8593e6fcf0c3 283 * NOTE: Comparator queue and disable ( ADS1114 and ADS1115 only )
mcm 1:8593e6fcf0c3 284 */
mcm 1:8593e6fcf0c3 285 typedef enum {
mcm 1:8593e6fcf0c3 286 CONFIG_COMP_QUE_MASK = ( 0b11 << 0U ), /*!< COMP_QUE mask */
mcm 1:8593e6fcf0c3 287 CONFIG_COMP_QUE_ASSERT_AFTER_ONE_CONVERSION = ( 0b00 << 0U ), /*!< Assert after one conversion */
mcm 1:8593e6fcf0c3 288 CONFIG_COMP_QUE_ASSERT_AFTER_TWO_CONVERSION = ( 0b01 << 0U ), /*!< Assert after two conversions */
mcm 1:8593e6fcf0c3 289 CONFIG_COMP_QUE_ASSERT_AFTER_FOUR_CONVERSION = ( 0b10 << 0U ), /*!< Assert after four conversions */
mcm 1:8593e6fcf0c3 290 CONFIG_COMP_QUE_DISABLED = ( 0b11 << 0U ) /*!< Disable comparator and set ALERT/RDY pin to high-impedance [ Default ] */
mcm 1:8593e6fcf0c3 291 } ADS111X_config_comp_que_t;
mcm 1:8593e6fcf0c3 292
mcm 1:8593e6fcf0c3 293
mcm 1:8593e6fcf0c3 294
mcm 1:8593e6fcf0c3 295 /**
mcm 1:8593e6fcf0c3 296 * @brief LO_THRESH REGISTER. ( Default: 0x8000 )
mcm 1:8593e6fcf0c3 297 */
mcm 1:8593e6fcf0c3 298 /* LO_THRESH <15:0>
mcm 1:8593e6fcf0c3 299 * NOTE: N/A.
mcm 1:8593e6fcf0c3 300 */
mcm 1:8593e6fcf0c3 301 typedef enum {
mcm 1:8593e6fcf0c3 302 LO_THRESH_MASK = 0xFFFF /*!< LO_THRESH mask */
mcm 1:8593e6fcf0c3 303 } ADS111X_lo_thresh_t;
mcm 1:8593e6fcf0c3 304
mcm 1:8593e6fcf0c3 305
mcm 1:8593e6fcf0c3 306
mcm 1:8593e6fcf0c3 307 /**
mcm 1:8593e6fcf0c3 308 * @brief HI_THRESH REGISTER. ( Default: 0x7FFF )
mcm 1:8593e6fcf0c3 309 */
mcm 1:8593e6fcf0c3 310 /* HI_THRESH <15:0>
mcm 1:8593e6fcf0c3 311 * NOTE: N/A.
mcm 1:8593e6fcf0c3 312 */
mcm 1:8593e6fcf0c3 313 typedef enum {
mcm 1:8593e6fcf0c3 314 HI_THRESH_MASK = 0xFFFF /*!< HI_THRESH mask */
mcm 1:8593e6fcf0c3 315 } ADS111X_hi_thresh_t;
mcm 1:8593e6fcf0c3 316
mcm 1:8593e6fcf0c3 317
mcm 1:8593e6fcf0c3 318
mcm 1:8593e6fcf0c3 319
mcm 1:8593e6fcf0c3 320
mcm 1:8593e6fcf0c3 321 #ifndef ADS111X_VECTOR_STRUCT_H
mcm 1:8593e6fcf0c3 322 #define ADS111X_VECTOR_STRUCT_H
mcm 1:8593e6fcf0c3 323 /* Configuration parameters */
mcm 1:8593e6fcf0c3 324 typedef struct {
mcm 1:8593e6fcf0c3 325 ADS111X_config_os_t os; /*!< Operational status */
mcm 1:8593e6fcf0c3 326 ADS111X_config_mux_t mux; /*!< Input multiplexer configuration (ADS1015 only) */
mcm 1:8593e6fcf0c3 327 ADS111X_config_pga_t pga; /*!< Programmable gain amplifier configuration (not ADS1013) */
mcm 1:8593e6fcf0c3 328 ADS111X_config_mode_t mode; /*!< Device operating mode */
mcm 1:8593e6fcf0c3 329 ADS111X_config_dr_t dr; /*!< Data rate */
mcm 1:8593e6fcf0c3 330 ADS111X_config_comp_mode_t comp_mode; /*!< Comparator mode (ADS1014 and ADS1015 only) */
mcm 1:8593e6fcf0c3 331 ADS111X_config_comp_pol_t comp_pol; /*!< Comparator polarity (ADS1014 and ADS1015 only) */
mcm 1:8593e6fcf0c3 332 ADS111X_config_comp_lat_t comp_lat; /*!< Latching comparator (ADS1014 and ADS1015 only) */
mcm 1:8593e6fcf0c3 333 ADS111X_config_comp_que_t comp_que; /*!< Comparator queue and disable (ADS1014 and ADS1015 only) */
mcm 1:8593e6fcf0c3 334 } ADS111X_config_t;
mcm 1:8593e6fcf0c3 335
mcm 1:8593e6fcf0c3 336
mcm 1:8593e6fcf0c3 337 /* Thresholds: High and low thresholds */
mcm 1:8593e6fcf0c3 338 typedef struct {
mcm 1:8593e6fcf0c3 339 int16_t lo_thresh; /*!< Low threshold value */
mcm 1:8593e6fcf0c3 340 int16_t hi_thresh; /*!< High threshold value */
mcm 1:8593e6fcf0c3 341 } ADS111X_thresh_t;
mcm 1:8593e6fcf0c3 342
mcm 1:8593e6fcf0c3 343
mcm 1:8593e6fcf0c3 344 /* Result Conversion: Raw value and conversion value */
mcm 1:8593e6fcf0c3 345 typedef struct {
mcm 1:8593e6fcf0c3 346 float conversion; /*!< Conversion value */
mcm 1:8593e6fcf0c3 347 int16_t raw_conversion; /*!< Raw conversion value */
mcm 1:8593e6fcf0c3 348 } ADS111X_conversion_t;
mcm 1:8593e6fcf0c3 349
mcm 1:8593e6fcf0c3 350
mcm 1:8593e6fcf0c3 351
mcm 1:8593e6fcf0c3 352 /* USER: User's global variables */
mcm 1:8593e6fcf0c3 353 typedef struct {
mcm 1:8593e6fcf0c3 354 /* Output */
mcm 1:8593e6fcf0c3 355 ADS111X_conversion_t conversion; /*!< Conversion values */
mcm 1:8593e6fcf0c3 356
mcm 1:8593e6fcf0c3 357 /* Configuration */
mcm 1:8593e6fcf0c3 358 ADS111X_config_t config; /*!< Configuration register */
mcm 1:8593e6fcf0c3 359
mcm 1:8593e6fcf0c3 360 /* Thresholds */
mcm 1:8593e6fcf0c3 361 ADS111X_thresh_t thresh; /*!< High/Low threshold values */
mcm 1:8593e6fcf0c3 362
mcm 1:8593e6fcf0c3 363 /* Device identification */
mcm 1:8593e6fcf0c3 364 ADS111X_device_t device; /*!< Device. The user MUST identify the device */
mcm 1:8593e6fcf0c3 365 } ADS111X_data_t;
mcm 1:8593e6fcf0c3 366 #endif
mcm 1:8593e6fcf0c3 367
mcm 1:8593e6fcf0c3 368
mcm 1:8593e6fcf0c3 369 /**
mcm 1:8593e6fcf0c3 370 * @brief INTERNAL CONSTANTS
mcm 1:8593e6fcf0c3 371 */
mcm 1:8593e6fcf0c3 372 typedef enum {
mcm 1:8593e6fcf0c3 373 ADS111X_SUCCESS = 0U, /*!< I2C communication success */
mcm 1:8593e6fcf0c3 374 ADS111X_FAILURE = 1U, /*!< I2C communication failure */
mcm 1:8593e6fcf0c3 375 ADS111X_DEVICE_NOT_SUPPORTED = 2U, /*!< Device not supported */
mcm 1:8593e6fcf0c3 376 ADS111X_VALUE_OUT_OF_RANGE = 3U, /*!< Value aout of range */
mcm 1:8593e6fcf0c3 377 ADS111X_DATA_CORRUPTED = 4U, /*!< D and lo/hi threshold data */
mcm 1:8593e6fcf0c3 378 I2C_SUCCESS = 0U /*!< I2C communication was fine */
mcm 1:8593e6fcf0c3 379 } ADS111X_status_t;
mcm 1:8593e6fcf0c3 380
mcm 1:8593e6fcf0c3 381
mcm 1:8593e6fcf0c3 382
mcm 1:8593e6fcf0c3 383
mcm 1:8593e6fcf0c3 384 /** Create an ADS111X object connected to the specified I2C pins.
mcm 1:8593e6fcf0c3 385 *
mcm 1:8593e6fcf0c3 386 * @param sda I2C data pin
mcm 1:8593e6fcf0c3 387 * @param scl I2C clock pin
mcm 1:8593e6fcf0c3 388 * @param addr I2C slave address
mcm 1:8593e6fcf0c3 389 * @param freq I2C frequency
mcm 1:8593e6fcf0c3 390 * @param device Device to use: ADS1113, ADS1114 or ADS1115
mcm 1:8593e6fcf0c3 391 */
mcm 1:8593e6fcf0c3 392 ADS111X ( PinName sda, PinName scl, uint32_t addr, uint32_t freq, ADS111X_device_t device );
mcm 1:8593e6fcf0c3 393
mcm 1:8593e6fcf0c3 394 /** Delete ADS111X object.
mcm 1:8593e6fcf0c3 395 */
mcm 1:8593e6fcf0c3 396 ~ADS111X();
mcm 1:8593e6fcf0c3 397
mcm 1:8593e6fcf0c3 398 /** It triggers a softreset.
mcm 1:8593e6fcf0c3 399 */
mcm 1:8593e6fcf0c3 400 ADS111X_status_t ADS111X_SoftReset ( void );
mcm 1:8593e6fcf0c3 401
mcm 1:8593e6fcf0c3 402 /** It gets the raw conversion value.
mcm 1:8593e6fcf0c3 403 */
mcm 1:8593e6fcf0c3 404 ADS111X_status_t ADS111X_GetRawConversion ( ADS111X_conversion_t* myRawD );
mcm 1:8593e6fcf0c3 405
mcm 1:8593e6fcf0c3 406 /** It gets the conversion value.
mcm 1:8593e6fcf0c3 407 */
mcm 1:8593e6fcf0c3 408 ADS111X_status_t ADS111X_GetConversion ( ADS111X_data_t* myD );
mcm 1:8593e6fcf0c3 409
mcm 1:8593e6fcf0c3 410 /** It starts a new single conversion.
mcm 1:8593e6fcf0c3 411 */
mcm 1:8593e6fcf0c3 412 ADS111X_status_t ADS111X_StartSingleConversion ( void );
mcm 1:8593e6fcf0c3 413
mcm 1:8593e6fcf0c3 414 /** It checks if the device is not currently performing a conversion.
mcm 1:8593e6fcf0c3 415 */
mcm 1:8593e6fcf0c3 416 ADS111X_status_t ADS111X_GetOS ( ADS111X_config_t* myADS111X );
mcm 1:8593e6fcf0c3 417
mcm 1:8593e6fcf0c3 418 /** It sets input multiplexer configuration ( ADS1015 only ).
mcm 1:8593e6fcf0c3 419 */
mcm 1:8593e6fcf0c3 420 ADS111X_status_t ADS111X_SetMux ( ADS111X_data_t myADS111X );
mcm 1:8593e6fcf0c3 421
mcm 1:8593e6fcf0c3 422 /** It gets input multiplexer configuration ( ADS1015 only ).
mcm 1:8593e6fcf0c3 423 */
mcm 1:8593e6fcf0c3 424 ADS111X_status_t ADS111X_GetMux ( ADS111X_data_t* myADS111X );
mcm 1:8593e6fcf0c3 425
mcm 1:8593e6fcf0c3 426 /** It sets programmable gain amplifier ( not ADS1013 ).
mcm 1:8593e6fcf0c3 427 */
mcm 1:8593e6fcf0c3 428 ADS111X_status_t ADS111X_SetGain ( ADS111X_data_t myPGA );
mcm 1:8593e6fcf0c3 429
mcm 1:8593e6fcf0c3 430 /** It gets programmable gain amplifier ( not ADS1013 ).
mcm 1:8593e6fcf0c3 431 */
mcm 1:8593e6fcf0c3 432 ADS111X_status_t ADS111X_GetGain ( ADS111X_data_t* myPGA );
mcm 1:8593e6fcf0c3 433
mcm 1:8593e6fcf0c3 434 /** It sets the device operating mode.
mcm 1:8593e6fcf0c3 435 */
mcm 1:8593e6fcf0c3 436 ADS111X_status_t ADS111X_SetMode ( ADS111X_config_t myMode );
mcm 1:8593e6fcf0c3 437
mcm 1:8593e6fcf0c3 438 /** It gets the device operating mode.
mcm 1:8593e6fcf0c3 439 */
mcm 1:8593e6fcf0c3 440 ADS111X_status_t ADS111X_GetMode ( ADS111X_config_t* myMode );
mcm 1:8593e6fcf0c3 441
mcm 1:8593e6fcf0c3 442 /** It sets the data rate.
mcm 1:8593e6fcf0c3 443 */
mcm 1:8593e6fcf0c3 444 ADS111X_status_t ADS111X_SetDataRate ( ADS111X_config_t myDR );
mcm 1:8593e6fcf0c3 445
mcm 1:8593e6fcf0c3 446 /** It gets the data rate.
mcm 1:8593e6fcf0c3 447 */
mcm 1:8593e6fcf0c3 448 ADS111X_status_t ADS111X_GetDataRate ( ADS111X_config_t* myDR );
mcm 1:8593e6fcf0c3 449
mcm 1:8593e6fcf0c3 450 /** It sets the comparator configuration.
mcm 1:8593e6fcf0c3 451 */
mcm 1:8593e6fcf0c3 452 ADS111X_status_t ADS111X_SetComparator ( ADS111X_data_t myCOMP );
mcm 1:8593e6fcf0c3 453
mcm 1:8593e6fcf0c3 454 /** It gets the comparator configuration.
mcm 1:8593e6fcf0c3 455 */
mcm 1:8593e6fcf0c3 456 ADS111X_status_t ADS111X_GetComparator ( ADS111X_data_t* myCOMP );
mcm 1:8593e6fcf0c3 457
mcm 1:8593e6fcf0c3 458 /** It sets the low threshold value.
mcm 1:8593e6fcf0c3 459 */
mcm 1:8593e6fcf0c3 460 ADS111X_status_t ADS111X_SetLowThresholdValue ( ADS111X_thresh_t myLoThres );
mcm 1:8593e6fcf0c3 461
mcm 1:8593e6fcf0c3 462 /** It gets the low threshold value.
mcm 1:8593e6fcf0c3 463 */
mcm 1:8593e6fcf0c3 464 ADS111X_status_t ADS111X_GetLowThresholdValue ( ADS111X_thresh_t* myLoThres );
mcm 1:8593e6fcf0c3 465
mcm 1:8593e6fcf0c3 466 /** It sets the high threshold value.
mcm 1:8593e6fcf0c3 467 */
mcm 1:8593e6fcf0c3 468 ADS111X_status_t ADS111X_SetHighThresholdValue ( ADS111X_thresh_t myHiThres );
mcm 1:8593e6fcf0c3 469
mcm 1:8593e6fcf0c3 470 /** It gets the high threshold value.
mcm 1:8593e6fcf0c3 471 */
mcm 1:8593e6fcf0c3 472 ADS111X_status_t ADS111X_GetHighThresholdValue ( ADS111X_thresh_t* myHiThres );
mcm 1:8593e6fcf0c3 473
mcm 1:8593e6fcf0c3 474
mcm 1:8593e6fcf0c3 475
mcm 1:8593e6fcf0c3 476 private:
mcm 1:8593e6fcf0c3 477 I2C _i2c;
mcm 1:8593e6fcf0c3 478 uint32_t _ADS111X_Addr;
mcm 1:8593e6fcf0c3 479 ADS111X_device_t _device;
mcm 1:8593e6fcf0c3 480 };
mcm 1:8593e6fcf0c3 481
mcm 1:8593e6fcf0c3 482 #endif