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targets/cmsis/TARGET_Atmel/TARGET_SAM21/utils/cmsis/samd21/include/pio/pio_samd21j18a.h@592:a274ee790e56, 2015-07-17 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jul 17 09:15:10 2015 +0100
- Revision:
- 592:a274ee790e56
Synchronized with git revision e7144f83a8d75df80c4877936b6ffe552b0be9e6
Full URL: https://github.com/mbedmicro/mbed/commit/e7144f83a8d75df80c4877936b6ffe552b0be9e6/
More API implementation for SAMR21
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 592:a274ee790e56 | 1 | #ifndef _SAMD21J18A_PIO_ |
mbed_official | 592:a274ee790e56 | 2 | #define _SAMD21J18A_PIO_ |
mbed_official | 592:a274ee790e56 | 3 | |
mbed_official | 592:a274ee790e56 | 4 | #define PIN_PA00 0 /**< \brief Pin Number for PA00 */ |
mbed_official | 592:a274ee790e56 | 5 | #define PORT_PA00 (1ul << 0) /**< \brief PORT Mask for PA00 */ |
mbed_official | 592:a274ee790e56 | 6 | #define PIN_PA01 1 /**< \brief Pin Number for PA01 */ |
mbed_official | 592:a274ee790e56 | 7 | #define PORT_PA01 (1ul << 1) /**< \brief PORT Mask for PA01 */ |
mbed_official | 592:a274ee790e56 | 8 | #define PIN_PA02 2 /**< \brief Pin Number for PA02 */ |
mbed_official | 592:a274ee790e56 | 9 | #define PORT_PA02 (1ul << 2) /**< \brief PORT Mask for PA02 */ |
mbed_official | 592:a274ee790e56 | 10 | #define PIN_PA03 3 /**< \brief Pin Number for PA03 */ |
mbed_official | 592:a274ee790e56 | 11 | #define PORT_PA03 (1ul << 3) /**< \brief PORT Mask for PA03 */ |
mbed_official | 592:a274ee790e56 | 12 | #define PIN_PA04 4 /**< \brief Pin Number for PA04 */ |
mbed_official | 592:a274ee790e56 | 13 | #define PORT_PA04 (1ul << 4) /**< \brief PORT Mask for PA04 */ |
mbed_official | 592:a274ee790e56 | 14 | #define PIN_PA05 5 /**< \brief Pin Number for PA05 */ |
mbed_official | 592:a274ee790e56 | 15 | #define PORT_PA05 (1ul << 5) /**< \brief PORT Mask for PA05 */ |
mbed_official | 592:a274ee790e56 | 16 | #define PIN_PA06 6 /**< \brief Pin Number for PA06 */ |
mbed_official | 592:a274ee790e56 | 17 | #define PORT_PA06 (1ul << 6) /**< \brief PORT Mask for PA06 */ |
mbed_official | 592:a274ee790e56 | 18 | #define PIN_PA07 7 /**< \brief Pin Number for PA07 */ |
mbed_official | 592:a274ee790e56 | 19 | #define PORT_PA07 (1ul << 7) /**< \brief PORT Mask for PA07 */ |
mbed_official | 592:a274ee790e56 | 20 | #define PIN_PA08 8 /**< \brief Pin Number for PA08 */ |
mbed_official | 592:a274ee790e56 | 21 | #define PORT_PA08 (1ul << 8) /**< \brief PORT Mask for PA08 */ |
mbed_official | 592:a274ee790e56 | 22 | #define PIN_PA09 9 /**< \brief Pin Number for PA09 */ |
mbed_official | 592:a274ee790e56 | 23 | #define PORT_PA09 (1ul << 9) /**< \brief PORT Mask for PA09 */ |
mbed_official | 592:a274ee790e56 | 24 | #define PIN_PA10 10 /**< \brief Pin Number for PA10 */ |
mbed_official | 592:a274ee790e56 | 25 | #define PORT_PA10 (1ul << 10) /**< \brief PORT Mask for PA10 */ |
mbed_official | 592:a274ee790e56 | 26 | #define PIN_PA11 11 /**< \brief Pin Number for PA11 */ |
mbed_official | 592:a274ee790e56 | 27 | #define PORT_PA11 (1ul << 11) /**< \brief PORT Mask for PA11 */ |
mbed_official | 592:a274ee790e56 | 28 | #define PIN_PA12 12 /**< \brief Pin Number for PA12 */ |
mbed_official | 592:a274ee790e56 | 29 | #define PORT_PA12 (1ul << 12) /**< \brief PORT Mask for PA12 */ |
mbed_official | 592:a274ee790e56 | 30 | #define PIN_PA13 13 /**< \brief Pin Number for PA13 */ |
mbed_official | 592:a274ee790e56 | 31 | #define PORT_PA13 (1ul << 13) /**< \brief PORT Mask for PA13 */ |
mbed_official | 592:a274ee790e56 | 32 | #define PIN_PA14 14 /**< \brief Pin Number for PA14 */ |
mbed_official | 592:a274ee790e56 | 33 | #define PORT_PA14 (1ul << 14) /**< \brief PORT Mask for PA14 */ |
mbed_official | 592:a274ee790e56 | 34 | #define PIN_PA15 15 /**< \brief Pin Number for PA15 */ |
mbed_official | 592:a274ee790e56 | 35 | #define PORT_PA15 (1ul << 15) /**< \brief PORT Mask for PA15 */ |
mbed_official | 592:a274ee790e56 | 36 | #define PIN_PA16 16 /**< \brief Pin Number for PA16 */ |
mbed_official | 592:a274ee790e56 | 37 | #define PORT_PA16 (1ul << 16) /**< \brief PORT Mask for PA16 */ |
mbed_official | 592:a274ee790e56 | 38 | #define PIN_PA17 17 /**< \brief Pin Number for PA17 */ |
mbed_official | 592:a274ee790e56 | 39 | #define PORT_PA17 (1ul << 17) /**< \brief PORT Mask for PA17 */ |
mbed_official | 592:a274ee790e56 | 40 | #define PIN_PA18 18 /**< \brief Pin Number for PA18 */ |
mbed_official | 592:a274ee790e56 | 41 | #define PORT_PA18 (1ul << 18) /**< \brief PORT Mask for PA18 */ |
mbed_official | 592:a274ee790e56 | 42 | #define PIN_PA19 19 /**< \brief Pin Number for PA19 */ |
mbed_official | 592:a274ee790e56 | 43 | #define PORT_PA19 (1ul << 19) /**< \brief PORT Mask for PA19 */ |
mbed_official | 592:a274ee790e56 | 44 | #define PIN_PA20 20 /**< \brief Pin Number for PA20 */ |
mbed_official | 592:a274ee790e56 | 45 | #define PORT_PA20 (1ul << 20) /**< \brief PORT Mask for PA20 */ |
mbed_official | 592:a274ee790e56 | 46 | #define PIN_PA21 21 /**< \brief Pin Number for PA21 */ |
mbed_official | 592:a274ee790e56 | 47 | #define PORT_PA21 (1ul << 21) /**< \brief PORT Mask for PA21 */ |
mbed_official | 592:a274ee790e56 | 48 | #define PIN_PA22 22 /**< \brief Pin Number for PA22 */ |
mbed_official | 592:a274ee790e56 | 49 | #define PORT_PA22 (1ul << 22) /**< \brief PORT Mask for PA22 */ |
mbed_official | 592:a274ee790e56 | 50 | #define PIN_PA23 23 /**< \brief Pin Number for PA23 */ |
mbed_official | 592:a274ee790e56 | 51 | #define PORT_PA23 (1ul << 23) /**< \brief PORT Mask for PA23 */ |
mbed_official | 592:a274ee790e56 | 52 | #define PIN_PA24 24 /**< \brief Pin Number for PA24 */ |
mbed_official | 592:a274ee790e56 | 53 | #define PORT_PA24 (1ul << 24) /**< \brief PORT Mask for PA24 */ |
mbed_official | 592:a274ee790e56 | 54 | #define PIN_PA25 25 /**< \brief Pin Number for PA25 */ |
mbed_official | 592:a274ee790e56 | 55 | #define PORT_PA25 (1ul << 25) /**< \brief PORT Mask for PA25 */ |
mbed_official | 592:a274ee790e56 | 56 | #define PIN_PA27 27 /**< \brief Pin Number for PA27 */ |
mbed_official | 592:a274ee790e56 | 57 | #define PORT_PA27 (1ul << 27) /**< \brief PORT Mask for PA27 */ |
mbed_official | 592:a274ee790e56 | 58 | #define PIN_PA28 28 /**< \brief Pin Number for PA28 */ |
mbed_official | 592:a274ee790e56 | 59 | #define PORT_PA28 (1ul << 28) /**< \brief PORT Mask for PA28 */ |
mbed_official | 592:a274ee790e56 | 60 | #define PIN_PA30 30 /**< \brief Pin Number for PA30 */ |
mbed_official | 592:a274ee790e56 | 61 | #define PORT_PA30 (1ul << 30) /**< \brief PORT Mask for PA30 */ |
mbed_official | 592:a274ee790e56 | 62 | #define PIN_PA31 31 /**< \brief Pin Number for PA31 */ |
mbed_official | 592:a274ee790e56 | 63 | #define PORT_PA31 (1ul << 31) /**< \brief PORT Mask for PA31 */ |
mbed_official | 592:a274ee790e56 | 64 | #define PIN_PB00 32 /**< \brief Pin Number for PB00 */ |
mbed_official | 592:a274ee790e56 | 65 | #define PORT_PB00 (1ul << 0) /**< \brief PORT Mask for PB00 */ |
mbed_official | 592:a274ee790e56 | 66 | #define PIN_PB01 33 /**< \brief Pin Number for PB01 */ |
mbed_official | 592:a274ee790e56 | 67 | #define PORT_PB01 (1ul << 1) /**< \brief PORT Mask for PB01 */ |
mbed_official | 592:a274ee790e56 | 68 | #define PIN_PB02 34 /**< \brief Pin Number for PB02 */ |
mbed_official | 592:a274ee790e56 | 69 | #define PORT_PB02 (1ul << 2) /**< \brief PORT Mask for PB02 */ |
mbed_official | 592:a274ee790e56 | 70 | #define PIN_PB03 35 /**< \brief Pin Number for PB03 */ |
mbed_official | 592:a274ee790e56 | 71 | #define PORT_PB03 (1ul << 3) /**< \brief PORT Mask for PB03 */ |
mbed_official | 592:a274ee790e56 | 72 | #define PIN_PB04 36 /**< \brief Pin Number for PB04 */ |
mbed_official | 592:a274ee790e56 | 73 | #define PORT_PB04 (1ul << 4) /**< \brief PORT Mask for PB04 */ |
mbed_official | 592:a274ee790e56 | 74 | #define PIN_PB05 37 /**< \brief Pin Number for PB05 */ |
mbed_official | 592:a274ee790e56 | 75 | #define PORT_PB05 (1ul << 5) /**< \brief PORT Mask for PB05 */ |
mbed_official | 592:a274ee790e56 | 76 | #define PIN_PB06 38 /**< \brief Pin Number for PB06 */ |
mbed_official | 592:a274ee790e56 | 77 | #define PORT_PB06 (1ul << 6) /**< \brief PORT Mask for PB06 */ |
mbed_official | 592:a274ee790e56 | 78 | #define PIN_PB07 39 /**< \brief Pin Number for PB07 */ |
mbed_official | 592:a274ee790e56 | 79 | #define PORT_PB07 (1ul << 7) /**< \brief PORT Mask for PB07 */ |
mbed_official | 592:a274ee790e56 | 80 | #define PIN_PB08 40 /**< \brief Pin Number for PB08 */ |
mbed_official | 592:a274ee790e56 | 81 | #define PORT_PB08 (1ul << 8) /**< \brief PORT Mask for PB08 */ |
mbed_official | 592:a274ee790e56 | 82 | #define PIN_PB09 41 /**< \brief Pin Number for PB09 */ |
mbed_official | 592:a274ee790e56 | 83 | #define PORT_PB09 (1ul << 9) /**< \brief PORT Mask for PB09 */ |
mbed_official | 592:a274ee790e56 | 84 | #define PIN_PB10 42 /**< \brief Pin Number for PB10 */ |
mbed_official | 592:a274ee790e56 | 85 | #define PORT_PB10 (1ul << 10) /**< \brief PORT Mask for PB10 */ |
mbed_official | 592:a274ee790e56 | 86 | #define PIN_PB11 43 /**< \brief Pin Number for PB11 */ |
mbed_official | 592:a274ee790e56 | 87 | #define PORT_PB11 (1ul << 11) /**< \brief PORT Mask for PB11 */ |
mbed_official | 592:a274ee790e56 | 88 | #define PIN_PB12 44 /**< \brief Pin Number for PB12 */ |
mbed_official | 592:a274ee790e56 | 89 | #define PORT_PB12 (1ul << 12) /**< \brief PORT Mask for PB12 */ |
mbed_official | 592:a274ee790e56 | 90 | #define PIN_PB13 45 /**< \brief Pin Number for PB13 */ |
mbed_official | 592:a274ee790e56 | 91 | #define PORT_PB13 (1ul << 13) /**< \brief PORT Mask for PB13 */ |
mbed_official | 592:a274ee790e56 | 92 | #define PIN_PB14 46 /**< \brief Pin Number for PB14 */ |
mbed_official | 592:a274ee790e56 | 93 | #define PORT_PB14 (1ul << 14) /**< \brief PORT Mask for PB14 */ |
mbed_official | 592:a274ee790e56 | 94 | #define PIN_PB15 47 /**< \brief Pin Number for PB15 */ |
mbed_official | 592:a274ee790e56 | 95 | #define PORT_PB15 (1ul << 15) /**< \brief PORT Mask for PB15 */ |
mbed_official | 592:a274ee790e56 | 96 | #define PIN_PB16 48 /**< \brief Pin Number for PB16 */ |
mbed_official | 592:a274ee790e56 | 97 | #define PORT_PB16 (1ul << 16) /**< \brief PORT Mask for PB16 */ |
mbed_official | 592:a274ee790e56 | 98 | #define PIN_PB17 49 /**< \brief Pin Number for PB17 */ |
mbed_official | 592:a274ee790e56 | 99 | #define PORT_PB17 (1ul << 17) /**< \brief PORT Mask for PB17 */ |
mbed_official | 592:a274ee790e56 | 100 | #define PIN_PB22 54 /**< \brief Pin Number for PB22 */ |
mbed_official | 592:a274ee790e56 | 101 | #define PORT_PB22 (1ul << 22) /**< \brief PORT Mask for PB22 */ |
mbed_official | 592:a274ee790e56 | 102 | #define PIN_PB23 55 /**< \brief Pin Number for PB23 */ |
mbed_official | 592:a274ee790e56 | 103 | #define PORT_PB23 (1ul << 23) /**< \brief PORT Mask for PB23 */ |
mbed_official | 592:a274ee790e56 | 104 | #define PIN_PB30 62 /**< \brief Pin Number for PB30 */ |
mbed_official | 592:a274ee790e56 | 105 | #define PORT_PB30 (1ul << 30) /**< \brief PORT Mask for PB30 */ |
mbed_official | 592:a274ee790e56 | 106 | #define PIN_PB31 63 /**< \brief Pin Number for PB31 */ |
mbed_official | 592:a274ee790e56 | 107 | #define PORT_PB31 (1ul << 31) /**< \brief PORT Mask for PB31 */ |
mbed_official | 592:a274ee790e56 | 108 | /* ========== PORT definition for GCLK peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 109 | #define PIN_PB14H_GCLK_IO0 46L /**< \brief GCLK signal: IO0 on PB14 mux H */ |
mbed_official | 592:a274ee790e56 | 110 | #define MUX_PB14H_GCLK_IO0 7L |
mbed_official | 592:a274ee790e56 | 111 | #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0) |
mbed_official | 592:a274ee790e56 | 112 | #define PORT_PB14H_GCLK_IO0 (1ul << 14) |
mbed_official | 592:a274ee790e56 | 113 | #define PIN_PB22H_GCLK_IO0 54L /**< \brief GCLK signal: IO0 on PB22 mux H */ |
mbed_official | 592:a274ee790e56 | 114 | #define MUX_PB22H_GCLK_IO0 7L |
mbed_official | 592:a274ee790e56 | 115 | #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0) |
mbed_official | 592:a274ee790e56 | 116 | #define PORT_PB22H_GCLK_IO0 (1ul << 22) |
mbed_official | 592:a274ee790e56 | 117 | #define PIN_PA14H_GCLK_IO0 14L /**< \brief GCLK signal: IO0 on PA14 mux H */ |
mbed_official | 592:a274ee790e56 | 118 | #define MUX_PA14H_GCLK_IO0 7L |
mbed_official | 592:a274ee790e56 | 119 | #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0) |
mbed_official | 592:a274ee790e56 | 120 | #define PORT_PA14H_GCLK_IO0 (1ul << 14) |
mbed_official | 592:a274ee790e56 | 121 | #define PIN_PA27H_GCLK_IO0 27L /**< \brief GCLK signal: IO0 on PA27 mux H */ |
mbed_official | 592:a274ee790e56 | 122 | #define MUX_PA27H_GCLK_IO0 7L |
mbed_official | 592:a274ee790e56 | 123 | #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0) |
mbed_official | 592:a274ee790e56 | 124 | #define PORT_PA27H_GCLK_IO0 (1ul << 27) |
mbed_official | 592:a274ee790e56 | 125 | #define PIN_PA28H_GCLK_IO0 28L /**< \brief GCLK signal: IO0 on PA28 mux H */ |
mbed_official | 592:a274ee790e56 | 126 | #define MUX_PA28H_GCLK_IO0 7L |
mbed_official | 592:a274ee790e56 | 127 | #define PINMUX_PA28H_GCLK_IO0 ((PIN_PA28H_GCLK_IO0 << 16) | MUX_PA28H_GCLK_IO0) |
mbed_official | 592:a274ee790e56 | 128 | #define PORT_PA28H_GCLK_IO0 (1ul << 28) |
mbed_official | 592:a274ee790e56 | 129 | #define PIN_PA30H_GCLK_IO0 30L /**< \brief GCLK signal: IO0 on PA30 mux H */ |
mbed_official | 592:a274ee790e56 | 130 | #define MUX_PA30H_GCLK_IO0 7L |
mbed_official | 592:a274ee790e56 | 131 | #define PINMUX_PA30H_GCLK_IO0 ((PIN_PA30H_GCLK_IO0 << 16) | MUX_PA30H_GCLK_IO0) |
mbed_official | 592:a274ee790e56 | 132 | #define PORT_PA30H_GCLK_IO0 (1ul << 30) |
mbed_official | 592:a274ee790e56 | 133 | #define PIN_PB15H_GCLK_IO1 47L /**< \brief GCLK signal: IO1 on PB15 mux H */ |
mbed_official | 592:a274ee790e56 | 134 | #define MUX_PB15H_GCLK_IO1 7L |
mbed_official | 592:a274ee790e56 | 135 | #define PINMUX_PB15H_GCLK_IO1 ((PIN_PB15H_GCLK_IO1 << 16) | MUX_PB15H_GCLK_IO1) |
mbed_official | 592:a274ee790e56 | 136 | #define PORT_PB15H_GCLK_IO1 (1ul << 15) |
mbed_official | 592:a274ee790e56 | 137 | #define PIN_PB23H_GCLK_IO1 55L /**< \brief GCLK signal: IO1 on PB23 mux H */ |
mbed_official | 592:a274ee790e56 | 138 | #define MUX_PB23H_GCLK_IO1 7L |
mbed_official | 592:a274ee790e56 | 139 | #define PINMUX_PB23H_GCLK_IO1 ((PIN_PB23H_GCLK_IO1 << 16) | MUX_PB23H_GCLK_IO1) |
mbed_official | 592:a274ee790e56 | 140 | #define PORT_PB23H_GCLK_IO1 (1ul << 23) |
mbed_official | 592:a274ee790e56 | 141 | #define PIN_PA15H_GCLK_IO1 15L /**< \brief GCLK signal: IO1 on PA15 mux H */ |
mbed_official | 592:a274ee790e56 | 142 | #define MUX_PA15H_GCLK_IO1 7L |
mbed_official | 592:a274ee790e56 | 143 | #define PINMUX_PA15H_GCLK_IO1 ((PIN_PA15H_GCLK_IO1 << 16) | MUX_PA15H_GCLK_IO1) |
mbed_official | 592:a274ee790e56 | 144 | #define PORT_PA15H_GCLK_IO1 (1ul << 15) |
mbed_official | 592:a274ee790e56 | 145 | #define PIN_PB16H_GCLK_IO2 48L /**< \brief GCLK signal: IO2 on PB16 mux H */ |
mbed_official | 592:a274ee790e56 | 146 | #define MUX_PB16H_GCLK_IO2 7L |
mbed_official | 592:a274ee790e56 | 147 | #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2) |
mbed_official | 592:a274ee790e56 | 148 | #define PORT_PB16H_GCLK_IO2 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 149 | #define PIN_PA16H_GCLK_IO2 16L /**< \brief GCLK signal: IO2 on PA16 mux H */ |
mbed_official | 592:a274ee790e56 | 150 | #define MUX_PA16H_GCLK_IO2 7L |
mbed_official | 592:a274ee790e56 | 151 | #define PINMUX_PA16H_GCLK_IO2 ((PIN_PA16H_GCLK_IO2 << 16) | MUX_PA16H_GCLK_IO2) |
mbed_official | 592:a274ee790e56 | 152 | #define PORT_PA16H_GCLK_IO2 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 153 | #define PIN_PA17H_GCLK_IO3 17L /**< \brief GCLK signal: IO3 on PA17 mux H */ |
mbed_official | 592:a274ee790e56 | 154 | #define MUX_PA17H_GCLK_IO3 7L |
mbed_official | 592:a274ee790e56 | 155 | #define PINMUX_PA17H_GCLK_IO3 ((PIN_PA17H_GCLK_IO3 << 16) | MUX_PA17H_GCLK_IO3) |
mbed_official | 592:a274ee790e56 | 156 | #define PORT_PA17H_GCLK_IO3 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 157 | #define PIN_PB17H_GCLK_IO3 49L /**< \brief GCLK signal: IO3 on PB17 mux H */ |
mbed_official | 592:a274ee790e56 | 158 | #define MUX_PB17H_GCLK_IO3 7L |
mbed_official | 592:a274ee790e56 | 159 | #define PINMUX_PB17H_GCLK_IO3 ((PIN_PB17H_GCLK_IO3 << 16) | MUX_PB17H_GCLK_IO3) |
mbed_official | 592:a274ee790e56 | 160 | #define PORT_PB17H_GCLK_IO3 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 161 | #define PIN_PA10H_GCLK_IO4 10L /**< \brief GCLK signal: IO4 on PA10 mux H */ |
mbed_official | 592:a274ee790e56 | 162 | #define MUX_PA10H_GCLK_IO4 7L |
mbed_official | 592:a274ee790e56 | 163 | #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4) |
mbed_official | 592:a274ee790e56 | 164 | #define PORT_PA10H_GCLK_IO4 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 165 | #define PIN_PA20H_GCLK_IO4 20L /**< \brief GCLK signal: IO4 on PA20 mux H */ |
mbed_official | 592:a274ee790e56 | 166 | #define MUX_PA20H_GCLK_IO4 7L |
mbed_official | 592:a274ee790e56 | 167 | #define PINMUX_PA20H_GCLK_IO4 ((PIN_PA20H_GCLK_IO4 << 16) | MUX_PA20H_GCLK_IO4) |
mbed_official | 592:a274ee790e56 | 168 | #define PORT_PA20H_GCLK_IO4 (1ul << 20) |
mbed_official | 592:a274ee790e56 | 169 | #define PIN_PB10H_GCLK_IO4 42L /**< \brief GCLK signal: IO4 on PB10 mux H */ |
mbed_official | 592:a274ee790e56 | 170 | #define MUX_PB10H_GCLK_IO4 7L |
mbed_official | 592:a274ee790e56 | 171 | #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4) |
mbed_official | 592:a274ee790e56 | 172 | #define PORT_PB10H_GCLK_IO4 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 173 | #define PIN_PA11H_GCLK_IO5 11L /**< \brief GCLK signal: IO5 on PA11 mux H */ |
mbed_official | 592:a274ee790e56 | 174 | #define MUX_PA11H_GCLK_IO5 7L |
mbed_official | 592:a274ee790e56 | 175 | #define PINMUX_PA11H_GCLK_IO5 ((PIN_PA11H_GCLK_IO5 << 16) | MUX_PA11H_GCLK_IO5) |
mbed_official | 592:a274ee790e56 | 176 | #define PORT_PA11H_GCLK_IO5 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 177 | #define PIN_PA21H_GCLK_IO5 21L /**< \brief GCLK signal: IO5 on PA21 mux H */ |
mbed_official | 592:a274ee790e56 | 178 | #define MUX_PA21H_GCLK_IO5 7L |
mbed_official | 592:a274ee790e56 | 179 | #define PINMUX_PA21H_GCLK_IO5 ((PIN_PA21H_GCLK_IO5 << 16) | MUX_PA21H_GCLK_IO5) |
mbed_official | 592:a274ee790e56 | 180 | #define PORT_PA21H_GCLK_IO5 (1ul << 21) |
mbed_official | 592:a274ee790e56 | 181 | #define PIN_PB11H_GCLK_IO5 43L /**< \brief GCLK signal: IO5 on PB11 mux H */ |
mbed_official | 592:a274ee790e56 | 182 | #define MUX_PB11H_GCLK_IO5 7L |
mbed_official | 592:a274ee790e56 | 183 | #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5) |
mbed_official | 592:a274ee790e56 | 184 | #define PORT_PB11H_GCLK_IO5 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 185 | #define PIN_PA22H_GCLK_IO6 22L /**< \brief GCLK signal: IO6 on PA22 mux H */ |
mbed_official | 592:a274ee790e56 | 186 | #define MUX_PA22H_GCLK_IO6 7L |
mbed_official | 592:a274ee790e56 | 187 | #define PINMUX_PA22H_GCLK_IO6 ((PIN_PA22H_GCLK_IO6 << 16) | MUX_PA22H_GCLK_IO6) |
mbed_official | 592:a274ee790e56 | 188 | #define PORT_PA22H_GCLK_IO6 (1ul << 22) |
mbed_official | 592:a274ee790e56 | 189 | #define PIN_PB12H_GCLK_IO6 44L /**< \brief GCLK signal: IO6 on PB12 mux H */ |
mbed_official | 592:a274ee790e56 | 190 | #define MUX_PB12H_GCLK_IO6 7L |
mbed_official | 592:a274ee790e56 | 191 | #define PINMUX_PB12H_GCLK_IO6 ((PIN_PB12H_GCLK_IO6 << 16) | MUX_PB12H_GCLK_IO6) |
mbed_official | 592:a274ee790e56 | 192 | #define PORT_PB12H_GCLK_IO6 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 193 | #define PIN_PA23H_GCLK_IO7 23L /**< \brief GCLK signal: IO7 on PA23 mux H */ |
mbed_official | 592:a274ee790e56 | 194 | #define MUX_PA23H_GCLK_IO7 7L |
mbed_official | 592:a274ee790e56 | 195 | #define PINMUX_PA23H_GCLK_IO7 ((PIN_PA23H_GCLK_IO7 << 16) | MUX_PA23H_GCLK_IO7) |
mbed_official | 592:a274ee790e56 | 196 | #define PORT_PA23H_GCLK_IO7 (1ul << 23) |
mbed_official | 592:a274ee790e56 | 197 | #define PIN_PB13H_GCLK_IO7 45L /**< \brief GCLK signal: IO7 on PB13 mux H */ |
mbed_official | 592:a274ee790e56 | 198 | #define MUX_PB13H_GCLK_IO7 7L |
mbed_official | 592:a274ee790e56 | 199 | #define PINMUX_PB13H_GCLK_IO7 ((PIN_PB13H_GCLK_IO7 << 16) | MUX_PB13H_GCLK_IO7) |
mbed_official | 592:a274ee790e56 | 200 | #define PORT_PB13H_GCLK_IO7 (1ul << 13) |
mbed_official | 592:a274ee790e56 | 201 | /* ========== PORT definition for EIC peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 202 | #define PIN_PA16A_EIC_EXTINT0 16L /**< \brief EIC signal: EXTINT0 on PA16 mux A */ |
mbed_official | 592:a274ee790e56 | 203 | #define MUX_PA16A_EIC_EXTINT0 0L |
mbed_official | 592:a274ee790e56 | 204 | #define PINMUX_PA16A_EIC_EXTINT0 ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0) |
mbed_official | 592:a274ee790e56 | 205 | #define PORT_PA16A_EIC_EXTINT0 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 206 | #define PIN_PB00A_EIC_EXTINT0 32L /**< \brief EIC signal: EXTINT0 on PB00 mux A */ |
mbed_official | 592:a274ee790e56 | 207 | #define MUX_PB00A_EIC_EXTINT0 0L |
mbed_official | 592:a274ee790e56 | 208 | #define PINMUX_PB00A_EIC_EXTINT0 ((PIN_PB00A_EIC_EXTINT0 << 16) | MUX_PB00A_EIC_EXTINT0) |
mbed_official | 592:a274ee790e56 | 209 | #define PORT_PB00A_EIC_EXTINT0 (1ul << 0) |
mbed_official | 592:a274ee790e56 | 210 | #define PIN_PB16A_EIC_EXTINT0 48L /**< \brief EIC signal: EXTINT0 on PB16 mux A */ |
mbed_official | 592:a274ee790e56 | 211 | #define MUX_PB16A_EIC_EXTINT0 0L |
mbed_official | 592:a274ee790e56 | 212 | #define PINMUX_PB16A_EIC_EXTINT0 ((PIN_PB16A_EIC_EXTINT0 << 16) | MUX_PB16A_EIC_EXTINT0) |
mbed_official | 592:a274ee790e56 | 213 | #define PORT_PB16A_EIC_EXTINT0 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 214 | #define PIN_PA00A_EIC_EXTINT0 0L /**< \brief EIC signal: EXTINT0 on PA00 mux A */ |
mbed_official | 592:a274ee790e56 | 215 | #define MUX_PA00A_EIC_EXTINT0 0L |
mbed_official | 592:a274ee790e56 | 216 | #define PINMUX_PA00A_EIC_EXTINT0 ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0) |
mbed_official | 592:a274ee790e56 | 217 | #define PORT_PA00A_EIC_EXTINT0 (1ul << 0) |
mbed_official | 592:a274ee790e56 | 218 | #define PIN_PA17A_EIC_EXTINT1 17L /**< \brief EIC signal: EXTINT1 on PA17 mux A */ |
mbed_official | 592:a274ee790e56 | 219 | #define MUX_PA17A_EIC_EXTINT1 0L |
mbed_official | 592:a274ee790e56 | 220 | #define PINMUX_PA17A_EIC_EXTINT1 ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1) |
mbed_official | 592:a274ee790e56 | 221 | #define PORT_PA17A_EIC_EXTINT1 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 222 | #define PIN_PB01A_EIC_EXTINT1 33L /**< \brief EIC signal: EXTINT1 on PB01 mux A */ |
mbed_official | 592:a274ee790e56 | 223 | #define MUX_PB01A_EIC_EXTINT1 0L |
mbed_official | 592:a274ee790e56 | 224 | #define PINMUX_PB01A_EIC_EXTINT1 ((PIN_PB01A_EIC_EXTINT1 << 16) | MUX_PB01A_EIC_EXTINT1) |
mbed_official | 592:a274ee790e56 | 225 | #define PORT_PB01A_EIC_EXTINT1 (1ul << 1) |
mbed_official | 592:a274ee790e56 | 226 | #define PIN_PB17A_EIC_EXTINT1 49L /**< \brief EIC signal: EXTINT1 on PB17 mux A */ |
mbed_official | 592:a274ee790e56 | 227 | #define MUX_PB17A_EIC_EXTINT1 0L |
mbed_official | 592:a274ee790e56 | 228 | #define PINMUX_PB17A_EIC_EXTINT1 ((PIN_PB17A_EIC_EXTINT1 << 16) | MUX_PB17A_EIC_EXTINT1) |
mbed_official | 592:a274ee790e56 | 229 | #define PORT_PB17A_EIC_EXTINT1 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 230 | #define PIN_PA01A_EIC_EXTINT1 1L /**< \brief EIC signal: EXTINT1 on PA01 mux A */ |
mbed_official | 592:a274ee790e56 | 231 | #define MUX_PA01A_EIC_EXTINT1 0L |
mbed_official | 592:a274ee790e56 | 232 | #define PINMUX_PA01A_EIC_EXTINT1 ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1) |
mbed_official | 592:a274ee790e56 | 233 | #define PORT_PA01A_EIC_EXTINT1 (1ul << 1) |
mbed_official | 592:a274ee790e56 | 234 | #define PIN_PA18A_EIC_EXTINT2 18L /**< \brief EIC signal: EXTINT2 on PA18 mux A */ |
mbed_official | 592:a274ee790e56 | 235 | #define MUX_PA18A_EIC_EXTINT2 0L |
mbed_official | 592:a274ee790e56 | 236 | #define PINMUX_PA18A_EIC_EXTINT2 ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2) |
mbed_official | 592:a274ee790e56 | 237 | #define PORT_PA18A_EIC_EXTINT2 (1ul << 18) |
mbed_official | 592:a274ee790e56 | 238 | #define PIN_PA02A_EIC_EXTINT2 2L /**< \brief EIC signal: EXTINT2 on PA02 mux A */ |
mbed_official | 592:a274ee790e56 | 239 | #define MUX_PA02A_EIC_EXTINT2 0L |
mbed_official | 592:a274ee790e56 | 240 | #define PINMUX_PA02A_EIC_EXTINT2 ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2) |
mbed_official | 592:a274ee790e56 | 241 | #define PORT_PA02A_EIC_EXTINT2 (1ul << 2) |
mbed_official | 592:a274ee790e56 | 242 | #define PIN_PB02A_EIC_EXTINT2 34L /**< \brief EIC signal: EXTINT2 on PB02 mux A */ |
mbed_official | 592:a274ee790e56 | 243 | #define MUX_PB02A_EIC_EXTINT2 0L |
mbed_official | 592:a274ee790e56 | 244 | #define PINMUX_PB02A_EIC_EXTINT2 ((PIN_PB02A_EIC_EXTINT2 << 16) | MUX_PB02A_EIC_EXTINT2) |
mbed_official | 592:a274ee790e56 | 245 | #define PORT_PB02A_EIC_EXTINT2 (1ul << 2) |
mbed_official | 592:a274ee790e56 | 246 | #define PIN_PA03A_EIC_EXTINT3 3L /**< \brief EIC signal: EXTINT3 on PA03 mux A */ |
mbed_official | 592:a274ee790e56 | 247 | #define MUX_PA03A_EIC_EXTINT3 0L |
mbed_official | 592:a274ee790e56 | 248 | #define PINMUX_PA03A_EIC_EXTINT3 ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3) |
mbed_official | 592:a274ee790e56 | 249 | #define PORT_PA03A_EIC_EXTINT3 (1ul << 3) |
mbed_official | 592:a274ee790e56 | 250 | #define PIN_PA19A_EIC_EXTINT3 19L /**< \brief EIC signal: EXTINT3 on PA19 mux A */ |
mbed_official | 592:a274ee790e56 | 251 | #define MUX_PA19A_EIC_EXTINT3 0L |
mbed_official | 592:a274ee790e56 | 252 | #define PINMUX_PA19A_EIC_EXTINT3 ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3) |
mbed_official | 592:a274ee790e56 | 253 | #define PORT_PA19A_EIC_EXTINT3 (1ul << 19) |
mbed_official | 592:a274ee790e56 | 254 | #define PIN_PB03A_EIC_EXTINT3 35L /**< \brief EIC signal: EXTINT3 on PB03 mux A */ |
mbed_official | 592:a274ee790e56 | 255 | #define MUX_PB03A_EIC_EXTINT3 0L |
mbed_official | 592:a274ee790e56 | 256 | #define PINMUX_PB03A_EIC_EXTINT3 ((PIN_PB03A_EIC_EXTINT3 << 16) | MUX_PB03A_EIC_EXTINT3) |
mbed_official | 592:a274ee790e56 | 257 | #define PORT_PB03A_EIC_EXTINT3 (1ul << 3) |
mbed_official | 592:a274ee790e56 | 258 | #define PIN_PA04A_EIC_EXTINT4 4L /**< \brief EIC signal: EXTINT4 on PA04 mux A */ |
mbed_official | 592:a274ee790e56 | 259 | #define MUX_PA04A_EIC_EXTINT4 0L |
mbed_official | 592:a274ee790e56 | 260 | #define PINMUX_PA04A_EIC_EXTINT4 ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4) |
mbed_official | 592:a274ee790e56 | 261 | #define PORT_PA04A_EIC_EXTINT4 (1ul << 4) |
mbed_official | 592:a274ee790e56 | 262 | #define PIN_PA20A_EIC_EXTINT4 20L /**< \brief EIC signal: EXTINT4 on PA20 mux A */ |
mbed_official | 592:a274ee790e56 | 263 | #define MUX_PA20A_EIC_EXTINT4 0L |
mbed_official | 592:a274ee790e56 | 264 | #define PINMUX_PA20A_EIC_EXTINT4 ((PIN_PA20A_EIC_EXTINT4 << 16) | MUX_PA20A_EIC_EXTINT4) |
mbed_official | 592:a274ee790e56 | 265 | #define PORT_PA20A_EIC_EXTINT4 (1ul << 20) |
mbed_official | 592:a274ee790e56 | 266 | #define PIN_PB04A_EIC_EXTINT4 36L /**< \brief EIC signal: EXTINT4 on PB04 mux A */ |
mbed_official | 592:a274ee790e56 | 267 | #define MUX_PB04A_EIC_EXTINT4 0L |
mbed_official | 592:a274ee790e56 | 268 | #define PINMUX_PB04A_EIC_EXTINT4 ((PIN_PB04A_EIC_EXTINT4 << 16) | MUX_PB04A_EIC_EXTINT4) |
mbed_official | 592:a274ee790e56 | 269 | #define PORT_PB04A_EIC_EXTINT4 (1ul << 4) |
mbed_official | 592:a274ee790e56 | 270 | #define PIN_PA05A_EIC_EXTINT5 5L /**< \brief EIC signal: EXTINT5 on PA05 mux A */ |
mbed_official | 592:a274ee790e56 | 271 | #define MUX_PA05A_EIC_EXTINT5 0L |
mbed_official | 592:a274ee790e56 | 272 | #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5) |
mbed_official | 592:a274ee790e56 | 273 | #define PORT_PA05A_EIC_EXTINT5 (1ul << 5) |
mbed_official | 592:a274ee790e56 | 274 | #define PIN_PA21A_EIC_EXTINT5 21L /**< \brief EIC signal: EXTINT5 on PA21 mux A */ |
mbed_official | 592:a274ee790e56 | 275 | #define MUX_PA21A_EIC_EXTINT5 0L |
mbed_official | 592:a274ee790e56 | 276 | #define PINMUX_PA21A_EIC_EXTINT5 ((PIN_PA21A_EIC_EXTINT5 << 16) | MUX_PA21A_EIC_EXTINT5) |
mbed_official | 592:a274ee790e56 | 277 | #define PORT_PA21A_EIC_EXTINT5 (1ul << 21) |
mbed_official | 592:a274ee790e56 | 278 | #define PIN_PB05A_EIC_EXTINT5 37L /**< \brief EIC signal: EXTINT5 on PB05 mux A */ |
mbed_official | 592:a274ee790e56 | 279 | #define MUX_PB05A_EIC_EXTINT5 0L |
mbed_official | 592:a274ee790e56 | 280 | #define PINMUX_PB05A_EIC_EXTINT5 ((PIN_PB05A_EIC_EXTINT5 << 16) | MUX_PB05A_EIC_EXTINT5) |
mbed_official | 592:a274ee790e56 | 281 | #define PORT_PB05A_EIC_EXTINT5 (1ul << 5) |
mbed_official | 592:a274ee790e56 | 282 | #define PIN_PA06A_EIC_EXTINT6 6L /**< \brief EIC signal: EXTINT6 on PA06 mux A */ |
mbed_official | 592:a274ee790e56 | 283 | #define MUX_PA06A_EIC_EXTINT6 0L |
mbed_official | 592:a274ee790e56 | 284 | #define PINMUX_PA06A_EIC_EXTINT6 ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6) |
mbed_official | 592:a274ee790e56 | 285 | #define PORT_PA06A_EIC_EXTINT6 (1ul << 6) |
mbed_official | 592:a274ee790e56 | 286 | #define PIN_PA22A_EIC_EXTINT6 22L /**< \brief EIC signal: EXTINT6 on PA22 mux A */ |
mbed_official | 592:a274ee790e56 | 287 | #define MUX_PA22A_EIC_EXTINT6 0L |
mbed_official | 592:a274ee790e56 | 288 | #define PINMUX_PA22A_EIC_EXTINT6 ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6) |
mbed_official | 592:a274ee790e56 | 289 | #define PORT_PA22A_EIC_EXTINT6 (1ul << 22) |
mbed_official | 592:a274ee790e56 | 290 | #define PIN_PB06A_EIC_EXTINT6 38L /**< \brief EIC signal: EXTINT6 on PB06 mux A */ |
mbed_official | 592:a274ee790e56 | 291 | #define MUX_PB06A_EIC_EXTINT6 0L |
mbed_official | 592:a274ee790e56 | 292 | #define PINMUX_PB06A_EIC_EXTINT6 ((PIN_PB06A_EIC_EXTINT6 << 16) | MUX_PB06A_EIC_EXTINT6) |
mbed_official | 592:a274ee790e56 | 293 | #define PORT_PB06A_EIC_EXTINT6 (1ul << 6) |
mbed_official | 592:a274ee790e56 | 294 | #define PIN_PB22A_EIC_EXTINT6 54L /**< \brief EIC signal: EXTINT6 on PB22 mux A */ |
mbed_official | 592:a274ee790e56 | 295 | #define MUX_PB22A_EIC_EXTINT6 0L |
mbed_official | 592:a274ee790e56 | 296 | #define PINMUX_PB22A_EIC_EXTINT6 ((PIN_PB22A_EIC_EXTINT6 << 16) | MUX_PB22A_EIC_EXTINT6) |
mbed_official | 592:a274ee790e56 | 297 | #define PORT_PB22A_EIC_EXTINT6 (1ul << 22) |
mbed_official | 592:a274ee790e56 | 298 | #define PIN_PA07A_EIC_EXTINT7 7L /**< \brief EIC signal: EXTINT7 on PA07 mux A */ |
mbed_official | 592:a274ee790e56 | 299 | #define MUX_PA07A_EIC_EXTINT7 0L |
mbed_official | 592:a274ee790e56 | 300 | #define PINMUX_PA07A_EIC_EXTINT7 ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7) |
mbed_official | 592:a274ee790e56 | 301 | #define PORT_PA07A_EIC_EXTINT7 (1ul << 7) |
mbed_official | 592:a274ee790e56 | 302 | #define PIN_PA23A_EIC_EXTINT7 23L /**< \brief EIC signal: EXTINT7 on PA23 mux A */ |
mbed_official | 592:a274ee790e56 | 303 | #define MUX_PA23A_EIC_EXTINT7 0L |
mbed_official | 592:a274ee790e56 | 304 | #define PINMUX_PA23A_EIC_EXTINT7 ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7) |
mbed_official | 592:a274ee790e56 | 305 | #define PORT_PA23A_EIC_EXTINT7 (1ul << 23) |
mbed_official | 592:a274ee790e56 | 306 | #define PIN_PB07A_EIC_EXTINT7 39L /**< \brief EIC signal: EXTINT7 on PB07 mux A */ |
mbed_official | 592:a274ee790e56 | 307 | #define MUX_PB07A_EIC_EXTINT7 0L |
mbed_official | 592:a274ee790e56 | 308 | #define PINMUX_PB07A_EIC_EXTINT7 ((PIN_PB07A_EIC_EXTINT7 << 16) | MUX_PB07A_EIC_EXTINT7) |
mbed_official | 592:a274ee790e56 | 309 | #define PORT_PB07A_EIC_EXTINT7 (1ul << 7) |
mbed_official | 592:a274ee790e56 | 310 | #define PIN_PB23A_EIC_EXTINT7 55L /**< \brief EIC signal: EXTINT7 on PB23 mux A */ |
mbed_official | 592:a274ee790e56 | 311 | #define MUX_PB23A_EIC_EXTINT7 0L |
mbed_official | 592:a274ee790e56 | 312 | #define PINMUX_PB23A_EIC_EXTINT7 ((PIN_PB23A_EIC_EXTINT7 << 16) | MUX_PB23A_EIC_EXTINT7) |
mbed_official | 592:a274ee790e56 | 313 | #define PORT_PB23A_EIC_EXTINT7 (1ul << 23) |
mbed_official | 592:a274ee790e56 | 314 | #define PIN_PA28A_EIC_EXTINT8 28L /**< \brief EIC signal: EXTINT8 on PA28 mux A */ |
mbed_official | 592:a274ee790e56 | 315 | #define MUX_PA28A_EIC_EXTINT8 0L |
mbed_official | 592:a274ee790e56 | 316 | #define PINMUX_PA28A_EIC_EXTINT8 ((PIN_PA28A_EIC_EXTINT8 << 16) | MUX_PA28A_EIC_EXTINT8) |
mbed_official | 592:a274ee790e56 | 317 | #define PORT_PA28A_EIC_EXTINT8 (1ul << 28) |
mbed_official | 592:a274ee790e56 | 318 | #define PIN_PB08A_EIC_EXTINT8 40L /**< \brief EIC signal: EXTINT8 on PB08 mux A */ |
mbed_official | 592:a274ee790e56 | 319 | #define MUX_PB08A_EIC_EXTINT8 0L |
mbed_official | 592:a274ee790e56 | 320 | #define PINMUX_PB08A_EIC_EXTINT8 ((PIN_PB08A_EIC_EXTINT8 << 16) | MUX_PB08A_EIC_EXTINT8) |
mbed_official | 592:a274ee790e56 | 321 | #define PORT_PB08A_EIC_EXTINT8 (1ul << 8) |
mbed_official | 592:a274ee790e56 | 322 | #define PIN_PA09A_EIC_EXTINT9 9L /**< \brief EIC signal: EXTINT9 on PA09 mux A */ |
mbed_official | 592:a274ee790e56 | 323 | #define MUX_PA09A_EIC_EXTINT9 0L |
mbed_official | 592:a274ee790e56 | 324 | #define PINMUX_PA09A_EIC_EXTINT9 ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9) |
mbed_official | 592:a274ee790e56 | 325 | #define PORT_PA09A_EIC_EXTINT9 (1ul << 9) |
mbed_official | 592:a274ee790e56 | 326 | #define PIN_PB09A_EIC_EXTINT9 41L /**< \brief EIC signal: EXTINT9 on PB09 mux A */ |
mbed_official | 592:a274ee790e56 | 327 | #define MUX_PB09A_EIC_EXTINT9 0L |
mbed_official | 592:a274ee790e56 | 328 | #define PINMUX_PB09A_EIC_EXTINT9 ((PIN_PB09A_EIC_EXTINT9 << 16) | MUX_PB09A_EIC_EXTINT9) |
mbed_official | 592:a274ee790e56 | 329 | #define PORT_PB09A_EIC_EXTINT9 (1ul << 9) |
mbed_official | 592:a274ee790e56 | 330 | #define PIN_PA10A_EIC_EXTINT10 10L /**< \brief EIC signal: EXTINT10 on PA10 mux A */ |
mbed_official | 592:a274ee790e56 | 331 | #define MUX_PA10A_EIC_EXTINT10 0L |
mbed_official | 592:a274ee790e56 | 332 | #define PINMUX_PA10A_EIC_EXTINT10 ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10) |
mbed_official | 592:a274ee790e56 | 333 | #define PORT_PA10A_EIC_EXTINT10 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 334 | #define PIN_PA30A_EIC_EXTINT10 30L /**< \brief EIC signal: EXTINT10 on PA30 mux A */ |
mbed_official | 592:a274ee790e56 | 335 | #define MUX_PA30A_EIC_EXTINT10 0L |
mbed_official | 592:a274ee790e56 | 336 | #define PINMUX_PA30A_EIC_EXTINT10 ((PIN_PA30A_EIC_EXTINT10 << 16) | MUX_PA30A_EIC_EXTINT10) |
mbed_official | 592:a274ee790e56 | 337 | #define PORT_PA30A_EIC_EXTINT10 (1ul << 30) |
mbed_official | 592:a274ee790e56 | 338 | #define PIN_PB10A_EIC_EXTINT10 42L /**< \brief EIC signal: EXTINT10 on PB10 mux A */ |
mbed_official | 592:a274ee790e56 | 339 | #define MUX_PB10A_EIC_EXTINT10 0L |
mbed_official | 592:a274ee790e56 | 340 | #define PINMUX_PB10A_EIC_EXTINT10 ((PIN_PB10A_EIC_EXTINT10 << 16) | MUX_PB10A_EIC_EXTINT10) |
mbed_official | 592:a274ee790e56 | 341 | #define PORT_PB10A_EIC_EXTINT10 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 342 | #define PIN_PA11A_EIC_EXTINT11 11L /**< \brief EIC signal: EXTINT11 on PA11 mux A */ |
mbed_official | 592:a274ee790e56 | 343 | #define MUX_PA11A_EIC_EXTINT11 0L |
mbed_official | 592:a274ee790e56 | 344 | #define PINMUX_PA11A_EIC_EXTINT11 ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11) |
mbed_official | 592:a274ee790e56 | 345 | #define PORT_PA11A_EIC_EXTINT11 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 346 | #define PIN_PA31A_EIC_EXTINT11 31L /**< \brief EIC signal: EXTINT11 on PA31 mux A */ |
mbed_official | 592:a274ee790e56 | 347 | #define MUX_PA31A_EIC_EXTINT11 0L |
mbed_official | 592:a274ee790e56 | 348 | #define PINMUX_PA31A_EIC_EXTINT11 ((PIN_PA31A_EIC_EXTINT11 << 16) | MUX_PA31A_EIC_EXTINT11) |
mbed_official | 592:a274ee790e56 | 349 | #define PORT_PA31A_EIC_EXTINT11 (1ul << 31) |
mbed_official | 592:a274ee790e56 | 350 | #define PIN_PB11A_EIC_EXTINT11 43L /**< \brief EIC signal: EXTINT11 on PB11 mux A */ |
mbed_official | 592:a274ee790e56 | 351 | #define MUX_PB11A_EIC_EXTINT11 0L |
mbed_official | 592:a274ee790e56 | 352 | #define PINMUX_PB11A_EIC_EXTINT11 ((PIN_PB11A_EIC_EXTINT11 << 16) | MUX_PB11A_EIC_EXTINT11) |
mbed_official | 592:a274ee790e56 | 353 | #define PORT_PB11A_EIC_EXTINT11 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 354 | #define PIN_PA12A_EIC_EXTINT12 12L /**< \brief EIC signal: EXTINT12 on PA12 mux A */ |
mbed_official | 592:a274ee790e56 | 355 | #define MUX_PA12A_EIC_EXTINT12 0L |
mbed_official | 592:a274ee790e56 | 356 | #define PINMUX_PA12A_EIC_EXTINT12 ((PIN_PA12A_EIC_EXTINT12 << 16) | MUX_PA12A_EIC_EXTINT12) |
mbed_official | 592:a274ee790e56 | 357 | #define PORT_PA12A_EIC_EXTINT12 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 358 | #define PIN_PA24A_EIC_EXTINT12 24L /**< \brief EIC signal: EXTINT12 on PA24 mux A */ |
mbed_official | 592:a274ee790e56 | 359 | #define MUX_PA24A_EIC_EXTINT12 0L |
mbed_official | 592:a274ee790e56 | 360 | #define PINMUX_PA24A_EIC_EXTINT12 ((PIN_PA24A_EIC_EXTINT12 << 16) | MUX_PA24A_EIC_EXTINT12) |
mbed_official | 592:a274ee790e56 | 361 | #define PORT_PA24A_EIC_EXTINT12 (1ul << 24) |
mbed_official | 592:a274ee790e56 | 362 | #define PIN_PB12A_EIC_EXTINT12 44L /**< \brief EIC signal: EXTINT12 on PB12 mux A */ |
mbed_official | 592:a274ee790e56 | 363 | #define MUX_PB12A_EIC_EXTINT12 0L |
mbed_official | 592:a274ee790e56 | 364 | #define PINMUX_PB12A_EIC_EXTINT12 ((PIN_PB12A_EIC_EXTINT12 << 16) | MUX_PB12A_EIC_EXTINT12) |
mbed_official | 592:a274ee790e56 | 365 | #define PORT_PB12A_EIC_EXTINT12 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 366 | #define PIN_PA13A_EIC_EXTINT13 13L /**< \brief EIC signal: EXTINT13 on PA13 mux A */ |
mbed_official | 592:a274ee790e56 | 367 | #define MUX_PA13A_EIC_EXTINT13 0L |
mbed_official | 592:a274ee790e56 | 368 | #define PINMUX_PA13A_EIC_EXTINT13 ((PIN_PA13A_EIC_EXTINT13 << 16) | MUX_PA13A_EIC_EXTINT13) |
mbed_official | 592:a274ee790e56 | 369 | #define PORT_PA13A_EIC_EXTINT13 (1ul << 13) |
mbed_official | 592:a274ee790e56 | 370 | #define PIN_PA25A_EIC_EXTINT13 25L /**< \brief EIC signal: EXTINT13 on PA25 mux A */ |
mbed_official | 592:a274ee790e56 | 371 | #define MUX_PA25A_EIC_EXTINT13 0L |
mbed_official | 592:a274ee790e56 | 372 | #define PINMUX_PA25A_EIC_EXTINT13 ((PIN_PA25A_EIC_EXTINT13 << 16) | MUX_PA25A_EIC_EXTINT13) |
mbed_official | 592:a274ee790e56 | 373 | #define PORT_PA25A_EIC_EXTINT13 (1ul << 25) |
mbed_official | 592:a274ee790e56 | 374 | #define PIN_PB13A_EIC_EXTINT13 45L /**< \brief EIC signal: EXTINT13 on PB13 mux A */ |
mbed_official | 592:a274ee790e56 | 375 | #define MUX_PB13A_EIC_EXTINT13 0L |
mbed_official | 592:a274ee790e56 | 376 | #define PINMUX_PB13A_EIC_EXTINT13 ((PIN_PB13A_EIC_EXTINT13 << 16) | MUX_PB13A_EIC_EXTINT13) |
mbed_official | 592:a274ee790e56 | 377 | #define PORT_PB13A_EIC_EXTINT13 (1ul << 13) |
mbed_official | 592:a274ee790e56 | 378 | #define PIN_PB14A_EIC_EXTINT14 46L /**< \brief EIC signal: EXTINT14 on PB14 mux A */ |
mbed_official | 592:a274ee790e56 | 379 | #define MUX_PB14A_EIC_EXTINT14 0L |
mbed_official | 592:a274ee790e56 | 380 | #define PINMUX_PB14A_EIC_EXTINT14 ((PIN_PB14A_EIC_EXTINT14 << 16) | MUX_PB14A_EIC_EXTINT14) |
mbed_official | 592:a274ee790e56 | 381 | #define PORT_PB14A_EIC_EXTINT14 (1ul << 14) |
mbed_official | 592:a274ee790e56 | 382 | #define PIN_PB30A_EIC_EXTINT14 62L /**< \brief EIC signal: EXTINT14 on PB30 mux A */ |
mbed_official | 592:a274ee790e56 | 383 | #define MUX_PB30A_EIC_EXTINT14 0L |
mbed_official | 592:a274ee790e56 | 384 | #define PINMUX_PB30A_EIC_EXTINT14 ((PIN_PB30A_EIC_EXTINT14 << 16) | MUX_PB30A_EIC_EXTINT14) |
mbed_official | 592:a274ee790e56 | 385 | #define PORT_PB30A_EIC_EXTINT14 (1ul << 30) |
mbed_official | 592:a274ee790e56 | 386 | #define PIN_PA14A_EIC_EXTINT14 14L /**< \brief EIC signal: EXTINT14 on PA14 mux A */ |
mbed_official | 592:a274ee790e56 | 387 | #define MUX_PA14A_EIC_EXTINT14 0L |
mbed_official | 592:a274ee790e56 | 388 | #define PINMUX_PA14A_EIC_EXTINT14 ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14) |
mbed_official | 592:a274ee790e56 | 389 | #define PORT_PA14A_EIC_EXTINT14 (1ul << 14) |
mbed_official | 592:a274ee790e56 | 390 | #define PIN_PA15A_EIC_EXTINT15 15L /**< \brief EIC signal: EXTINT15 on PA15 mux A */ |
mbed_official | 592:a274ee790e56 | 391 | #define MUX_PA15A_EIC_EXTINT15 0L |
mbed_official | 592:a274ee790e56 | 392 | #define PINMUX_PA15A_EIC_EXTINT15 ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15) |
mbed_official | 592:a274ee790e56 | 393 | #define PORT_PA15A_EIC_EXTINT15 (1ul << 15) |
mbed_official | 592:a274ee790e56 | 394 | #define PIN_PA27A_EIC_EXTINT15 27L /**< \brief EIC signal: EXTINT15 on PA27 mux A */ |
mbed_official | 592:a274ee790e56 | 395 | #define MUX_PA27A_EIC_EXTINT15 0L |
mbed_official | 592:a274ee790e56 | 396 | #define PINMUX_PA27A_EIC_EXTINT15 ((PIN_PA27A_EIC_EXTINT15 << 16) | MUX_PA27A_EIC_EXTINT15) |
mbed_official | 592:a274ee790e56 | 397 | #define PORT_PA27A_EIC_EXTINT15 (1ul << 27) |
mbed_official | 592:a274ee790e56 | 398 | #define PIN_PB15A_EIC_EXTINT15 47L /**< \brief EIC signal: EXTINT15 on PB15 mux A */ |
mbed_official | 592:a274ee790e56 | 399 | #define MUX_PB15A_EIC_EXTINT15 0L |
mbed_official | 592:a274ee790e56 | 400 | #define PINMUX_PB15A_EIC_EXTINT15 ((PIN_PB15A_EIC_EXTINT15 << 16) | MUX_PB15A_EIC_EXTINT15) |
mbed_official | 592:a274ee790e56 | 401 | #define PORT_PB15A_EIC_EXTINT15 (1ul << 15) |
mbed_official | 592:a274ee790e56 | 402 | #define PIN_PB31A_EIC_EXTINT15 63L /**< \brief EIC signal: EXTINT15 on PB31 mux A */ |
mbed_official | 592:a274ee790e56 | 403 | #define MUX_PB31A_EIC_EXTINT15 0L |
mbed_official | 592:a274ee790e56 | 404 | #define PINMUX_PB31A_EIC_EXTINT15 ((PIN_PB31A_EIC_EXTINT15 << 16) | MUX_PB31A_EIC_EXTINT15) |
mbed_official | 592:a274ee790e56 | 405 | #define PORT_PB31A_EIC_EXTINT15 (1ul << 31) |
mbed_official | 592:a274ee790e56 | 406 | #define PIN_PA08A_EIC_NMI 8L /**< \brief EIC signal: NMI on PA08 mux A */ |
mbed_official | 592:a274ee790e56 | 407 | #define MUX_PA08A_EIC_NMI 0L |
mbed_official | 592:a274ee790e56 | 408 | #define PINMUX_PA08A_EIC_NMI ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI) |
mbed_official | 592:a274ee790e56 | 409 | #define PORT_PA08A_EIC_NMI (1ul << 8) |
mbed_official | 592:a274ee790e56 | 410 | /* ========== PORT definition for USB peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 411 | #define PIN_PA24G_USB_DM 24L /**< \brief USB signal: DM on PA24 mux G */ |
mbed_official | 592:a274ee790e56 | 412 | #define MUX_PA24G_USB_DM 6L |
mbed_official | 592:a274ee790e56 | 413 | #define PINMUX_PA24G_USB_DM ((PIN_PA24G_USB_DM << 16) | MUX_PA24G_USB_DM) |
mbed_official | 592:a274ee790e56 | 414 | #define PORT_PA24G_USB_DM (1ul << 24) |
mbed_official | 592:a274ee790e56 | 415 | #define PIN_PA25G_USB_DP 25L /**< \brief USB signal: DP on PA25 mux G */ |
mbed_official | 592:a274ee790e56 | 416 | #define MUX_PA25G_USB_DP 6L |
mbed_official | 592:a274ee790e56 | 417 | #define PINMUX_PA25G_USB_DP ((PIN_PA25G_USB_DP << 16) | MUX_PA25G_USB_DP) |
mbed_official | 592:a274ee790e56 | 418 | #define PORT_PA25G_USB_DP (1ul << 25) |
mbed_official | 592:a274ee790e56 | 419 | #define PIN_PA23G_USB_SOF_1KHZ 23L /**< \brief USB signal: SOF_1KHZ on PA23 mux G */ |
mbed_official | 592:a274ee790e56 | 420 | #define MUX_PA23G_USB_SOF_1KHZ 6L |
mbed_official | 592:a274ee790e56 | 421 | #define PINMUX_PA23G_USB_SOF_1KHZ ((PIN_PA23G_USB_SOF_1KHZ << 16) | MUX_PA23G_USB_SOF_1KHZ) |
mbed_official | 592:a274ee790e56 | 422 | #define PORT_PA23G_USB_SOF_1KHZ (1ul << 23) |
mbed_official | 592:a274ee790e56 | 423 | /* ========== PORT definition for SERCOM0 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 424 | #define PIN_PA04D_SERCOM0_PAD0 4L /**< \brief SERCOM0 signal: PAD0 on PA04 mux D */ |
mbed_official | 592:a274ee790e56 | 425 | #define MUX_PA04D_SERCOM0_PAD0 3L |
mbed_official | 592:a274ee790e56 | 426 | #define PINMUX_PA04D_SERCOM0_PAD0 ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0) |
mbed_official | 592:a274ee790e56 | 427 | #define PORT_PA04D_SERCOM0_PAD0 (1ul << 4) |
mbed_official | 592:a274ee790e56 | 428 | #define PIN_PA08C_SERCOM0_PAD0 8L /**< \brief SERCOM0 signal: PAD0 on PA08 mux C */ |
mbed_official | 592:a274ee790e56 | 429 | #define MUX_PA08C_SERCOM0_PAD0 2L |
mbed_official | 592:a274ee790e56 | 430 | #define PINMUX_PA08C_SERCOM0_PAD0 ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0) |
mbed_official | 592:a274ee790e56 | 431 | #define PORT_PA08C_SERCOM0_PAD0 (1ul << 8) |
mbed_official | 592:a274ee790e56 | 432 | #define PIN_PA05D_SERCOM0_PAD1 5L /**< \brief SERCOM0 signal: PAD1 on PA05 mux D */ |
mbed_official | 592:a274ee790e56 | 433 | #define MUX_PA05D_SERCOM0_PAD1 3L |
mbed_official | 592:a274ee790e56 | 434 | #define PINMUX_PA05D_SERCOM0_PAD1 ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1) |
mbed_official | 592:a274ee790e56 | 435 | #define PORT_PA05D_SERCOM0_PAD1 (1ul << 5) |
mbed_official | 592:a274ee790e56 | 436 | #define PIN_PA09C_SERCOM0_PAD1 9L /**< \brief SERCOM0 signal: PAD1 on PA09 mux C */ |
mbed_official | 592:a274ee790e56 | 437 | #define MUX_PA09C_SERCOM0_PAD1 2L |
mbed_official | 592:a274ee790e56 | 438 | #define PINMUX_PA09C_SERCOM0_PAD1 ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1) |
mbed_official | 592:a274ee790e56 | 439 | #define PORT_PA09C_SERCOM0_PAD1 (1ul << 9) |
mbed_official | 592:a274ee790e56 | 440 | #define PIN_PA06D_SERCOM0_PAD2 6L /**< \brief SERCOM0 signal: PAD2 on PA06 mux D */ |
mbed_official | 592:a274ee790e56 | 441 | #define MUX_PA06D_SERCOM0_PAD2 3L |
mbed_official | 592:a274ee790e56 | 442 | #define PINMUX_PA06D_SERCOM0_PAD2 ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2) |
mbed_official | 592:a274ee790e56 | 443 | #define PORT_PA06D_SERCOM0_PAD2 (1ul << 6) |
mbed_official | 592:a274ee790e56 | 444 | #define PIN_PA10C_SERCOM0_PAD2 10L /**< \brief SERCOM0 signal: PAD2 on PA10 mux C */ |
mbed_official | 592:a274ee790e56 | 445 | #define MUX_PA10C_SERCOM0_PAD2 2L |
mbed_official | 592:a274ee790e56 | 446 | #define PINMUX_PA10C_SERCOM0_PAD2 ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2) |
mbed_official | 592:a274ee790e56 | 447 | #define PORT_PA10C_SERCOM0_PAD2 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 448 | #define PIN_PA07D_SERCOM0_PAD3 7L /**< \brief SERCOM0 signal: PAD3 on PA07 mux D */ |
mbed_official | 592:a274ee790e56 | 449 | #define MUX_PA07D_SERCOM0_PAD3 3L |
mbed_official | 592:a274ee790e56 | 450 | #define PINMUX_PA07D_SERCOM0_PAD3 ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3) |
mbed_official | 592:a274ee790e56 | 451 | #define PORT_PA07D_SERCOM0_PAD3 (1ul << 7) |
mbed_official | 592:a274ee790e56 | 452 | #define PIN_PA11C_SERCOM0_PAD3 11L /**< \brief SERCOM0 signal: PAD3 on PA11 mux C */ |
mbed_official | 592:a274ee790e56 | 453 | #define MUX_PA11C_SERCOM0_PAD3 2L |
mbed_official | 592:a274ee790e56 | 454 | #define PINMUX_PA11C_SERCOM0_PAD3 ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3) |
mbed_official | 592:a274ee790e56 | 455 | #define PORT_PA11C_SERCOM0_PAD3 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 456 | /* ========== PORT definition for SERCOM1 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 457 | #define PIN_PA16C_SERCOM1_PAD0 16L /**< \brief SERCOM1 signal: PAD0 on PA16 mux C */ |
mbed_official | 592:a274ee790e56 | 458 | #define MUX_PA16C_SERCOM1_PAD0 2L |
mbed_official | 592:a274ee790e56 | 459 | #define PINMUX_PA16C_SERCOM1_PAD0 ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0) |
mbed_official | 592:a274ee790e56 | 460 | #define PORT_PA16C_SERCOM1_PAD0 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 461 | #define PIN_PA00D_SERCOM1_PAD0 0L /**< \brief SERCOM1 signal: PAD0 on PA00 mux D */ |
mbed_official | 592:a274ee790e56 | 462 | #define MUX_PA00D_SERCOM1_PAD0 3L |
mbed_official | 592:a274ee790e56 | 463 | #define PINMUX_PA00D_SERCOM1_PAD0 ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0) |
mbed_official | 592:a274ee790e56 | 464 | #define PORT_PA00D_SERCOM1_PAD0 (1ul << 0) |
mbed_official | 592:a274ee790e56 | 465 | #define PIN_PA17C_SERCOM1_PAD1 17L /**< \brief SERCOM1 signal: PAD1 on PA17 mux C */ |
mbed_official | 592:a274ee790e56 | 466 | #define MUX_PA17C_SERCOM1_PAD1 2L |
mbed_official | 592:a274ee790e56 | 467 | #define PINMUX_PA17C_SERCOM1_PAD1 ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1) |
mbed_official | 592:a274ee790e56 | 468 | #define PORT_PA17C_SERCOM1_PAD1 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 469 | #define PIN_PA01D_SERCOM1_PAD1 1L /**< \brief SERCOM1 signal: PAD1 on PA01 mux D */ |
mbed_official | 592:a274ee790e56 | 470 | #define MUX_PA01D_SERCOM1_PAD1 3L |
mbed_official | 592:a274ee790e56 | 471 | #define PINMUX_PA01D_SERCOM1_PAD1 ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1) |
mbed_official | 592:a274ee790e56 | 472 | #define PORT_PA01D_SERCOM1_PAD1 (1ul << 1) |
mbed_official | 592:a274ee790e56 | 473 | #define PIN_PA30D_SERCOM1_PAD2 30L /**< \brief SERCOM1 signal: PAD2 on PA30 mux D */ |
mbed_official | 592:a274ee790e56 | 474 | #define MUX_PA30D_SERCOM1_PAD2 3L |
mbed_official | 592:a274ee790e56 | 475 | #define PINMUX_PA30D_SERCOM1_PAD2 ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2) |
mbed_official | 592:a274ee790e56 | 476 | #define PORT_PA30D_SERCOM1_PAD2 (1ul << 30) |
mbed_official | 592:a274ee790e56 | 477 | #define PIN_PA18C_SERCOM1_PAD2 18L /**< \brief SERCOM1 signal: PAD2 on PA18 mux C */ |
mbed_official | 592:a274ee790e56 | 478 | #define MUX_PA18C_SERCOM1_PAD2 2L |
mbed_official | 592:a274ee790e56 | 479 | #define PINMUX_PA18C_SERCOM1_PAD2 ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2) |
mbed_official | 592:a274ee790e56 | 480 | #define PORT_PA18C_SERCOM1_PAD2 (1ul << 18) |
mbed_official | 592:a274ee790e56 | 481 | #define PIN_PA31D_SERCOM1_PAD3 31L /**< \brief SERCOM1 signal: PAD3 on PA31 mux D */ |
mbed_official | 592:a274ee790e56 | 482 | #define MUX_PA31D_SERCOM1_PAD3 3L |
mbed_official | 592:a274ee790e56 | 483 | #define PINMUX_PA31D_SERCOM1_PAD3 ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3) |
mbed_official | 592:a274ee790e56 | 484 | #define PORT_PA31D_SERCOM1_PAD3 (1ul << 31) |
mbed_official | 592:a274ee790e56 | 485 | #define PIN_PA19C_SERCOM1_PAD3 19L /**< \brief SERCOM1 signal: PAD3 on PA19 mux C */ |
mbed_official | 592:a274ee790e56 | 486 | #define MUX_PA19C_SERCOM1_PAD3 2L |
mbed_official | 592:a274ee790e56 | 487 | #define PINMUX_PA19C_SERCOM1_PAD3 ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3) |
mbed_official | 592:a274ee790e56 | 488 | #define PORT_PA19C_SERCOM1_PAD3 (1ul << 19) |
mbed_official | 592:a274ee790e56 | 489 | /* ========== PORT definition for SERCOM2 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 490 | #define PIN_PA08D_SERCOM2_PAD0 8L /**< \brief SERCOM2 signal: PAD0 on PA08 mux D */ |
mbed_official | 592:a274ee790e56 | 491 | #define MUX_PA08D_SERCOM2_PAD0 3L |
mbed_official | 592:a274ee790e56 | 492 | #define PINMUX_PA08D_SERCOM2_PAD0 ((PIN_PA08D_SERCOM2_PAD0 << 16) | MUX_PA08D_SERCOM2_PAD0) |
mbed_official | 592:a274ee790e56 | 493 | #define PORT_PA08D_SERCOM2_PAD0 (1ul << 8) |
mbed_official | 592:a274ee790e56 | 494 | #define PIN_PA12C_SERCOM2_PAD0 12L /**< \brief SERCOM2 signal: PAD0 on PA12 mux C */ |
mbed_official | 592:a274ee790e56 | 495 | #define MUX_PA12C_SERCOM2_PAD0 2L |
mbed_official | 592:a274ee790e56 | 496 | #define PINMUX_PA12C_SERCOM2_PAD0 ((PIN_PA12C_SERCOM2_PAD0 << 16) | MUX_PA12C_SERCOM2_PAD0) |
mbed_official | 592:a274ee790e56 | 497 | #define PORT_PA12C_SERCOM2_PAD0 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 498 | #define PIN_PA09D_SERCOM2_PAD1 9L /**< \brief SERCOM2 signal: PAD1 on PA09 mux D */ |
mbed_official | 592:a274ee790e56 | 499 | #define MUX_PA09D_SERCOM2_PAD1 3L |
mbed_official | 592:a274ee790e56 | 500 | #define PINMUX_PA09D_SERCOM2_PAD1 ((PIN_PA09D_SERCOM2_PAD1 << 16) | MUX_PA09D_SERCOM2_PAD1) |
mbed_official | 592:a274ee790e56 | 501 | #define PORT_PA09D_SERCOM2_PAD1 (1ul << 9) |
mbed_official | 592:a274ee790e56 | 502 | #define PIN_PA13C_SERCOM2_PAD1 13L /**< \brief SERCOM2 signal: PAD1 on PA13 mux C */ |
mbed_official | 592:a274ee790e56 | 503 | #define MUX_PA13C_SERCOM2_PAD1 2L |
mbed_official | 592:a274ee790e56 | 504 | #define PINMUX_PA13C_SERCOM2_PAD1 ((PIN_PA13C_SERCOM2_PAD1 << 16) | MUX_PA13C_SERCOM2_PAD1) |
mbed_official | 592:a274ee790e56 | 505 | #define PORT_PA13C_SERCOM2_PAD1 (1ul << 13) |
mbed_official | 592:a274ee790e56 | 506 | #define PIN_PA10D_SERCOM2_PAD2 10L /**< \brief SERCOM2 signal: PAD2 on PA10 mux D */ |
mbed_official | 592:a274ee790e56 | 507 | #define MUX_PA10D_SERCOM2_PAD2 3L |
mbed_official | 592:a274ee790e56 | 508 | #define PINMUX_PA10D_SERCOM2_PAD2 ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2) |
mbed_official | 592:a274ee790e56 | 509 | #define PORT_PA10D_SERCOM2_PAD2 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 510 | #define PIN_PA14C_SERCOM2_PAD2 14L /**< \brief SERCOM2 signal: PAD2 on PA14 mux C */ |
mbed_official | 592:a274ee790e56 | 511 | #define MUX_PA14C_SERCOM2_PAD2 2L |
mbed_official | 592:a274ee790e56 | 512 | #define PINMUX_PA14C_SERCOM2_PAD2 ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2) |
mbed_official | 592:a274ee790e56 | 513 | #define PORT_PA14C_SERCOM2_PAD2 (1ul << 14) |
mbed_official | 592:a274ee790e56 | 514 | #define PIN_PA11D_SERCOM2_PAD3 11L /**< \brief SERCOM2 signal: PAD3 on PA11 mux D */ |
mbed_official | 592:a274ee790e56 | 515 | #define MUX_PA11D_SERCOM2_PAD3 3L |
mbed_official | 592:a274ee790e56 | 516 | #define PINMUX_PA11D_SERCOM2_PAD3 ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3) |
mbed_official | 592:a274ee790e56 | 517 | #define PORT_PA11D_SERCOM2_PAD3 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 518 | #define PIN_PA15C_SERCOM2_PAD3 15L /**< \brief SERCOM2 signal: PAD3 on PA15 mux C */ |
mbed_official | 592:a274ee790e56 | 519 | #define MUX_PA15C_SERCOM2_PAD3 2L |
mbed_official | 592:a274ee790e56 | 520 | #define PINMUX_PA15C_SERCOM2_PAD3 ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3) |
mbed_official | 592:a274ee790e56 | 521 | #define PORT_PA15C_SERCOM2_PAD3 (1ul << 15) |
mbed_official | 592:a274ee790e56 | 522 | /* ========== PORT definition for SERCOM3 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 523 | #define PIN_PA16D_SERCOM3_PAD0 16L /**< \brief SERCOM3 signal: PAD0 on PA16 mux D */ |
mbed_official | 592:a274ee790e56 | 524 | #define MUX_PA16D_SERCOM3_PAD0 3L |
mbed_official | 592:a274ee790e56 | 525 | #define PINMUX_PA16D_SERCOM3_PAD0 ((PIN_PA16D_SERCOM3_PAD0 << 16) | MUX_PA16D_SERCOM3_PAD0) |
mbed_official | 592:a274ee790e56 | 526 | #define PORT_PA16D_SERCOM3_PAD0 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 527 | #define PIN_PA22C_SERCOM3_PAD0 22L /**< \brief SERCOM3 signal: PAD0 on PA22 mux C */ |
mbed_official | 592:a274ee790e56 | 528 | #define MUX_PA22C_SERCOM3_PAD0 2L |
mbed_official | 592:a274ee790e56 | 529 | #define PINMUX_PA22C_SERCOM3_PAD0 ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0) |
mbed_official | 592:a274ee790e56 | 530 | #define PORT_PA22C_SERCOM3_PAD0 (1ul << 22) |
mbed_official | 592:a274ee790e56 | 531 | #define PIN_PA17D_SERCOM3_PAD1 17L /**< \brief SERCOM3 signal: PAD1 on PA17 mux D */ |
mbed_official | 592:a274ee790e56 | 532 | #define MUX_PA17D_SERCOM3_PAD1 3L |
mbed_official | 592:a274ee790e56 | 533 | #define PINMUX_PA17D_SERCOM3_PAD1 ((PIN_PA17D_SERCOM3_PAD1 << 16) | MUX_PA17D_SERCOM3_PAD1) |
mbed_official | 592:a274ee790e56 | 534 | #define PORT_PA17D_SERCOM3_PAD1 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 535 | #define PIN_PA23C_SERCOM3_PAD1 23L /**< \brief SERCOM3 signal: PAD1 on PA23 mux C */ |
mbed_official | 592:a274ee790e56 | 536 | #define MUX_PA23C_SERCOM3_PAD1 2L |
mbed_official | 592:a274ee790e56 | 537 | #define PINMUX_PA23C_SERCOM3_PAD1 ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1) |
mbed_official | 592:a274ee790e56 | 538 | #define PORT_PA23C_SERCOM3_PAD1 (1ul << 23) |
mbed_official | 592:a274ee790e56 | 539 | #define PIN_PA18D_SERCOM3_PAD2 18L /**< \brief SERCOM3 signal: PAD2 on PA18 mux D */ |
mbed_official | 592:a274ee790e56 | 540 | #define MUX_PA18D_SERCOM3_PAD2 3L |
mbed_official | 592:a274ee790e56 | 541 | #define PINMUX_PA18D_SERCOM3_PAD2 ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2) |
mbed_official | 592:a274ee790e56 | 542 | #define PORT_PA18D_SERCOM3_PAD2 (1ul << 18) |
mbed_official | 592:a274ee790e56 | 543 | #define PIN_PA20D_SERCOM3_PAD2 20L /**< \brief SERCOM3 signal: PAD2 on PA20 mux D */ |
mbed_official | 592:a274ee790e56 | 544 | #define MUX_PA20D_SERCOM3_PAD2 3L |
mbed_official | 592:a274ee790e56 | 545 | #define PINMUX_PA20D_SERCOM3_PAD2 ((PIN_PA20D_SERCOM3_PAD2 << 16) | MUX_PA20D_SERCOM3_PAD2) |
mbed_official | 592:a274ee790e56 | 546 | #define PORT_PA20D_SERCOM3_PAD2 (1ul << 20) |
mbed_official | 592:a274ee790e56 | 547 | #define PIN_PA24C_SERCOM3_PAD2 24L /**< \brief SERCOM3 signal: PAD2 on PA24 mux C */ |
mbed_official | 592:a274ee790e56 | 548 | #define MUX_PA24C_SERCOM3_PAD2 2L |
mbed_official | 592:a274ee790e56 | 549 | #define PINMUX_PA24C_SERCOM3_PAD2 ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2) |
mbed_official | 592:a274ee790e56 | 550 | #define PORT_PA24C_SERCOM3_PAD2 (1ul << 24) |
mbed_official | 592:a274ee790e56 | 551 | #define PIN_PA19D_SERCOM3_PAD3 19L /**< \brief SERCOM3 signal: PAD3 on PA19 mux D */ |
mbed_official | 592:a274ee790e56 | 552 | #define MUX_PA19D_SERCOM3_PAD3 3L |
mbed_official | 592:a274ee790e56 | 553 | #define PINMUX_PA19D_SERCOM3_PAD3 ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3) |
mbed_official | 592:a274ee790e56 | 554 | #define PORT_PA19D_SERCOM3_PAD3 (1ul << 19) |
mbed_official | 592:a274ee790e56 | 555 | #define PIN_PA21D_SERCOM3_PAD3 21L /**< \brief SERCOM3 signal: PAD3 on PA21 mux D */ |
mbed_official | 592:a274ee790e56 | 556 | #define MUX_PA21D_SERCOM3_PAD3 3L |
mbed_official | 592:a274ee790e56 | 557 | #define PINMUX_PA21D_SERCOM3_PAD3 ((PIN_PA21D_SERCOM3_PAD3 << 16) | MUX_PA21D_SERCOM3_PAD3) |
mbed_official | 592:a274ee790e56 | 558 | #define PORT_PA21D_SERCOM3_PAD3 (1ul << 21) |
mbed_official | 592:a274ee790e56 | 559 | #define PIN_PA25C_SERCOM3_PAD3 25L /**< \brief SERCOM3 signal: PAD3 on PA25 mux C */ |
mbed_official | 592:a274ee790e56 | 560 | #define MUX_PA25C_SERCOM3_PAD3 2L |
mbed_official | 592:a274ee790e56 | 561 | #define PINMUX_PA25C_SERCOM3_PAD3 ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3) |
mbed_official | 592:a274ee790e56 | 562 | #define PORT_PA25C_SERCOM3_PAD3 (1ul << 25) |
mbed_official | 592:a274ee790e56 | 563 | /* ========== PORT definition for SERCOM4 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 564 | #define PIN_PA12D_SERCOM4_PAD0 12L /**< \brief SERCOM4 signal: PAD0 on PA12 mux D */ |
mbed_official | 592:a274ee790e56 | 565 | #define MUX_PA12D_SERCOM4_PAD0 3L |
mbed_official | 592:a274ee790e56 | 566 | #define PINMUX_PA12D_SERCOM4_PAD0 ((PIN_PA12D_SERCOM4_PAD0 << 16) | MUX_PA12D_SERCOM4_PAD0) |
mbed_official | 592:a274ee790e56 | 567 | #define PORT_PA12D_SERCOM4_PAD0 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 568 | #define PIN_PB08D_SERCOM4_PAD0 40L /**< \brief SERCOM4 signal: PAD0 on PB08 mux D */ |
mbed_official | 592:a274ee790e56 | 569 | #define MUX_PB08D_SERCOM4_PAD0 3L |
mbed_official | 592:a274ee790e56 | 570 | #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0) |
mbed_official | 592:a274ee790e56 | 571 | #define PORT_PB08D_SERCOM4_PAD0 (1ul << 8) |
mbed_official | 592:a274ee790e56 | 572 | #define PIN_PB12C_SERCOM4_PAD0 44L /**< \brief SERCOM4 signal: PAD0 on PB12 mux C */ |
mbed_official | 592:a274ee790e56 | 573 | #define MUX_PB12C_SERCOM4_PAD0 2L |
mbed_official | 592:a274ee790e56 | 574 | #define PINMUX_PB12C_SERCOM4_PAD0 ((PIN_PB12C_SERCOM4_PAD0 << 16) | MUX_PB12C_SERCOM4_PAD0) |
mbed_official | 592:a274ee790e56 | 575 | #define PORT_PB12C_SERCOM4_PAD0 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 576 | #define PIN_PA13D_SERCOM4_PAD1 13L /**< \brief SERCOM4 signal: PAD1 on PA13 mux D */ |
mbed_official | 592:a274ee790e56 | 577 | #define MUX_PA13D_SERCOM4_PAD1 3L |
mbed_official | 592:a274ee790e56 | 578 | #define PINMUX_PA13D_SERCOM4_PAD1 ((PIN_PA13D_SERCOM4_PAD1 << 16) | MUX_PA13D_SERCOM4_PAD1) |
mbed_official | 592:a274ee790e56 | 579 | #define PORT_PA13D_SERCOM4_PAD1 (1ul << 13) |
mbed_official | 592:a274ee790e56 | 580 | #define PIN_PB09D_SERCOM4_PAD1 41L /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */ |
mbed_official | 592:a274ee790e56 | 581 | #define MUX_PB09D_SERCOM4_PAD1 3L |
mbed_official | 592:a274ee790e56 | 582 | #define PINMUX_PB09D_SERCOM4_PAD1 ((PIN_PB09D_SERCOM4_PAD1 << 16) | MUX_PB09D_SERCOM4_PAD1) |
mbed_official | 592:a274ee790e56 | 583 | #define PORT_PB09D_SERCOM4_PAD1 (1ul << 9) |
mbed_official | 592:a274ee790e56 | 584 | #define PIN_PB13C_SERCOM4_PAD1 45L /**< \brief SERCOM4 signal: PAD1 on PB13 mux C */ |
mbed_official | 592:a274ee790e56 | 585 | #define MUX_PB13C_SERCOM4_PAD1 2L |
mbed_official | 592:a274ee790e56 | 586 | #define PINMUX_PB13C_SERCOM4_PAD1 ((PIN_PB13C_SERCOM4_PAD1 << 16) | MUX_PB13C_SERCOM4_PAD1) |
mbed_official | 592:a274ee790e56 | 587 | #define PORT_PB13C_SERCOM4_PAD1 (1ul << 13) |
mbed_official | 592:a274ee790e56 | 588 | #define PIN_PA14D_SERCOM4_PAD2 14L /**< \brief SERCOM4 signal: PAD2 on PA14 mux D */ |
mbed_official | 592:a274ee790e56 | 589 | #define MUX_PA14D_SERCOM4_PAD2 3L |
mbed_official | 592:a274ee790e56 | 590 | #define PINMUX_PA14D_SERCOM4_PAD2 ((PIN_PA14D_SERCOM4_PAD2 << 16) | MUX_PA14D_SERCOM4_PAD2) |
mbed_official | 592:a274ee790e56 | 591 | #define PORT_PA14D_SERCOM4_PAD2 (1ul << 14) |
mbed_official | 592:a274ee790e56 | 592 | #define PIN_PB10D_SERCOM4_PAD2 42L /**< \brief SERCOM4 signal: PAD2 on PB10 mux D */ |
mbed_official | 592:a274ee790e56 | 593 | #define MUX_PB10D_SERCOM4_PAD2 3L |
mbed_official | 592:a274ee790e56 | 594 | #define PINMUX_PB10D_SERCOM4_PAD2 ((PIN_PB10D_SERCOM4_PAD2 << 16) | MUX_PB10D_SERCOM4_PAD2) |
mbed_official | 592:a274ee790e56 | 595 | #define PORT_PB10D_SERCOM4_PAD2 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 596 | #define PIN_PB14C_SERCOM4_PAD2 46L /**< \brief SERCOM4 signal: PAD2 on PB14 mux C */ |
mbed_official | 592:a274ee790e56 | 597 | #define MUX_PB14C_SERCOM4_PAD2 2L |
mbed_official | 592:a274ee790e56 | 598 | #define PINMUX_PB14C_SERCOM4_PAD2 ((PIN_PB14C_SERCOM4_PAD2 << 16) | MUX_PB14C_SERCOM4_PAD2) |
mbed_official | 592:a274ee790e56 | 599 | #define PORT_PB14C_SERCOM4_PAD2 (1ul << 14) |
mbed_official | 592:a274ee790e56 | 600 | #define PIN_PA15D_SERCOM4_PAD3 15L /**< \brief SERCOM4 signal: PAD3 on PA15 mux D */ |
mbed_official | 592:a274ee790e56 | 601 | #define MUX_PA15D_SERCOM4_PAD3 3L |
mbed_official | 592:a274ee790e56 | 602 | #define PINMUX_PA15D_SERCOM4_PAD3 ((PIN_PA15D_SERCOM4_PAD3 << 16) | MUX_PA15D_SERCOM4_PAD3) |
mbed_official | 592:a274ee790e56 | 603 | #define PORT_PA15D_SERCOM4_PAD3 (1ul << 15) |
mbed_official | 592:a274ee790e56 | 604 | #define PIN_PB11D_SERCOM4_PAD3 43L /**< \brief SERCOM4 signal: PAD3 on PB11 mux D */ |
mbed_official | 592:a274ee790e56 | 605 | #define MUX_PB11D_SERCOM4_PAD3 3L |
mbed_official | 592:a274ee790e56 | 606 | #define PINMUX_PB11D_SERCOM4_PAD3 ((PIN_PB11D_SERCOM4_PAD3 << 16) | MUX_PB11D_SERCOM4_PAD3) |
mbed_official | 592:a274ee790e56 | 607 | #define PORT_PB11D_SERCOM4_PAD3 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 608 | #define PIN_PB15C_SERCOM4_PAD3 47L /**< \brief SERCOM4 signal: PAD3 on PB15 mux C */ |
mbed_official | 592:a274ee790e56 | 609 | #define MUX_PB15C_SERCOM4_PAD3 2L |
mbed_official | 592:a274ee790e56 | 610 | #define PINMUX_PB15C_SERCOM4_PAD3 ((PIN_PB15C_SERCOM4_PAD3 << 16) | MUX_PB15C_SERCOM4_PAD3) |
mbed_official | 592:a274ee790e56 | 611 | #define PORT_PB15C_SERCOM4_PAD3 (1ul << 15) |
mbed_official | 592:a274ee790e56 | 612 | /* ========== PORT definition for SERCOM5 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 613 | #define PIN_PB16C_SERCOM5_PAD0 48L /**< \brief SERCOM5 signal: PAD0 on PB16 mux C */ |
mbed_official | 592:a274ee790e56 | 614 | #define MUX_PB16C_SERCOM5_PAD0 2L |
mbed_official | 592:a274ee790e56 | 615 | #define PINMUX_PB16C_SERCOM5_PAD0 ((PIN_PB16C_SERCOM5_PAD0 << 16) | MUX_PB16C_SERCOM5_PAD0) |
mbed_official | 592:a274ee790e56 | 616 | #define PORT_PB16C_SERCOM5_PAD0 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 617 | #define PIN_PA22D_SERCOM5_PAD0 22L /**< \brief SERCOM5 signal: PAD0 on PA22 mux D */ |
mbed_official | 592:a274ee790e56 | 618 | #define MUX_PA22D_SERCOM5_PAD0 3L |
mbed_official | 592:a274ee790e56 | 619 | #define PINMUX_PA22D_SERCOM5_PAD0 ((PIN_PA22D_SERCOM5_PAD0 << 16) | MUX_PA22D_SERCOM5_PAD0) |
mbed_official | 592:a274ee790e56 | 620 | #define PORT_PA22D_SERCOM5_PAD0 (1ul << 22) |
mbed_official | 592:a274ee790e56 | 621 | #define PIN_PB02D_SERCOM5_PAD0 34L /**< \brief SERCOM5 signal: PAD0 on PB02 mux D */ |
mbed_official | 592:a274ee790e56 | 622 | #define MUX_PB02D_SERCOM5_PAD0 3L |
mbed_official | 592:a274ee790e56 | 623 | #define PINMUX_PB02D_SERCOM5_PAD0 ((PIN_PB02D_SERCOM5_PAD0 << 16) | MUX_PB02D_SERCOM5_PAD0) |
mbed_official | 592:a274ee790e56 | 624 | #define PORT_PB02D_SERCOM5_PAD0 (1ul << 2) |
mbed_official | 592:a274ee790e56 | 625 | #define PIN_PB30D_SERCOM5_PAD0 62L /**< \brief SERCOM5 signal: PAD0 on PB30 mux D */ |
mbed_official | 592:a274ee790e56 | 626 | #define MUX_PB30D_SERCOM5_PAD0 3L |
mbed_official | 592:a274ee790e56 | 627 | #define PINMUX_PB30D_SERCOM5_PAD0 ((PIN_PB30D_SERCOM5_PAD0 << 16) | MUX_PB30D_SERCOM5_PAD0) |
mbed_official | 592:a274ee790e56 | 628 | #define PORT_PB30D_SERCOM5_PAD0 (1ul << 30) |
mbed_official | 592:a274ee790e56 | 629 | #define PIN_PB17C_SERCOM5_PAD1 49L /**< \brief SERCOM5 signal: PAD1 on PB17 mux C */ |
mbed_official | 592:a274ee790e56 | 630 | #define MUX_PB17C_SERCOM5_PAD1 2L |
mbed_official | 592:a274ee790e56 | 631 | #define PINMUX_PB17C_SERCOM5_PAD1 ((PIN_PB17C_SERCOM5_PAD1 << 16) | MUX_PB17C_SERCOM5_PAD1) |
mbed_official | 592:a274ee790e56 | 632 | #define PORT_PB17C_SERCOM5_PAD1 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 633 | #define PIN_PA23D_SERCOM5_PAD1 23L /**< \brief SERCOM5 signal: PAD1 on PA23 mux D */ |
mbed_official | 592:a274ee790e56 | 634 | #define MUX_PA23D_SERCOM5_PAD1 3L |
mbed_official | 592:a274ee790e56 | 635 | #define PINMUX_PA23D_SERCOM5_PAD1 ((PIN_PA23D_SERCOM5_PAD1 << 16) | MUX_PA23D_SERCOM5_PAD1) |
mbed_official | 592:a274ee790e56 | 636 | #define PORT_PA23D_SERCOM5_PAD1 (1ul << 23) |
mbed_official | 592:a274ee790e56 | 637 | #define PIN_PB03D_SERCOM5_PAD1 35L /**< \brief SERCOM5 signal: PAD1 on PB03 mux D */ |
mbed_official | 592:a274ee790e56 | 638 | #define MUX_PB03D_SERCOM5_PAD1 3L |
mbed_official | 592:a274ee790e56 | 639 | #define PINMUX_PB03D_SERCOM5_PAD1 ((PIN_PB03D_SERCOM5_PAD1 << 16) | MUX_PB03D_SERCOM5_PAD1) |
mbed_official | 592:a274ee790e56 | 640 | #define PORT_PB03D_SERCOM5_PAD1 (1ul << 3) |
mbed_official | 592:a274ee790e56 | 641 | #define PIN_PB31D_SERCOM5_PAD1 63L /**< \brief SERCOM5 signal: PAD1 on PB31 mux D */ |
mbed_official | 592:a274ee790e56 | 642 | #define MUX_PB31D_SERCOM5_PAD1 3L |
mbed_official | 592:a274ee790e56 | 643 | #define PINMUX_PB31D_SERCOM5_PAD1 ((PIN_PB31D_SERCOM5_PAD1 << 16) | MUX_PB31D_SERCOM5_PAD1) |
mbed_official | 592:a274ee790e56 | 644 | #define PORT_PB31D_SERCOM5_PAD1 (1ul << 31) |
mbed_official | 592:a274ee790e56 | 645 | #define PIN_PA24D_SERCOM5_PAD2 24L /**< \brief SERCOM5 signal: PAD2 on PA24 mux D */ |
mbed_official | 592:a274ee790e56 | 646 | #define MUX_PA24D_SERCOM5_PAD2 3L |
mbed_official | 592:a274ee790e56 | 647 | #define PINMUX_PA24D_SERCOM5_PAD2 ((PIN_PA24D_SERCOM5_PAD2 << 16) | MUX_PA24D_SERCOM5_PAD2) |
mbed_official | 592:a274ee790e56 | 648 | #define PORT_PA24D_SERCOM5_PAD2 (1ul << 24) |
mbed_official | 592:a274ee790e56 | 649 | #define PIN_PB00D_SERCOM5_PAD2 32L /**< \brief SERCOM5 signal: PAD2 on PB00 mux D */ |
mbed_official | 592:a274ee790e56 | 650 | #define MUX_PB00D_SERCOM5_PAD2 3L |
mbed_official | 592:a274ee790e56 | 651 | #define PINMUX_PB00D_SERCOM5_PAD2 ((PIN_PB00D_SERCOM5_PAD2 << 16) | MUX_PB00D_SERCOM5_PAD2) |
mbed_official | 592:a274ee790e56 | 652 | #define PORT_PB00D_SERCOM5_PAD2 (1ul << 0) |
mbed_official | 592:a274ee790e56 | 653 | #define PIN_PB22D_SERCOM5_PAD2 54L /**< \brief SERCOM5 signal: PAD2 on PB22 mux D */ |
mbed_official | 592:a274ee790e56 | 654 | #define MUX_PB22D_SERCOM5_PAD2 3L |
mbed_official | 592:a274ee790e56 | 655 | #define PINMUX_PB22D_SERCOM5_PAD2 ((PIN_PB22D_SERCOM5_PAD2 << 16) | MUX_PB22D_SERCOM5_PAD2) |
mbed_official | 592:a274ee790e56 | 656 | #define PORT_PB22D_SERCOM5_PAD2 (1ul << 22) |
mbed_official | 592:a274ee790e56 | 657 | #define PIN_PA20C_SERCOM5_PAD2 20L /**< \brief SERCOM5 signal: PAD2 on PA20 mux C */ |
mbed_official | 592:a274ee790e56 | 658 | #define MUX_PA20C_SERCOM5_PAD2 2L |
mbed_official | 592:a274ee790e56 | 659 | #define PINMUX_PA20C_SERCOM5_PAD2 ((PIN_PA20C_SERCOM5_PAD2 << 16) | MUX_PA20C_SERCOM5_PAD2) |
mbed_official | 592:a274ee790e56 | 660 | #define PORT_PA20C_SERCOM5_PAD2 (1ul << 20) |
mbed_official | 592:a274ee790e56 | 661 | #define PIN_PA25D_SERCOM5_PAD3 25L /**< \brief SERCOM5 signal: PAD3 on PA25 mux D */ |
mbed_official | 592:a274ee790e56 | 662 | #define MUX_PA25D_SERCOM5_PAD3 3L |
mbed_official | 592:a274ee790e56 | 663 | #define PINMUX_PA25D_SERCOM5_PAD3 ((PIN_PA25D_SERCOM5_PAD3 << 16) | MUX_PA25D_SERCOM5_PAD3) |
mbed_official | 592:a274ee790e56 | 664 | #define PORT_PA25D_SERCOM5_PAD3 (1ul << 25) |
mbed_official | 592:a274ee790e56 | 665 | #define PIN_PB01D_SERCOM5_PAD3 33L /**< \brief SERCOM5 signal: PAD3 on PB01 mux D */ |
mbed_official | 592:a274ee790e56 | 666 | #define MUX_PB01D_SERCOM5_PAD3 3L |
mbed_official | 592:a274ee790e56 | 667 | #define PINMUX_PB01D_SERCOM5_PAD3 ((PIN_PB01D_SERCOM5_PAD3 << 16) | MUX_PB01D_SERCOM5_PAD3) |
mbed_official | 592:a274ee790e56 | 668 | #define PORT_PB01D_SERCOM5_PAD3 (1ul << 1) |
mbed_official | 592:a274ee790e56 | 669 | #define PIN_PB23D_SERCOM5_PAD3 55L /**< \brief SERCOM5 signal: PAD3 on PB23 mux D */ |
mbed_official | 592:a274ee790e56 | 670 | #define MUX_PB23D_SERCOM5_PAD3 3L |
mbed_official | 592:a274ee790e56 | 671 | #define PINMUX_PB23D_SERCOM5_PAD3 ((PIN_PB23D_SERCOM5_PAD3 << 16) | MUX_PB23D_SERCOM5_PAD3) |
mbed_official | 592:a274ee790e56 | 672 | #define PORT_PB23D_SERCOM5_PAD3 (1ul << 23) |
mbed_official | 592:a274ee790e56 | 673 | #define PIN_PA21C_SERCOM5_PAD3 21L /**< \brief SERCOM5 signal: PAD3 on PA21 mux C */ |
mbed_official | 592:a274ee790e56 | 674 | #define MUX_PA21C_SERCOM5_PAD3 2L |
mbed_official | 592:a274ee790e56 | 675 | #define PINMUX_PA21C_SERCOM5_PAD3 ((PIN_PA21C_SERCOM5_PAD3 << 16) | MUX_PA21C_SERCOM5_PAD3) |
mbed_official | 592:a274ee790e56 | 676 | #define PORT_PA21C_SERCOM5_PAD3 (1ul << 21) |
mbed_official | 592:a274ee790e56 | 677 | /* ========== PORT definition for TCC0 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 678 | #define PIN_PA04E_TCC0_WO0 4L /**< \brief TCC0 signal: WO0 on PA04 mux E */ |
mbed_official | 592:a274ee790e56 | 679 | #define MUX_PA04E_TCC0_WO0 4L |
mbed_official | 592:a274ee790e56 | 680 | #define PINMUX_PA04E_TCC0_WO0 ((PIN_PA04E_TCC0_WO0 << 16) | MUX_PA04E_TCC0_WO0) |
mbed_official | 592:a274ee790e56 | 681 | #define PORT_PA04E_TCC0_WO0 (1ul << 4) |
mbed_official | 592:a274ee790e56 | 682 | #define PIN_PA08E_TCC0_WO0 8L /**< \brief TCC0 signal: WO0 on PA08 mux E */ |
mbed_official | 592:a274ee790e56 | 683 | #define MUX_PA08E_TCC0_WO0 4L |
mbed_official | 592:a274ee790e56 | 684 | #define PINMUX_PA08E_TCC0_WO0 ((PIN_PA08E_TCC0_WO0 << 16) | MUX_PA08E_TCC0_WO0) |
mbed_official | 592:a274ee790e56 | 685 | #define PORT_PA08E_TCC0_WO0 (1ul << 8) |
mbed_official | 592:a274ee790e56 | 686 | #define PIN_PB30E_TCC0_WO0 62L /**< \brief TCC0 signal: WO0 on PB30 mux E */ |
mbed_official | 592:a274ee790e56 | 687 | #define MUX_PB30E_TCC0_WO0 4L |
mbed_official | 592:a274ee790e56 | 688 | #define PINMUX_PB30E_TCC0_WO0 ((PIN_PB30E_TCC0_WO0 << 16) | MUX_PB30E_TCC0_WO0) |
mbed_official | 592:a274ee790e56 | 689 | #define PORT_PB30E_TCC0_WO0 (1ul << 30) |
mbed_official | 592:a274ee790e56 | 690 | #define PIN_PA05E_TCC0_WO1 5L /**< \brief TCC0 signal: WO1 on PA05 mux E */ |
mbed_official | 592:a274ee790e56 | 691 | #define MUX_PA05E_TCC0_WO1 4L |
mbed_official | 592:a274ee790e56 | 692 | #define PINMUX_PA05E_TCC0_WO1 ((PIN_PA05E_TCC0_WO1 << 16) | MUX_PA05E_TCC0_WO1) |
mbed_official | 592:a274ee790e56 | 693 | #define PORT_PA05E_TCC0_WO1 (1ul << 5) |
mbed_official | 592:a274ee790e56 | 694 | #define PIN_PA09E_TCC0_WO1 9L /**< \brief TCC0 signal: WO1 on PA09 mux E */ |
mbed_official | 592:a274ee790e56 | 695 | #define MUX_PA09E_TCC0_WO1 4L |
mbed_official | 592:a274ee790e56 | 696 | #define PINMUX_PA09E_TCC0_WO1 ((PIN_PA09E_TCC0_WO1 << 16) | MUX_PA09E_TCC0_WO1) |
mbed_official | 592:a274ee790e56 | 697 | #define PORT_PA09E_TCC0_WO1 (1ul << 9) |
mbed_official | 592:a274ee790e56 | 698 | #define PIN_PB31E_TCC0_WO1 63L /**< \brief TCC0 signal: WO1 on PB31 mux E */ |
mbed_official | 592:a274ee790e56 | 699 | #define MUX_PB31E_TCC0_WO1 4L |
mbed_official | 592:a274ee790e56 | 700 | #define PINMUX_PB31E_TCC0_WO1 ((PIN_PB31E_TCC0_WO1 << 16) | MUX_PB31E_TCC0_WO1) |
mbed_official | 592:a274ee790e56 | 701 | #define PORT_PB31E_TCC0_WO1 (1ul << 31) |
mbed_official | 592:a274ee790e56 | 702 | #define PIN_PA10F_TCC0_WO2 10L /**< \brief TCC0 signal: WO2 on PA10 mux F */ |
mbed_official | 592:a274ee790e56 | 703 | #define MUX_PA10F_TCC0_WO2 5L |
mbed_official | 592:a274ee790e56 | 704 | #define PINMUX_PA10F_TCC0_WO2 ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2) |
mbed_official | 592:a274ee790e56 | 705 | #define PORT_PA10F_TCC0_WO2 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 706 | #define PIN_PA18F_TCC0_WO2 18L /**< \brief TCC0 signal: WO2 on PA18 mux F */ |
mbed_official | 592:a274ee790e56 | 707 | #define MUX_PA18F_TCC0_WO2 5L |
mbed_official | 592:a274ee790e56 | 708 | #define PINMUX_PA18F_TCC0_WO2 ((PIN_PA18F_TCC0_WO2 << 16) | MUX_PA18F_TCC0_WO2) |
mbed_official | 592:a274ee790e56 | 709 | #define PORT_PA18F_TCC0_WO2 (1ul << 18) |
mbed_official | 592:a274ee790e56 | 710 | #define PIN_PA11F_TCC0_WO3 11L /**< \brief TCC0 signal: WO3 on PA11 mux F */ |
mbed_official | 592:a274ee790e56 | 711 | #define MUX_PA11F_TCC0_WO3 5L |
mbed_official | 592:a274ee790e56 | 712 | #define PINMUX_PA11F_TCC0_WO3 ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3) |
mbed_official | 592:a274ee790e56 | 713 | #define PORT_PA11F_TCC0_WO3 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 714 | #define PIN_PA19F_TCC0_WO3 19L /**< \brief TCC0 signal: WO3 on PA19 mux F */ |
mbed_official | 592:a274ee790e56 | 715 | #define MUX_PA19F_TCC0_WO3 5L |
mbed_official | 592:a274ee790e56 | 716 | #define PINMUX_PA19F_TCC0_WO3 ((PIN_PA19F_TCC0_WO3 << 16) | MUX_PA19F_TCC0_WO3) |
mbed_official | 592:a274ee790e56 | 717 | #define PORT_PA19F_TCC0_WO3 (1ul << 19) |
mbed_official | 592:a274ee790e56 | 718 | #define PIN_PA14F_TCC0_WO4 14L /**< \brief TCC0 signal: WO4 on PA14 mux F */ |
mbed_official | 592:a274ee790e56 | 719 | #define MUX_PA14F_TCC0_WO4 5L |
mbed_official | 592:a274ee790e56 | 720 | #define PINMUX_PA14F_TCC0_WO4 ((PIN_PA14F_TCC0_WO4 << 16) | MUX_PA14F_TCC0_WO4) |
mbed_official | 592:a274ee790e56 | 721 | #define PORT_PA14F_TCC0_WO4 (1ul << 14) |
mbed_official | 592:a274ee790e56 | 722 | #define PIN_PA22F_TCC0_WO4 22L /**< \brief TCC0 signal: WO4 on PA22 mux F */ |
mbed_official | 592:a274ee790e56 | 723 | #define MUX_PA22F_TCC0_WO4 5L |
mbed_official | 592:a274ee790e56 | 724 | #define PINMUX_PA22F_TCC0_WO4 ((PIN_PA22F_TCC0_WO4 << 16) | MUX_PA22F_TCC0_WO4) |
mbed_official | 592:a274ee790e56 | 725 | #define PORT_PA22F_TCC0_WO4 (1ul << 22) |
mbed_official | 592:a274ee790e56 | 726 | #define PIN_PB10F_TCC0_WO4 42L /**< \brief TCC0 signal: WO4 on PB10 mux F */ |
mbed_official | 592:a274ee790e56 | 727 | #define MUX_PB10F_TCC0_WO4 5L |
mbed_official | 592:a274ee790e56 | 728 | #define PINMUX_PB10F_TCC0_WO4 ((PIN_PB10F_TCC0_WO4 << 16) | MUX_PB10F_TCC0_WO4) |
mbed_official | 592:a274ee790e56 | 729 | #define PORT_PB10F_TCC0_WO4 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 730 | #define PIN_PB16F_TCC0_WO4 48L /**< \brief TCC0 signal: WO4 on PB16 mux F */ |
mbed_official | 592:a274ee790e56 | 731 | #define MUX_PB16F_TCC0_WO4 5L |
mbed_official | 592:a274ee790e56 | 732 | #define PINMUX_PB16F_TCC0_WO4 ((PIN_PB16F_TCC0_WO4 << 16) | MUX_PB16F_TCC0_WO4) |
mbed_official | 592:a274ee790e56 | 733 | #define PORT_PB16F_TCC0_WO4 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 734 | #define PIN_PA15F_TCC0_WO5 15L /**< \brief TCC0 signal: WO5 on PA15 mux F */ |
mbed_official | 592:a274ee790e56 | 735 | #define MUX_PA15F_TCC0_WO5 5L |
mbed_official | 592:a274ee790e56 | 736 | #define PINMUX_PA15F_TCC0_WO5 ((PIN_PA15F_TCC0_WO5 << 16) | MUX_PA15F_TCC0_WO5) |
mbed_official | 592:a274ee790e56 | 737 | #define PORT_PA15F_TCC0_WO5 (1ul << 15) |
mbed_official | 592:a274ee790e56 | 738 | #define PIN_PA23F_TCC0_WO5 23L /**< \brief TCC0 signal: WO5 on PA23 mux F */ |
mbed_official | 592:a274ee790e56 | 739 | #define MUX_PA23F_TCC0_WO5 5L |
mbed_official | 592:a274ee790e56 | 740 | #define PINMUX_PA23F_TCC0_WO5 ((PIN_PA23F_TCC0_WO5 << 16) | MUX_PA23F_TCC0_WO5) |
mbed_official | 592:a274ee790e56 | 741 | #define PORT_PA23F_TCC0_WO5 (1ul << 23) |
mbed_official | 592:a274ee790e56 | 742 | #define PIN_PB11F_TCC0_WO5 43L /**< \brief TCC0 signal: WO5 on PB11 mux F */ |
mbed_official | 592:a274ee790e56 | 743 | #define MUX_PB11F_TCC0_WO5 5L |
mbed_official | 592:a274ee790e56 | 744 | #define PINMUX_PB11F_TCC0_WO5 ((PIN_PB11F_TCC0_WO5 << 16) | MUX_PB11F_TCC0_WO5) |
mbed_official | 592:a274ee790e56 | 745 | #define PORT_PB11F_TCC0_WO5 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 746 | #define PIN_PB17F_TCC0_WO5 49L /**< \brief TCC0 signal: WO5 on PB17 mux F */ |
mbed_official | 592:a274ee790e56 | 747 | #define MUX_PB17F_TCC0_WO5 5L |
mbed_official | 592:a274ee790e56 | 748 | #define PINMUX_PB17F_TCC0_WO5 ((PIN_PB17F_TCC0_WO5 << 16) | MUX_PB17F_TCC0_WO5) |
mbed_official | 592:a274ee790e56 | 749 | #define PORT_PB17F_TCC0_WO5 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 750 | #define PIN_PA12F_TCC0_WO6 12L /**< \brief TCC0 signal: WO6 on PA12 mux F */ |
mbed_official | 592:a274ee790e56 | 751 | #define MUX_PA12F_TCC0_WO6 5L |
mbed_official | 592:a274ee790e56 | 752 | #define PINMUX_PA12F_TCC0_WO6 ((PIN_PA12F_TCC0_WO6 << 16) | MUX_PA12F_TCC0_WO6) |
mbed_official | 592:a274ee790e56 | 753 | #define PORT_PA12F_TCC0_WO6 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 754 | #define PIN_PA20F_TCC0_WO6 20L /**< \brief TCC0 signal: WO6 on PA20 mux F */ |
mbed_official | 592:a274ee790e56 | 755 | #define MUX_PA20F_TCC0_WO6 5L |
mbed_official | 592:a274ee790e56 | 756 | #define PINMUX_PA20F_TCC0_WO6 ((PIN_PA20F_TCC0_WO6 << 16) | MUX_PA20F_TCC0_WO6) |
mbed_official | 592:a274ee790e56 | 757 | #define PORT_PA20F_TCC0_WO6 (1ul << 20) |
mbed_official | 592:a274ee790e56 | 758 | #define PIN_PB12F_TCC0_WO6 44L /**< \brief TCC0 signal: WO6 on PB12 mux F */ |
mbed_official | 592:a274ee790e56 | 759 | #define MUX_PB12F_TCC0_WO6 5L |
mbed_official | 592:a274ee790e56 | 760 | #define PINMUX_PB12F_TCC0_WO6 ((PIN_PB12F_TCC0_WO6 << 16) | MUX_PB12F_TCC0_WO6) |
mbed_official | 592:a274ee790e56 | 761 | #define PORT_PB12F_TCC0_WO6 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 762 | #define PIN_PA16F_TCC0_WO6 16L /**< \brief TCC0 signal: WO6 on PA16 mux F */ |
mbed_official | 592:a274ee790e56 | 763 | #define MUX_PA16F_TCC0_WO6 5L |
mbed_official | 592:a274ee790e56 | 764 | #define PINMUX_PA16F_TCC0_WO6 ((PIN_PA16F_TCC0_WO6 << 16) | MUX_PA16F_TCC0_WO6) |
mbed_official | 592:a274ee790e56 | 765 | #define PORT_PA16F_TCC0_WO6 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 766 | #define PIN_PA13F_TCC0_WO7 13L /**< \brief TCC0 signal: WO7 on PA13 mux F */ |
mbed_official | 592:a274ee790e56 | 767 | #define MUX_PA13F_TCC0_WO7 5L |
mbed_official | 592:a274ee790e56 | 768 | #define PINMUX_PA13F_TCC0_WO7 ((PIN_PA13F_TCC0_WO7 << 16) | MUX_PA13F_TCC0_WO7) |
mbed_official | 592:a274ee790e56 | 769 | #define PORT_PA13F_TCC0_WO7 (1ul << 13) |
mbed_official | 592:a274ee790e56 | 770 | #define PIN_PA21F_TCC0_WO7 21L /**< \brief TCC0 signal: WO7 on PA21 mux F */ |
mbed_official | 592:a274ee790e56 | 771 | #define MUX_PA21F_TCC0_WO7 5L |
mbed_official | 592:a274ee790e56 | 772 | #define PINMUX_PA21F_TCC0_WO7 ((PIN_PA21F_TCC0_WO7 << 16) | MUX_PA21F_TCC0_WO7) |
mbed_official | 592:a274ee790e56 | 773 | #define PORT_PA21F_TCC0_WO7 (1ul << 21) |
mbed_official | 592:a274ee790e56 | 774 | #define PIN_PB13F_TCC0_WO7 45L /**< \brief TCC0 signal: WO7 on PB13 mux F */ |
mbed_official | 592:a274ee790e56 | 775 | #define MUX_PB13F_TCC0_WO7 5L |
mbed_official | 592:a274ee790e56 | 776 | #define PINMUX_PB13F_TCC0_WO7 ((PIN_PB13F_TCC0_WO7 << 16) | MUX_PB13F_TCC0_WO7) |
mbed_official | 592:a274ee790e56 | 777 | #define PORT_PB13F_TCC0_WO7 (1ul << 13) |
mbed_official | 592:a274ee790e56 | 778 | #define PIN_PA17F_TCC0_WO7 17L /**< \brief TCC0 signal: WO7 on PA17 mux F */ |
mbed_official | 592:a274ee790e56 | 779 | #define MUX_PA17F_TCC0_WO7 5L |
mbed_official | 592:a274ee790e56 | 780 | #define PINMUX_PA17F_TCC0_WO7 ((PIN_PA17F_TCC0_WO7 << 16) | MUX_PA17F_TCC0_WO7) |
mbed_official | 592:a274ee790e56 | 781 | #define PORT_PA17F_TCC0_WO7 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 782 | /* ========== PORT definition for TCC1 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 783 | #define PIN_PA06E_TCC1_WO0 6L /**< \brief TCC1 signal: WO0 on PA06 mux E */ |
mbed_official | 592:a274ee790e56 | 784 | #define MUX_PA06E_TCC1_WO0 4L |
mbed_official | 592:a274ee790e56 | 785 | #define PINMUX_PA06E_TCC1_WO0 ((PIN_PA06E_TCC1_WO0 << 16) | MUX_PA06E_TCC1_WO0) |
mbed_official | 592:a274ee790e56 | 786 | #define PORT_PA06E_TCC1_WO0 (1ul << 6) |
mbed_official | 592:a274ee790e56 | 787 | #define PIN_PA10E_TCC1_WO0 10L /**< \brief TCC1 signal: WO0 on PA10 mux E */ |
mbed_official | 592:a274ee790e56 | 788 | #define MUX_PA10E_TCC1_WO0 4L |
mbed_official | 592:a274ee790e56 | 789 | #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0) |
mbed_official | 592:a274ee790e56 | 790 | #define PORT_PA10E_TCC1_WO0 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 791 | #define PIN_PA30E_TCC1_WO0 30L /**< \brief TCC1 signal: WO0 on PA30 mux E */ |
mbed_official | 592:a274ee790e56 | 792 | #define MUX_PA30E_TCC1_WO0 4L |
mbed_official | 592:a274ee790e56 | 793 | #define PINMUX_PA30E_TCC1_WO0 ((PIN_PA30E_TCC1_WO0 << 16) | MUX_PA30E_TCC1_WO0) |
mbed_official | 592:a274ee790e56 | 794 | #define PORT_PA30E_TCC1_WO0 (1ul << 30) |
mbed_official | 592:a274ee790e56 | 795 | #define PIN_PA07E_TCC1_WO1 7L /**< \brief TCC1 signal: WO1 on PA07 mux E */ |
mbed_official | 592:a274ee790e56 | 796 | #define MUX_PA07E_TCC1_WO1 4L |
mbed_official | 592:a274ee790e56 | 797 | #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1) |
mbed_official | 592:a274ee790e56 | 798 | #define PORT_PA07E_TCC1_WO1 (1ul << 7) |
mbed_official | 592:a274ee790e56 | 799 | #define PIN_PA11E_TCC1_WO1 11L /**< \brief TCC1 signal: WO1 on PA11 mux E */ |
mbed_official | 592:a274ee790e56 | 800 | #define MUX_PA11E_TCC1_WO1 4L |
mbed_official | 592:a274ee790e56 | 801 | #define PINMUX_PA11E_TCC1_WO1 ((PIN_PA11E_TCC1_WO1 << 16) | MUX_PA11E_TCC1_WO1) |
mbed_official | 592:a274ee790e56 | 802 | #define PORT_PA11E_TCC1_WO1 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 803 | #define PIN_PA31E_TCC1_WO1 31L /**< \brief TCC1 signal: WO1 on PA31 mux E */ |
mbed_official | 592:a274ee790e56 | 804 | #define MUX_PA31E_TCC1_WO1 4L |
mbed_official | 592:a274ee790e56 | 805 | #define PINMUX_PA31E_TCC1_WO1 ((PIN_PA31E_TCC1_WO1 << 16) | MUX_PA31E_TCC1_WO1) |
mbed_official | 592:a274ee790e56 | 806 | #define PORT_PA31E_TCC1_WO1 (1ul << 31) |
mbed_official | 592:a274ee790e56 | 807 | #define PIN_PA08F_TCC1_WO2 8L /**< \brief TCC1 signal: WO2 on PA08 mux F */ |
mbed_official | 592:a274ee790e56 | 808 | #define MUX_PA08F_TCC1_WO2 5L |
mbed_official | 592:a274ee790e56 | 809 | #define PINMUX_PA08F_TCC1_WO2 ((PIN_PA08F_TCC1_WO2 << 16) | MUX_PA08F_TCC1_WO2) |
mbed_official | 592:a274ee790e56 | 810 | #define PORT_PA08F_TCC1_WO2 (1ul << 8) |
mbed_official | 592:a274ee790e56 | 811 | #define PIN_PA24F_TCC1_WO2 24L /**< \brief TCC1 signal: WO2 on PA24 mux F */ |
mbed_official | 592:a274ee790e56 | 812 | #define MUX_PA24F_TCC1_WO2 5L |
mbed_official | 592:a274ee790e56 | 813 | #define PINMUX_PA24F_TCC1_WO2 ((PIN_PA24F_TCC1_WO2 << 16) | MUX_PA24F_TCC1_WO2) |
mbed_official | 592:a274ee790e56 | 814 | #define PORT_PA24F_TCC1_WO2 (1ul << 24) |
mbed_official | 592:a274ee790e56 | 815 | #define PIN_PB30F_TCC1_WO2 62L /**< \brief TCC1 signal: WO2 on PB30 mux F */ |
mbed_official | 592:a274ee790e56 | 816 | #define MUX_PB30F_TCC1_WO2 5L |
mbed_official | 592:a274ee790e56 | 817 | #define PINMUX_PB30F_TCC1_WO2 ((PIN_PB30F_TCC1_WO2 << 16) | MUX_PB30F_TCC1_WO2) |
mbed_official | 592:a274ee790e56 | 818 | #define PORT_PB30F_TCC1_WO2 (1ul << 30) |
mbed_official | 592:a274ee790e56 | 819 | #define PIN_PA09F_TCC1_WO3 9L /**< \brief TCC1 signal: WO3 on PA09 mux F */ |
mbed_official | 592:a274ee790e56 | 820 | #define MUX_PA09F_TCC1_WO3 5L |
mbed_official | 592:a274ee790e56 | 821 | #define PINMUX_PA09F_TCC1_WO3 ((PIN_PA09F_TCC1_WO3 << 16) | MUX_PA09F_TCC1_WO3) |
mbed_official | 592:a274ee790e56 | 822 | #define PORT_PA09F_TCC1_WO3 (1ul << 9) |
mbed_official | 592:a274ee790e56 | 823 | #define PIN_PA25F_TCC1_WO3 25L /**< \brief TCC1 signal: WO3 on PA25 mux F */ |
mbed_official | 592:a274ee790e56 | 824 | #define MUX_PA25F_TCC1_WO3 5L |
mbed_official | 592:a274ee790e56 | 825 | #define PINMUX_PA25F_TCC1_WO3 ((PIN_PA25F_TCC1_WO3 << 16) | MUX_PA25F_TCC1_WO3) |
mbed_official | 592:a274ee790e56 | 826 | #define PORT_PA25F_TCC1_WO3 (1ul << 25) |
mbed_official | 592:a274ee790e56 | 827 | #define PIN_PB31F_TCC1_WO3 63L /**< \brief TCC1 signal: WO3 on PB31 mux F */ |
mbed_official | 592:a274ee790e56 | 828 | #define MUX_PB31F_TCC1_WO3 5L |
mbed_official | 592:a274ee790e56 | 829 | #define PINMUX_PB31F_TCC1_WO3 ((PIN_PB31F_TCC1_WO3 << 16) | MUX_PB31F_TCC1_WO3) |
mbed_official | 592:a274ee790e56 | 830 | #define PORT_PB31F_TCC1_WO3 (1ul << 31) |
mbed_official | 592:a274ee790e56 | 831 | /* ========== PORT definition for TCC2 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 832 | #define PIN_PA12E_TCC2_WO0 12L /**< \brief TCC2 signal: WO0 on PA12 mux E */ |
mbed_official | 592:a274ee790e56 | 833 | #define MUX_PA12E_TCC2_WO0 4L |
mbed_official | 592:a274ee790e56 | 834 | #define PINMUX_PA12E_TCC2_WO0 ((PIN_PA12E_TCC2_WO0 << 16) | MUX_PA12E_TCC2_WO0) |
mbed_official | 592:a274ee790e56 | 835 | #define PORT_PA12E_TCC2_WO0 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 836 | #define PIN_PA16E_TCC2_WO0 16L /**< \brief TCC2 signal: WO0 on PA16 mux E */ |
mbed_official | 592:a274ee790e56 | 837 | #define MUX_PA16E_TCC2_WO0 4L |
mbed_official | 592:a274ee790e56 | 838 | #define PINMUX_PA16E_TCC2_WO0 ((PIN_PA16E_TCC2_WO0 << 16) | MUX_PA16E_TCC2_WO0) |
mbed_official | 592:a274ee790e56 | 839 | #define PORT_PA16E_TCC2_WO0 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 840 | #define PIN_PA00E_TCC2_WO0 0L /**< \brief TCC2 signal: WO0 on PA00 mux E */ |
mbed_official | 592:a274ee790e56 | 841 | #define MUX_PA00E_TCC2_WO0 4L |
mbed_official | 592:a274ee790e56 | 842 | #define PINMUX_PA00E_TCC2_WO0 ((PIN_PA00E_TCC2_WO0 << 16) | MUX_PA00E_TCC2_WO0) |
mbed_official | 592:a274ee790e56 | 843 | #define PORT_PA00E_TCC2_WO0 (1ul << 0) |
mbed_official | 592:a274ee790e56 | 844 | #define PIN_PA13E_TCC2_WO1 13L /**< \brief TCC2 signal: WO1 on PA13 mux E */ |
mbed_official | 592:a274ee790e56 | 845 | #define MUX_PA13E_TCC2_WO1 4L |
mbed_official | 592:a274ee790e56 | 846 | #define PINMUX_PA13E_TCC2_WO1 ((PIN_PA13E_TCC2_WO1 << 16) | MUX_PA13E_TCC2_WO1) |
mbed_official | 592:a274ee790e56 | 847 | #define PORT_PA13E_TCC2_WO1 (1ul << 13) |
mbed_official | 592:a274ee790e56 | 848 | #define PIN_PA17E_TCC2_WO1 17L /**< \brief TCC2 signal: WO1 on PA17 mux E */ |
mbed_official | 592:a274ee790e56 | 849 | #define MUX_PA17E_TCC2_WO1 4L |
mbed_official | 592:a274ee790e56 | 850 | #define PINMUX_PA17E_TCC2_WO1 ((PIN_PA17E_TCC2_WO1 << 16) | MUX_PA17E_TCC2_WO1) |
mbed_official | 592:a274ee790e56 | 851 | #define PORT_PA17E_TCC2_WO1 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 852 | #define PIN_PA01E_TCC2_WO1 1L /**< \brief TCC2 signal: WO1 on PA01 mux E */ |
mbed_official | 592:a274ee790e56 | 853 | #define MUX_PA01E_TCC2_WO1 4L |
mbed_official | 592:a274ee790e56 | 854 | #define PINMUX_PA01E_TCC2_WO1 ((PIN_PA01E_TCC2_WO1 << 16) | MUX_PA01E_TCC2_WO1) |
mbed_official | 592:a274ee790e56 | 855 | #define PORT_PA01E_TCC2_WO1 (1ul << 1) |
mbed_official | 592:a274ee790e56 | 856 | /* ========== PORT definition for TC3 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 857 | #define PIN_PA18E_TC3_WO0 18L /**< \brief TC3 signal: WO0 on PA18 mux E */ |
mbed_official | 592:a274ee790e56 | 858 | #define MUX_PA18E_TC3_WO0 4L |
mbed_official | 592:a274ee790e56 | 859 | #define PINMUX_PA18E_TC3_WO0 ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0) |
mbed_official | 592:a274ee790e56 | 860 | #define PORT_PA18E_TC3_WO0 (1ul << 18) |
mbed_official | 592:a274ee790e56 | 861 | #define PIN_PA14E_TC3_WO0 14L /**< \brief TC3 signal: WO0 on PA14 mux E */ |
mbed_official | 592:a274ee790e56 | 862 | #define MUX_PA14E_TC3_WO0 4L |
mbed_official | 592:a274ee790e56 | 863 | #define PINMUX_PA14E_TC3_WO0 ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0) |
mbed_official | 592:a274ee790e56 | 864 | #define PORT_PA14E_TC3_WO0 (1ul << 14) |
mbed_official | 592:a274ee790e56 | 865 | #define PIN_PA19E_TC3_WO1 19L /**< \brief TC3 signal: WO1 on PA19 mux E */ |
mbed_official | 592:a274ee790e56 | 866 | #define MUX_PA19E_TC3_WO1 4L |
mbed_official | 592:a274ee790e56 | 867 | #define PINMUX_PA19E_TC3_WO1 ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1) |
mbed_official | 592:a274ee790e56 | 868 | #define PORT_PA19E_TC3_WO1 (1ul << 19) |
mbed_official | 592:a274ee790e56 | 869 | #define PIN_PA15E_TC3_WO1 15L /**< \brief TC3 signal: WO1 on PA15 mux E */ |
mbed_official | 592:a274ee790e56 | 870 | #define MUX_PA15E_TC3_WO1 4L |
mbed_official | 592:a274ee790e56 | 871 | #define PINMUX_PA15E_TC3_WO1 ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1) |
mbed_official | 592:a274ee790e56 | 872 | #define PORT_PA15E_TC3_WO1 (1ul << 15) |
mbed_official | 592:a274ee790e56 | 873 | /* ========== PORT definition for TC4 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 874 | #define PIN_PA22E_TC4_WO0 22L /**< \brief TC4 signal: WO0 on PA22 mux E */ |
mbed_official | 592:a274ee790e56 | 875 | #define MUX_PA22E_TC4_WO0 4L |
mbed_official | 592:a274ee790e56 | 876 | #define PINMUX_PA22E_TC4_WO0 ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0) |
mbed_official | 592:a274ee790e56 | 877 | #define PORT_PA22E_TC4_WO0 (1ul << 22) |
mbed_official | 592:a274ee790e56 | 878 | #define PIN_PB08E_TC4_WO0 40L /**< \brief TC4 signal: WO0 on PB08 mux E */ |
mbed_official | 592:a274ee790e56 | 879 | #define MUX_PB08E_TC4_WO0 4L |
mbed_official | 592:a274ee790e56 | 880 | #define PINMUX_PB08E_TC4_WO0 ((PIN_PB08E_TC4_WO0 << 16) | MUX_PB08E_TC4_WO0) |
mbed_official | 592:a274ee790e56 | 881 | #define PORT_PB08E_TC4_WO0 (1ul << 8) |
mbed_official | 592:a274ee790e56 | 882 | #define PIN_PB12E_TC4_WO0 44L /**< \brief TC4 signal: WO0 on PB12 mux E */ |
mbed_official | 592:a274ee790e56 | 883 | #define MUX_PB12E_TC4_WO0 4L |
mbed_official | 592:a274ee790e56 | 884 | #define PINMUX_PB12E_TC4_WO0 ((PIN_PB12E_TC4_WO0 << 16) | MUX_PB12E_TC4_WO0) |
mbed_official | 592:a274ee790e56 | 885 | #define PORT_PB12E_TC4_WO0 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 886 | #define PIN_PA23E_TC4_WO1 23L /**< \brief TC4 signal: WO1 on PA23 mux E */ |
mbed_official | 592:a274ee790e56 | 887 | #define MUX_PA23E_TC4_WO1 4L |
mbed_official | 592:a274ee790e56 | 888 | #define PINMUX_PA23E_TC4_WO1 ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1) |
mbed_official | 592:a274ee790e56 | 889 | #define PORT_PA23E_TC4_WO1 (1ul << 23) |
mbed_official | 592:a274ee790e56 | 890 | #define PIN_PB09E_TC4_WO1 41L /**< \brief TC4 signal: WO1 on PB09 mux E */ |
mbed_official | 592:a274ee790e56 | 891 | #define MUX_PB09E_TC4_WO1 4L |
mbed_official | 592:a274ee790e56 | 892 | #define PINMUX_PB09E_TC4_WO1 ((PIN_PB09E_TC4_WO1 << 16) | MUX_PB09E_TC4_WO1) |
mbed_official | 592:a274ee790e56 | 893 | #define PORT_PB09E_TC4_WO1 (1ul << 9) |
mbed_official | 592:a274ee790e56 | 894 | #define PIN_PB13E_TC4_WO1 45L /**< \brief TC4 signal: WO1 on PB13 mux E */ |
mbed_official | 592:a274ee790e56 | 895 | #define MUX_PB13E_TC4_WO1 4L |
mbed_official | 592:a274ee790e56 | 896 | #define PINMUX_PB13E_TC4_WO1 ((PIN_PB13E_TC4_WO1 << 16) | MUX_PB13E_TC4_WO1) |
mbed_official | 592:a274ee790e56 | 897 | #define PORT_PB13E_TC4_WO1 (1ul << 13) |
mbed_official | 592:a274ee790e56 | 898 | /* ========== PORT definition for TC5 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 899 | #define PIN_PA24E_TC5_WO0 24L /**< \brief TC5 signal: WO0 on PA24 mux E */ |
mbed_official | 592:a274ee790e56 | 900 | #define MUX_PA24E_TC5_WO0 4L |
mbed_official | 592:a274ee790e56 | 901 | #define PINMUX_PA24E_TC5_WO0 ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0) |
mbed_official | 592:a274ee790e56 | 902 | #define PORT_PA24E_TC5_WO0 (1ul << 24) |
mbed_official | 592:a274ee790e56 | 903 | #define PIN_PB10E_TC5_WO0 42L /**< \brief TC5 signal: WO0 on PB10 mux E */ |
mbed_official | 592:a274ee790e56 | 904 | #define MUX_PB10E_TC5_WO0 4L |
mbed_official | 592:a274ee790e56 | 905 | #define PINMUX_PB10E_TC5_WO0 ((PIN_PB10E_TC5_WO0 << 16) | MUX_PB10E_TC5_WO0) |
mbed_official | 592:a274ee790e56 | 906 | #define PORT_PB10E_TC5_WO0 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 907 | #define PIN_PB14E_TC5_WO0 46L /**< \brief TC5 signal: WO0 on PB14 mux E */ |
mbed_official | 592:a274ee790e56 | 908 | #define MUX_PB14E_TC5_WO0 4L |
mbed_official | 592:a274ee790e56 | 909 | #define PINMUX_PB14E_TC5_WO0 ((PIN_PB14E_TC5_WO0 << 16) | MUX_PB14E_TC5_WO0) |
mbed_official | 592:a274ee790e56 | 910 | #define PORT_PB14E_TC5_WO0 (1ul << 14) |
mbed_official | 592:a274ee790e56 | 911 | #define PIN_PA25E_TC5_WO1 25L /**< \brief TC5 signal: WO1 on PA25 mux E */ |
mbed_official | 592:a274ee790e56 | 912 | #define MUX_PA25E_TC5_WO1 4L |
mbed_official | 592:a274ee790e56 | 913 | #define PINMUX_PA25E_TC5_WO1 ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1) |
mbed_official | 592:a274ee790e56 | 914 | #define PORT_PA25E_TC5_WO1 (1ul << 25) |
mbed_official | 592:a274ee790e56 | 915 | #define PIN_PB11E_TC5_WO1 43L /**< \brief TC5 signal: WO1 on PB11 mux E */ |
mbed_official | 592:a274ee790e56 | 916 | #define MUX_PB11E_TC5_WO1 4L |
mbed_official | 592:a274ee790e56 | 917 | #define PINMUX_PB11E_TC5_WO1 ((PIN_PB11E_TC5_WO1 << 16) | MUX_PB11E_TC5_WO1) |
mbed_official | 592:a274ee790e56 | 918 | #define PORT_PB11E_TC5_WO1 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 919 | #define PIN_PB15E_TC5_WO1 47L /**< \brief TC5 signal: WO1 on PB15 mux E */ |
mbed_official | 592:a274ee790e56 | 920 | #define MUX_PB15E_TC5_WO1 4L |
mbed_official | 592:a274ee790e56 | 921 | #define PINMUX_PB15E_TC5_WO1 ((PIN_PB15E_TC5_WO1 << 16) | MUX_PB15E_TC5_WO1) |
mbed_official | 592:a274ee790e56 | 922 | #define PORT_PB15E_TC5_WO1 (1ul << 15) |
mbed_official | 592:a274ee790e56 | 923 | /* ========== PORT definition for TC6 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 924 | #define PIN_PB02E_TC6_WO0 34L /**< \brief TC6 signal: WO0 on PB02 mux E */ |
mbed_official | 592:a274ee790e56 | 925 | #define MUX_PB02E_TC6_WO0 4L |
mbed_official | 592:a274ee790e56 | 926 | #define PINMUX_PB02E_TC6_WO0 ((PIN_PB02E_TC6_WO0 << 16) | MUX_PB02E_TC6_WO0) |
mbed_official | 592:a274ee790e56 | 927 | #define PORT_PB02E_TC6_WO0 (1ul << 2) |
mbed_official | 592:a274ee790e56 | 928 | #define PIN_PB16E_TC6_WO0 48L /**< \brief TC6 signal: WO0 on PB16 mux E */ |
mbed_official | 592:a274ee790e56 | 929 | #define MUX_PB16E_TC6_WO0 4L |
mbed_official | 592:a274ee790e56 | 930 | #define PINMUX_PB16E_TC6_WO0 ((PIN_PB16E_TC6_WO0 << 16) | MUX_PB16E_TC6_WO0) |
mbed_official | 592:a274ee790e56 | 931 | #define PORT_PB16E_TC6_WO0 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 932 | #define PIN_PB03E_TC6_WO1 35L /**< \brief TC6 signal: WO1 on PB03 mux E */ |
mbed_official | 592:a274ee790e56 | 933 | #define MUX_PB03E_TC6_WO1 4L |
mbed_official | 592:a274ee790e56 | 934 | #define PINMUX_PB03E_TC6_WO1 ((PIN_PB03E_TC6_WO1 << 16) | MUX_PB03E_TC6_WO1) |
mbed_official | 592:a274ee790e56 | 935 | #define PORT_PB03E_TC6_WO1 (1ul << 3) |
mbed_official | 592:a274ee790e56 | 936 | #define PIN_PB17E_TC6_WO1 49L /**< \brief TC6 signal: WO1 on PB17 mux E */ |
mbed_official | 592:a274ee790e56 | 937 | #define MUX_PB17E_TC6_WO1 4L |
mbed_official | 592:a274ee790e56 | 938 | #define PINMUX_PB17E_TC6_WO1 ((PIN_PB17E_TC6_WO1 << 16) | MUX_PB17E_TC6_WO1) |
mbed_official | 592:a274ee790e56 | 939 | #define PORT_PB17E_TC6_WO1 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 940 | /* ========== PORT definition for TC7 peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 941 | #define PIN_PA20E_TC7_WO0 20L /**< \brief TC7 signal: WO0 on PA20 mux E */ |
mbed_official | 592:a274ee790e56 | 942 | #define MUX_PA20E_TC7_WO0 4L |
mbed_official | 592:a274ee790e56 | 943 | #define PINMUX_PA20E_TC7_WO0 ((PIN_PA20E_TC7_WO0 << 16) | MUX_PA20E_TC7_WO0) |
mbed_official | 592:a274ee790e56 | 944 | #define PORT_PA20E_TC7_WO0 (1ul << 20) |
mbed_official | 592:a274ee790e56 | 945 | #define PIN_PB00E_TC7_WO0 32L /**< \brief TC7 signal: WO0 on PB00 mux E */ |
mbed_official | 592:a274ee790e56 | 946 | #define MUX_PB00E_TC7_WO0 4L |
mbed_official | 592:a274ee790e56 | 947 | #define PINMUX_PB00E_TC7_WO0 ((PIN_PB00E_TC7_WO0 << 16) | MUX_PB00E_TC7_WO0) |
mbed_official | 592:a274ee790e56 | 948 | #define PORT_PB00E_TC7_WO0 (1ul << 0) |
mbed_official | 592:a274ee790e56 | 949 | #define PIN_PB22E_TC7_WO0 54L /**< \brief TC7 signal: WO0 on PB22 mux E */ |
mbed_official | 592:a274ee790e56 | 950 | #define MUX_PB22E_TC7_WO0 4L |
mbed_official | 592:a274ee790e56 | 951 | #define PINMUX_PB22E_TC7_WO0 ((PIN_PB22E_TC7_WO0 << 16) | MUX_PB22E_TC7_WO0) |
mbed_official | 592:a274ee790e56 | 952 | #define PORT_PB22E_TC7_WO0 (1ul << 22) |
mbed_official | 592:a274ee790e56 | 953 | #define PIN_PA21E_TC7_WO1 21L /**< \brief TC7 signal: WO1 on PA21 mux E */ |
mbed_official | 592:a274ee790e56 | 954 | #define MUX_PA21E_TC7_WO1 4L |
mbed_official | 592:a274ee790e56 | 955 | #define PINMUX_PA21E_TC7_WO1 ((PIN_PA21E_TC7_WO1 << 16) | MUX_PA21E_TC7_WO1) |
mbed_official | 592:a274ee790e56 | 956 | #define PORT_PA21E_TC7_WO1 (1ul << 21) |
mbed_official | 592:a274ee790e56 | 957 | #define PIN_PB01E_TC7_WO1 33L /**< \brief TC7 signal: WO1 on PB01 mux E */ |
mbed_official | 592:a274ee790e56 | 958 | #define MUX_PB01E_TC7_WO1 4L |
mbed_official | 592:a274ee790e56 | 959 | #define PINMUX_PB01E_TC7_WO1 ((PIN_PB01E_TC7_WO1 << 16) | MUX_PB01E_TC7_WO1) |
mbed_official | 592:a274ee790e56 | 960 | #define PORT_PB01E_TC7_WO1 (1ul << 1) |
mbed_official | 592:a274ee790e56 | 961 | #define PIN_PB23E_TC7_WO1 55L /**< \brief TC7 signal: WO1 on PB23 mux E */ |
mbed_official | 592:a274ee790e56 | 962 | #define MUX_PB23E_TC7_WO1 4L |
mbed_official | 592:a274ee790e56 | 963 | #define PINMUX_PB23E_TC7_WO1 ((PIN_PB23E_TC7_WO1 << 16) | MUX_PB23E_TC7_WO1) |
mbed_official | 592:a274ee790e56 | 964 | #define PORT_PB23E_TC7_WO1 (1ul << 23) |
mbed_official | 592:a274ee790e56 | 965 | /* ========== PORT definition for ADC peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 966 | #define PIN_PA02B_ADC_AIN0 2L /**< \brief ADC signal: AIN0 on PA02 mux B */ |
mbed_official | 592:a274ee790e56 | 967 | #define MUX_PA02B_ADC_AIN0 1L |
mbed_official | 592:a274ee790e56 | 968 | #define PINMUX_PA02B_ADC_AIN0 ((PIN_PA02B_ADC_AIN0 << 16) | MUX_PA02B_ADC_AIN0) |
mbed_official | 592:a274ee790e56 | 969 | #define PORT_PA02B_ADC_AIN0 (1ul << 2) |
mbed_official | 592:a274ee790e56 | 970 | #define PIN_PA03B_ADC_AIN1 3L /**< \brief ADC signal: AIN1 on PA03 mux B */ |
mbed_official | 592:a274ee790e56 | 971 | #define MUX_PA03B_ADC_AIN1 1L |
mbed_official | 592:a274ee790e56 | 972 | #define PINMUX_PA03B_ADC_AIN1 ((PIN_PA03B_ADC_AIN1 << 16) | MUX_PA03B_ADC_AIN1) |
mbed_official | 592:a274ee790e56 | 973 | #define PORT_PA03B_ADC_AIN1 (1ul << 3) |
mbed_official | 592:a274ee790e56 | 974 | #define PIN_PB08B_ADC_AIN2 40L /**< \brief ADC signal: AIN2 on PB08 mux B */ |
mbed_official | 592:a274ee790e56 | 975 | #define MUX_PB08B_ADC_AIN2 1L |
mbed_official | 592:a274ee790e56 | 976 | #define PINMUX_PB08B_ADC_AIN2 ((PIN_PB08B_ADC_AIN2 << 16) | MUX_PB08B_ADC_AIN2) |
mbed_official | 592:a274ee790e56 | 977 | #define PORT_PB08B_ADC_AIN2 (1ul << 8) |
mbed_official | 592:a274ee790e56 | 978 | #define PIN_PB09B_ADC_AIN3 41L /**< \brief ADC signal: AIN3 on PB09 mux B */ |
mbed_official | 592:a274ee790e56 | 979 | #define MUX_PB09B_ADC_AIN3 1L |
mbed_official | 592:a274ee790e56 | 980 | #define PINMUX_PB09B_ADC_AIN3 ((PIN_PB09B_ADC_AIN3 << 16) | MUX_PB09B_ADC_AIN3) |
mbed_official | 592:a274ee790e56 | 981 | #define PORT_PB09B_ADC_AIN3 (1ul << 9) |
mbed_official | 592:a274ee790e56 | 982 | #define PIN_PA04B_ADC_AIN4 4L /**< \brief ADC signal: AIN4 on PA04 mux B */ |
mbed_official | 592:a274ee790e56 | 983 | #define MUX_PA04B_ADC_AIN4 1L |
mbed_official | 592:a274ee790e56 | 984 | #define PINMUX_PA04B_ADC_AIN4 ((PIN_PA04B_ADC_AIN4 << 16) | MUX_PA04B_ADC_AIN4) |
mbed_official | 592:a274ee790e56 | 985 | #define PORT_PA04B_ADC_AIN4 (1ul << 4) |
mbed_official | 592:a274ee790e56 | 986 | #define PIN_PA05B_ADC_AIN5 5L /**< \brief ADC signal: AIN5 on PA05 mux B */ |
mbed_official | 592:a274ee790e56 | 987 | #define MUX_PA05B_ADC_AIN5 1L |
mbed_official | 592:a274ee790e56 | 988 | #define PINMUX_PA05B_ADC_AIN5 ((PIN_PA05B_ADC_AIN5 << 16) | MUX_PA05B_ADC_AIN5) |
mbed_official | 592:a274ee790e56 | 989 | #define PORT_PA05B_ADC_AIN5 (1ul << 5) |
mbed_official | 592:a274ee790e56 | 990 | #define PIN_PA06B_ADC_AIN6 6L /**< \brief ADC signal: AIN6 on PA06 mux B */ |
mbed_official | 592:a274ee790e56 | 991 | #define MUX_PA06B_ADC_AIN6 1L |
mbed_official | 592:a274ee790e56 | 992 | #define PINMUX_PA06B_ADC_AIN6 ((PIN_PA06B_ADC_AIN6 << 16) | MUX_PA06B_ADC_AIN6) |
mbed_official | 592:a274ee790e56 | 993 | #define PORT_PA06B_ADC_AIN6 (1ul << 6) |
mbed_official | 592:a274ee790e56 | 994 | #define PIN_PA07B_ADC_AIN7 7L /**< \brief ADC signal: AIN7 on PA07 mux B */ |
mbed_official | 592:a274ee790e56 | 995 | #define MUX_PA07B_ADC_AIN7 1L |
mbed_official | 592:a274ee790e56 | 996 | #define PINMUX_PA07B_ADC_AIN7 ((PIN_PA07B_ADC_AIN7 << 16) | MUX_PA07B_ADC_AIN7) |
mbed_official | 592:a274ee790e56 | 997 | #define PORT_PA07B_ADC_AIN7 (1ul << 7) |
mbed_official | 592:a274ee790e56 | 998 | #define PIN_PB00B_ADC_AIN8 32L /**< \brief ADC signal: AIN8 on PB00 mux B */ |
mbed_official | 592:a274ee790e56 | 999 | #define MUX_PB00B_ADC_AIN8 1L |
mbed_official | 592:a274ee790e56 | 1000 | #define PINMUX_PB00B_ADC_AIN8 ((PIN_PB00B_ADC_AIN8 << 16) | MUX_PB00B_ADC_AIN8) |
mbed_official | 592:a274ee790e56 | 1001 | #define PORT_PB00B_ADC_AIN8 (1ul << 0) |
mbed_official | 592:a274ee790e56 | 1002 | #define PIN_PB01B_ADC_AIN9 33L /**< \brief ADC signal: AIN9 on PB01 mux B */ |
mbed_official | 592:a274ee790e56 | 1003 | #define MUX_PB01B_ADC_AIN9 1L |
mbed_official | 592:a274ee790e56 | 1004 | #define PINMUX_PB01B_ADC_AIN9 ((PIN_PB01B_ADC_AIN9 << 16) | MUX_PB01B_ADC_AIN9) |
mbed_official | 592:a274ee790e56 | 1005 | #define PORT_PB01B_ADC_AIN9 (1ul << 1) |
mbed_official | 592:a274ee790e56 | 1006 | #define PIN_PB02B_ADC_AIN10 34L /**< \brief ADC signal: AIN10 on PB02 mux B */ |
mbed_official | 592:a274ee790e56 | 1007 | #define MUX_PB02B_ADC_AIN10 1L |
mbed_official | 592:a274ee790e56 | 1008 | #define PINMUX_PB02B_ADC_AIN10 ((PIN_PB02B_ADC_AIN10 << 16) | MUX_PB02B_ADC_AIN10) |
mbed_official | 592:a274ee790e56 | 1009 | #define PORT_PB02B_ADC_AIN10 (1ul << 2) |
mbed_official | 592:a274ee790e56 | 1010 | #define PIN_PB03B_ADC_AIN11 35L /**< \brief ADC signal: AIN11 on PB03 mux B */ |
mbed_official | 592:a274ee790e56 | 1011 | #define MUX_PB03B_ADC_AIN11 1L |
mbed_official | 592:a274ee790e56 | 1012 | #define PINMUX_PB03B_ADC_AIN11 ((PIN_PB03B_ADC_AIN11 << 16) | MUX_PB03B_ADC_AIN11) |
mbed_official | 592:a274ee790e56 | 1013 | #define PORT_PB03B_ADC_AIN11 (1ul << 3) |
mbed_official | 592:a274ee790e56 | 1014 | #define PIN_PB04B_ADC_AIN12 36L /**< \brief ADC signal: AIN12 on PB04 mux B */ |
mbed_official | 592:a274ee790e56 | 1015 | #define MUX_PB04B_ADC_AIN12 1L |
mbed_official | 592:a274ee790e56 | 1016 | #define PINMUX_PB04B_ADC_AIN12 ((PIN_PB04B_ADC_AIN12 << 16) | MUX_PB04B_ADC_AIN12) |
mbed_official | 592:a274ee790e56 | 1017 | #define PORT_PB04B_ADC_AIN12 (1ul << 4) |
mbed_official | 592:a274ee790e56 | 1018 | #define PIN_PB05B_ADC_AIN13 37L /**< \brief ADC signal: AIN13 on PB05 mux B */ |
mbed_official | 592:a274ee790e56 | 1019 | #define MUX_PB05B_ADC_AIN13 1L |
mbed_official | 592:a274ee790e56 | 1020 | #define PINMUX_PB05B_ADC_AIN13 ((PIN_PB05B_ADC_AIN13 << 16) | MUX_PB05B_ADC_AIN13) |
mbed_official | 592:a274ee790e56 | 1021 | #define PORT_PB05B_ADC_AIN13 (1ul << 5) |
mbed_official | 592:a274ee790e56 | 1022 | #define PIN_PB06B_ADC_AIN14 38L /**< \brief ADC signal: AIN14 on PB06 mux B */ |
mbed_official | 592:a274ee790e56 | 1023 | #define MUX_PB06B_ADC_AIN14 1L |
mbed_official | 592:a274ee790e56 | 1024 | #define PINMUX_PB06B_ADC_AIN14 ((PIN_PB06B_ADC_AIN14 << 16) | MUX_PB06B_ADC_AIN14) |
mbed_official | 592:a274ee790e56 | 1025 | #define PORT_PB06B_ADC_AIN14 (1ul << 6) |
mbed_official | 592:a274ee790e56 | 1026 | #define PIN_PB07B_ADC_AIN15 39L /**< \brief ADC signal: AIN15 on PB07 mux B */ |
mbed_official | 592:a274ee790e56 | 1027 | #define MUX_PB07B_ADC_AIN15 1L |
mbed_official | 592:a274ee790e56 | 1028 | #define PINMUX_PB07B_ADC_AIN15 ((PIN_PB07B_ADC_AIN15 << 16) | MUX_PB07B_ADC_AIN15) |
mbed_official | 592:a274ee790e56 | 1029 | #define PORT_PB07B_ADC_AIN15 (1ul << 7) |
mbed_official | 592:a274ee790e56 | 1030 | #define PIN_PA08B_ADC_AIN16 8L /**< \brief ADC signal: AIN16 on PA08 mux B */ |
mbed_official | 592:a274ee790e56 | 1031 | #define MUX_PA08B_ADC_AIN16 1L |
mbed_official | 592:a274ee790e56 | 1032 | #define PINMUX_PA08B_ADC_AIN16 ((PIN_PA08B_ADC_AIN16 << 16) | MUX_PA08B_ADC_AIN16) |
mbed_official | 592:a274ee790e56 | 1033 | #define PORT_PA08B_ADC_AIN16 (1ul << 8) |
mbed_official | 592:a274ee790e56 | 1034 | #define PIN_PA09B_ADC_AIN17 9L /**< \brief ADC signal: AIN17 on PA09 mux B */ |
mbed_official | 592:a274ee790e56 | 1035 | #define MUX_PA09B_ADC_AIN17 1L |
mbed_official | 592:a274ee790e56 | 1036 | #define PINMUX_PA09B_ADC_AIN17 ((PIN_PA09B_ADC_AIN17 << 16) | MUX_PA09B_ADC_AIN17) |
mbed_official | 592:a274ee790e56 | 1037 | #define PORT_PA09B_ADC_AIN17 (1ul << 9) |
mbed_official | 592:a274ee790e56 | 1038 | #define PIN_PA10B_ADC_AIN18 10L /**< \brief ADC signal: AIN18 on PA10 mux B */ |
mbed_official | 592:a274ee790e56 | 1039 | #define MUX_PA10B_ADC_AIN18 1L |
mbed_official | 592:a274ee790e56 | 1040 | #define PINMUX_PA10B_ADC_AIN18 ((PIN_PA10B_ADC_AIN18 << 16) | MUX_PA10B_ADC_AIN18) |
mbed_official | 592:a274ee790e56 | 1041 | #define PORT_PA10B_ADC_AIN18 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 1042 | #define PIN_PA11B_ADC_AIN19 11L /**< \brief ADC signal: AIN19 on PA11 mux B */ |
mbed_official | 592:a274ee790e56 | 1043 | #define MUX_PA11B_ADC_AIN19 1L |
mbed_official | 592:a274ee790e56 | 1044 | #define PINMUX_PA11B_ADC_AIN19 ((PIN_PA11B_ADC_AIN19 << 16) | MUX_PA11B_ADC_AIN19) |
mbed_official | 592:a274ee790e56 | 1045 | #define PORT_PA11B_ADC_AIN19 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 1046 | #define PIN_PA04B_ADC_VREFP 4L /**< \brief ADC signal: VREFP on PA04 mux B */ |
mbed_official | 592:a274ee790e56 | 1047 | #define MUX_PA04B_ADC_VREFP 1L |
mbed_official | 592:a274ee790e56 | 1048 | #define PINMUX_PA04B_ADC_VREFP ((PIN_PA04B_ADC_VREFP << 16) | MUX_PA04B_ADC_VREFP) |
mbed_official | 592:a274ee790e56 | 1049 | #define PORT_PA04B_ADC_VREFP (1ul << 4) |
mbed_official | 592:a274ee790e56 | 1050 | /* ========== PORT definition for AC peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 1051 | #define PIN_PA04B_AC_AIN0 4L /**< \brief AC signal: AIN0 on PA04 mux B */ |
mbed_official | 592:a274ee790e56 | 1052 | #define MUX_PA04B_AC_AIN0 1L |
mbed_official | 592:a274ee790e56 | 1053 | #define PINMUX_PA04B_AC_AIN0 ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0) |
mbed_official | 592:a274ee790e56 | 1054 | #define PORT_PA04B_AC_AIN0 (1ul << 4) |
mbed_official | 592:a274ee790e56 | 1055 | #define PIN_PA05B_AC_AIN1 5L /**< \brief AC signal: AIN1 on PA05 mux B */ |
mbed_official | 592:a274ee790e56 | 1056 | #define MUX_PA05B_AC_AIN1 1L |
mbed_official | 592:a274ee790e56 | 1057 | #define PINMUX_PA05B_AC_AIN1 ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1) |
mbed_official | 592:a274ee790e56 | 1058 | #define PORT_PA05B_AC_AIN1 (1ul << 5) |
mbed_official | 592:a274ee790e56 | 1059 | #define PIN_PA06B_AC_AIN2 6L /**< \brief AC signal: AIN2 on PA06 mux B */ |
mbed_official | 592:a274ee790e56 | 1060 | #define MUX_PA06B_AC_AIN2 1L |
mbed_official | 592:a274ee790e56 | 1061 | #define PINMUX_PA06B_AC_AIN2 ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2) |
mbed_official | 592:a274ee790e56 | 1062 | #define PORT_PA06B_AC_AIN2 (1ul << 6) |
mbed_official | 592:a274ee790e56 | 1063 | #define PIN_PA07B_AC_AIN3 7L /**< \brief AC signal: AIN3 on PA07 mux B */ |
mbed_official | 592:a274ee790e56 | 1064 | #define MUX_PA07B_AC_AIN3 1L |
mbed_official | 592:a274ee790e56 | 1065 | #define PINMUX_PA07B_AC_AIN3 ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3) |
mbed_official | 592:a274ee790e56 | 1066 | #define PORT_PA07B_AC_AIN3 (1ul << 7) |
mbed_official | 592:a274ee790e56 | 1067 | #define PIN_PA12H_AC_CMP0 12L /**< \brief AC signal: CMP0 on PA12 mux H */ |
mbed_official | 592:a274ee790e56 | 1068 | #define MUX_PA12H_AC_CMP0 7L |
mbed_official | 592:a274ee790e56 | 1069 | #define PINMUX_PA12H_AC_CMP0 ((PIN_PA12H_AC_CMP0 << 16) | MUX_PA12H_AC_CMP0) |
mbed_official | 592:a274ee790e56 | 1070 | #define PORT_PA12H_AC_CMP0 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 1071 | #define PIN_PA18H_AC_CMP0 18L /**< \brief AC signal: CMP0 on PA18 mux H */ |
mbed_official | 592:a274ee790e56 | 1072 | #define MUX_PA18H_AC_CMP0 7L |
mbed_official | 592:a274ee790e56 | 1073 | #define PINMUX_PA18H_AC_CMP0 ((PIN_PA18H_AC_CMP0 << 16) | MUX_PA18H_AC_CMP0) |
mbed_official | 592:a274ee790e56 | 1074 | #define PORT_PA18H_AC_CMP0 (1ul << 18) |
mbed_official | 592:a274ee790e56 | 1075 | #define PIN_PA13H_AC_CMP1 13L /**< \brief AC signal: CMP1 on PA13 mux H */ |
mbed_official | 592:a274ee790e56 | 1076 | #define MUX_PA13H_AC_CMP1 7L |
mbed_official | 592:a274ee790e56 | 1077 | #define PINMUX_PA13H_AC_CMP1 ((PIN_PA13H_AC_CMP1 << 16) | MUX_PA13H_AC_CMP1) |
mbed_official | 592:a274ee790e56 | 1078 | #define PORT_PA13H_AC_CMP1 (1ul << 13) |
mbed_official | 592:a274ee790e56 | 1079 | #define PIN_PA19H_AC_CMP1 19L /**< \brief AC signal: CMP1 on PA19 mux H */ |
mbed_official | 592:a274ee790e56 | 1080 | #define MUX_PA19H_AC_CMP1 7L |
mbed_official | 592:a274ee790e56 | 1081 | #define PINMUX_PA19H_AC_CMP1 ((PIN_PA19H_AC_CMP1 << 16) | MUX_PA19H_AC_CMP1) |
mbed_official | 592:a274ee790e56 | 1082 | #define PORT_PA19H_AC_CMP1 (1ul << 19) |
mbed_official | 592:a274ee790e56 | 1083 | /* ========== PORT definition for DAC peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 1084 | #define PIN_PA02B_DAC_VOUT 2L /**< \brief DAC signal: VOUT on PA02 mux B */ |
mbed_official | 592:a274ee790e56 | 1085 | #define MUX_PA02B_DAC_VOUT 1L |
mbed_official | 592:a274ee790e56 | 1086 | #define PINMUX_PA02B_DAC_VOUT ((PIN_PA02B_DAC_VOUT << 16) | MUX_PA02B_DAC_VOUT) |
mbed_official | 592:a274ee790e56 | 1087 | #define PORT_PA02B_DAC_VOUT (1ul << 2) |
mbed_official | 592:a274ee790e56 | 1088 | #define PIN_PA03B_DAC_VREFP 3L /**< \brief DAC signal: VREFP on PA03 mux B */ |
mbed_official | 592:a274ee790e56 | 1089 | #define MUX_PA03B_DAC_VREFP 1L |
mbed_official | 592:a274ee790e56 | 1090 | #define PINMUX_PA03B_DAC_VREFP ((PIN_PA03B_DAC_VREFP << 16) | MUX_PA03B_DAC_VREFP) |
mbed_official | 592:a274ee790e56 | 1091 | #define PORT_PA03B_DAC_VREFP (1ul << 3) |
mbed_official | 592:a274ee790e56 | 1092 | /* ========== PORT definition for I2S peripheral ========== */ |
mbed_official | 592:a274ee790e56 | 1093 | #define PIN_PA11G_I2S_FS0 11L /**< \brief I2S signal: FS0 on PA11 mux G */ |
mbed_official | 592:a274ee790e56 | 1094 | #define MUX_PA11G_I2S_FS0 6L |
mbed_official | 592:a274ee790e56 | 1095 | #define PINMUX_PA11G_I2S_FS0 ((PIN_PA11G_I2S_FS0 << 16) | MUX_PA11G_I2S_FS0) |
mbed_official | 592:a274ee790e56 | 1096 | #define PORT_PA11G_I2S_FS0 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 1097 | #define PIN_PA21G_I2S_FS0 21L /**< \brief I2S signal: FS0 on PA21 mux G */ |
mbed_official | 592:a274ee790e56 | 1098 | #define MUX_PA21G_I2S_FS0 6L |
mbed_official | 592:a274ee790e56 | 1099 | #define PINMUX_PA21G_I2S_FS0 ((PIN_PA21G_I2S_FS0 << 16) | MUX_PA21G_I2S_FS0) |
mbed_official | 592:a274ee790e56 | 1100 | #define PORT_PA21G_I2S_FS0 (1ul << 21) |
mbed_official | 592:a274ee790e56 | 1101 | #define PIN_PB12G_I2S_FS1 44L /**< \brief I2S signal: FS1 on PB12 mux G */ |
mbed_official | 592:a274ee790e56 | 1102 | #define MUX_PB12G_I2S_FS1 6L |
mbed_official | 592:a274ee790e56 | 1103 | #define PINMUX_PB12G_I2S_FS1 ((PIN_PB12G_I2S_FS1 << 16) | MUX_PB12G_I2S_FS1) |
mbed_official | 592:a274ee790e56 | 1104 | #define PORT_PB12G_I2S_FS1 (1ul << 12) |
mbed_official | 592:a274ee790e56 | 1105 | #define PIN_PA09G_I2S_MCK0 9L /**< \brief I2S signal: MCK0 on PA09 mux G */ |
mbed_official | 592:a274ee790e56 | 1106 | #define MUX_PA09G_I2S_MCK0 6L |
mbed_official | 592:a274ee790e56 | 1107 | #define PINMUX_PA09G_I2S_MCK0 ((PIN_PA09G_I2S_MCK0 << 16) | MUX_PA09G_I2S_MCK0) |
mbed_official | 592:a274ee790e56 | 1108 | #define PORT_PA09G_I2S_MCK0 (1ul << 9) |
mbed_official | 592:a274ee790e56 | 1109 | #define PIN_PB17G_I2S_MCK0 49L /**< \brief I2S signal: MCK0 on PB17 mux G */ |
mbed_official | 592:a274ee790e56 | 1110 | #define MUX_PB17G_I2S_MCK0 6L |
mbed_official | 592:a274ee790e56 | 1111 | #define PINMUX_PB17G_I2S_MCK0 ((PIN_PB17G_I2S_MCK0 << 16) | MUX_PB17G_I2S_MCK0) |
mbed_official | 592:a274ee790e56 | 1112 | #define PORT_PB17G_I2S_MCK0 (1ul << 17) |
mbed_official | 592:a274ee790e56 | 1113 | #define PIN_PB10G_I2S_MCK1 42L /**< \brief I2S signal: MCK1 on PB10 mux G */ |
mbed_official | 592:a274ee790e56 | 1114 | #define MUX_PB10G_I2S_MCK1 6L |
mbed_official | 592:a274ee790e56 | 1115 | #define PINMUX_PB10G_I2S_MCK1 ((PIN_PB10G_I2S_MCK1 << 16) | MUX_PB10G_I2S_MCK1) |
mbed_official | 592:a274ee790e56 | 1116 | #define PORT_PB10G_I2S_MCK1 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 1117 | #define PIN_PA10G_I2S_SCK0 10L /**< \brief I2S signal: SCK0 on PA10 mux G */ |
mbed_official | 592:a274ee790e56 | 1118 | #define MUX_PA10G_I2S_SCK0 6L |
mbed_official | 592:a274ee790e56 | 1119 | #define PINMUX_PA10G_I2S_SCK0 ((PIN_PA10G_I2S_SCK0 << 16) | MUX_PA10G_I2S_SCK0) |
mbed_official | 592:a274ee790e56 | 1120 | #define PORT_PA10G_I2S_SCK0 (1ul << 10) |
mbed_official | 592:a274ee790e56 | 1121 | #define PIN_PA20G_I2S_SCK0 20L /**< \brief I2S signal: SCK0 on PA20 mux G */ |
mbed_official | 592:a274ee790e56 | 1122 | #define MUX_PA20G_I2S_SCK0 6L |
mbed_official | 592:a274ee790e56 | 1123 | #define PINMUX_PA20G_I2S_SCK0 ((PIN_PA20G_I2S_SCK0 << 16) | MUX_PA20G_I2S_SCK0) |
mbed_official | 592:a274ee790e56 | 1124 | #define PORT_PA20G_I2S_SCK0 (1ul << 20) |
mbed_official | 592:a274ee790e56 | 1125 | #define PIN_PB11G_I2S_SCK1 43L /**< \brief I2S signal: SCK1 on PB11 mux G */ |
mbed_official | 592:a274ee790e56 | 1126 | #define MUX_PB11G_I2S_SCK1 6L |
mbed_official | 592:a274ee790e56 | 1127 | #define PINMUX_PB11G_I2S_SCK1 ((PIN_PB11G_I2S_SCK1 << 16) | MUX_PB11G_I2S_SCK1) |
mbed_official | 592:a274ee790e56 | 1128 | #define PORT_PB11G_I2S_SCK1 (1ul << 11) |
mbed_official | 592:a274ee790e56 | 1129 | #define PIN_PA07G_I2S_SD0 7L /**< \brief I2S signal: SD0 on PA07 mux G */ |
mbed_official | 592:a274ee790e56 | 1130 | #define MUX_PA07G_I2S_SD0 6L |
mbed_official | 592:a274ee790e56 | 1131 | #define PINMUX_PA07G_I2S_SD0 ((PIN_PA07G_I2S_SD0 << 16) | MUX_PA07G_I2S_SD0) |
mbed_official | 592:a274ee790e56 | 1132 | #define PORT_PA07G_I2S_SD0 (1ul << 7) |
mbed_official | 592:a274ee790e56 | 1133 | #define PIN_PA19G_I2S_SD0 19L /**< \brief I2S signal: SD0 on PA19 mux G */ |
mbed_official | 592:a274ee790e56 | 1134 | #define MUX_PA19G_I2S_SD0 6L |
mbed_official | 592:a274ee790e56 | 1135 | #define PINMUX_PA19G_I2S_SD0 ((PIN_PA19G_I2S_SD0 << 16) | MUX_PA19G_I2S_SD0) |
mbed_official | 592:a274ee790e56 | 1136 | #define PORT_PA19G_I2S_SD0 (1ul << 19) |
mbed_official | 592:a274ee790e56 | 1137 | #define PIN_PA08G_I2S_SD1 8L /**< \brief I2S signal: SD1 on PA08 mux G */ |
mbed_official | 592:a274ee790e56 | 1138 | #define MUX_PA08G_I2S_SD1 6L |
mbed_official | 592:a274ee790e56 | 1139 | #define PINMUX_PA08G_I2S_SD1 ((PIN_PA08G_I2S_SD1 << 16) | MUX_PA08G_I2S_SD1) |
mbed_official | 592:a274ee790e56 | 1140 | #define PORT_PA08G_I2S_SD1 (1ul << 8) |
mbed_official | 592:a274ee790e56 | 1141 | #define PIN_PB16G_I2S_SD1 48L /**< \brief I2S signal: SD1 on PB16 mux G */ |
mbed_official | 592:a274ee790e56 | 1142 | #define MUX_PB16G_I2S_SD1 6L |
mbed_official | 592:a274ee790e56 | 1143 | #define PINMUX_PB16G_I2S_SD1 ((PIN_PB16G_I2S_SD1 << 16) | MUX_PB16G_I2S_SD1) |
mbed_official | 592:a274ee790e56 | 1144 | #define PORT_PB16G_I2S_SD1 (1ul << 16) |
mbed_official | 592:a274ee790e56 | 1145 | |
mbed_official | 592:a274ee790e56 | 1146 | #endif /* _SAMD21J18A_PIO_ */ |