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targets/hal/TARGET_Freescale/TARGET_KSDK_MCUS/TARGET_K64F/device/MK64F12/MK64F12_rfvbat.h@146:f64d43ff0c18, 2014-04-02 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Apr 02 21:00:08 2014 +0100
- Revision:
- 146:f64d43ff0c18
Synchronized with git revision d537c51d26da35e031d537f7fc90380fc74cb207
Full URL: https://github.com/mbedmicro/mbed/commit/d537c51d26da35e031d537f7fc90380fc74cb207/
target K64F
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 146:f64d43ff0c18 | 1 | /* |
mbed_official | 146:f64d43ff0c18 | 2 | * Copyright (c) 2014, Freescale Semiconductor, Inc. |
mbed_official | 146:f64d43ff0c18 | 3 | * All rights reserved. |
mbed_official | 146:f64d43ff0c18 | 4 | * |
mbed_official | 146:f64d43ff0c18 | 5 | * THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESS OR IMPLIED |
mbed_official | 146:f64d43ff0c18 | 6 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
mbed_official | 146:f64d43ff0c18 | 7 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT |
mbed_official | 146:f64d43ff0c18 | 8 | * SHALL FREESCALE BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
mbed_official | 146:f64d43ff0c18 | 9 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT |
mbed_official | 146:f64d43ff0c18 | 10 | * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
mbed_official | 146:f64d43ff0c18 | 11 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
mbed_official | 146:f64d43ff0c18 | 12 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING |
mbed_official | 146:f64d43ff0c18 | 13 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY |
mbed_official | 146:f64d43ff0c18 | 14 | * OF SUCH DAMAGE. |
mbed_official | 146:f64d43ff0c18 | 15 | */ |
mbed_official | 146:f64d43ff0c18 | 16 | /* |
mbed_official | 146:f64d43ff0c18 | 17 | * WARNING! DO NOT EDIT THIS FILE DIRECTLY! |
mbed_official | 146:f64d43ff0c18 | 18 | * |
mbed_official | 146:f64d43ff0c18 | 19 | * This file was generated automatically and any changes may be lost. |
mbed_official | 146:f64d43ff0c18 | 20 | */ |
mbed_official | 146:f64d43ff0c18 | 21 | #ifndef __HW_RFVBAT_REGISTERS_H__ |
mbed_official | 146:f64d43ff0c18 | 22 | #define __HW_RFVBAT_REGISTERS_H__ |
mbed_official | 146:f64d43ff0c18 | 23 | |
mbed_official | 146:f64d43ff0c18 | 24 | #include "regs.h" |
mbed_official | 146:f64d43ff0c18 | 25 | |
mbed_official | 146:f64d43ff0c18 | 26 | /* |
mbed_official | 146:f64d43ff0c18 | 27 | * MK64F12 RFVBAT |
mbed_official | 146:f64d43ff0c18 | 28 | * |
mbed_official | 146:f64d43ff0c18 | 29 | * VBAT register file |
mbed_official | 146:f64d43ff0c18 | 30 | * |
mbed_official | 146:f64d43ff0c18 | 31 | * Registers defined in this header file: |
mbed_official | 146:f64d43ff0c18 | 32 | * - HW_RFVBAT_REGn - VBAT register file register |
mbed_official | 146:f64d43ff0c18 | 33 | * |
mbed_official | 146:f64d43ff0c18 | 34 | * - hw_rfvbat_t - Struct containing all module registers. |
mbed_official | 146:f64d43ff0c18 | 35 | */ |
mbed_official | 146:f64d43ff0c18 | 36 | |
mbed_official | 146:f64d43ff0c18 | 37 | //! @name Module base addresses |
mbed_official | 146:f64d43ff0c18 | 38 | //@{ |
mbed_official | 146:f64d43ff0c18 | 39 | #ifndef REGS_RFVBAT_BASE |
mbed_official | 146:f64d43ff0c18 | 40 | #define HW_RFVBAT_INSTANCE_COUNT (1U) //!< Number of instances of the RFVBAT module. |
mbed_official | 146:f64d43ff0c18 | 41 | #define REGS_RFVBAT_BASE (0x4003E000U) //!< Base address for RFVBAT. |
mbed_official | 146:f64d43ff0c18 | 42 | #endif |
mbed_official | 146:f64d43ff0c18 | 43 | //@} |
mbed_official | 146:f64d43ff0c18 | 44 | |
mbed_official | 146:f64d43ff0c18 | 45 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 46 | // HW_RFVBAT_REGn - VBAT register file register |
mbed_official | 146:f64d43ff0c18 | 47 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 48 | |
mbed_official | 146:f64d43ff0c18 | 49 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 50 | /*! |
mbed_official | 146:f64d43ff0c18 | 51 | * @brief HW_RFVBAT_REGn - VBAT register file register (RW) |
mbed_official | 146:f64d43ff0c18 | 52 | * |
mbed_official | 146:f64d43ff0c18 | 53 | * Reset value: 0x00000000U |
mbed_official | 146:f64d43ff0c18 | 54 | * |
mbed_official | 146:f64d43ff0c18 | 55 | * Each register can be accessed as 8-, 16-, or 32-bits. |
mbed_official | 146:f64d43ff0c18 | 56 | */ |
mbed_official | 146:f64d43ff0c18 | 57 | typedef union _hw_rfvbat_regn |
mbed_official | 146:f64d43ff0c18 | 58 | { |
mbed_official | 146:f64d43ff0c18 | 59 | uint32_t U; |
mbed_official | 146:f64d43ff0c18 | 60 | struct _hw_rfvbat_regn_bitfields |
mbed_official | 146:f64d43ff0c18 | 61 | { |
mbed_official | 146:f64d43ff0c18 | 62 | uint32_t LL : 8; //!< [7:0] |
mbed_official | 146:f64d43ff0c18 | 63 | uint32_t LH : 8; //!< [15:8] |
mbed_official | 146:f64d43ff0c18 | 64 | uint32_t HL : 8; //!< [23:16] |
mbed_official | 146:f64d43ff0c18 | 65 | uint32_t HH : 8; //!< [31:24] |
mbed_official | 146:f64d43ff0c18 | 66 | } B; |
mbed_official | 146:f64d43ff0c18 | 67 | } hw_rfvbat_regn_t; |
mbed_official | 146:f64d43ff0c18 | 68 | #endif |
mbed_official | 146:f64d43ff0c18 | 69 | |
mbed_official | 146:f64d43ff0c18 | 70 | /*! |
mbed_official | 146:f64d43ff0c18 | 71 | * @name Constants and macros for entire RFVBAT_REGn register |
mbed_official | 146:f64d43ff0c18 | 72 | */ |
mbed_official | 146:f64d43ff0c18 | 73 | //@{ |
mbed_official | 146:f64d43ff0c18 | 74 | #define HW_RFVBAT_REGn_COUNT (8U) |
mbed_official | 146:f64d43ff0c18 | 75 | |
mbed_official | 146:f64d43ff0c18 | 76 | #define HW_RFVBAT_REGn_ADDR(n) (REGS_RFVBAT_BASE + 0x0U + (0x4U * n)) |
mbed_official | 146:f64d43ff0c18 | 77 | |
mbed_official | 146:f64d43ff0c18 | 78 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 79 | #define HW_RFVBAT_REGn(n) (*(__IO hw_rfvbat_regn_t *) HW_RFVBAT_REGn_ADDR(n)) |
mbed_official | 146:f64d43ff0c18 | 80 | #define HW_RFVBAT_REGn_RD(n) (HW_RFVBAT_REGn(n).U) |
mbed_official | 146:f64d43ff0c18 | 81 | #define HW_RFVBAT_REGn_WR(n, v) (HW_RFVBAT_REGn(n).U = (v)) |
mbed_official | 146:f64d43ff0c18 | 82 | #define HW_RFVBAT_REGn_SET(n, v) (HW_RFVBAT_REGn_WR(n, HW_RFVBAT_REGn_RD(n) | (v))) |
mbed_official | 146:f64d43ff0c18 | 83 | #define HW_RFVBAT_REGn_CLR(n, v) (HW_RFVBAT_REGn_WR(n, HW_RFVBAT_REGn_RD(n) & ~(v))) |
mbed_official | 146:f64d43ff0c18 | 84 | #define HW_RFVBAT_REGn_TOG(n, v) (HW_RFVBAT_REGn_WR(n, HW_RFVBAT_REGn_RD(n) ^ (v))) |
mbed_official | 146:f64d43ff0c18 | 85 | #endif |
mbed_official | 146:f64d43ff0c18 | 86 | //@} |
mbed_official | 146:f64d43ff0c18 | 87 | |
mbed_official | 146:f64d43ff0c18 | 88 | /* |
mbed_official | 146:f64d43ff0c18 | 89 | * Constants & macros for individual RFVBAT_REGn bitfields |
mbed_official | 146:f64d43ff0c18 | 90 | */ |
mbed_official | 146:f64d43ff0c18 | 91 | |
mbed_official | 146:f64d43ff0c18 | 92 | /*! |
mbed_official | 146:f64d43ff0c18 | 93 | * @name Register RFVBAT_REGn, field LL[7:0] (RW) |
mbed_official | 146:f64d43ff0c18 | 94 | * |
mbed_official | 146:f64d43ff0c18 | 95 | * Low lower byte |
mbed_official | 146:f64d43ff0c18 | 96 | */ |
mbed_official | 146:f64d43ff0c18 | 97 | //@{ |
mbed_official | 146:f64d43ff0c18 | 98 | #define BP_RFVBAT_REGn_LL (0U) //!< Bit position for RFVBAT_REGn_LL. |
mbed_official | 146:f64d43ff0c18 | 99 | #define BM_RFVBAT_REGn_LL (0x000000FFU) //!< Bit mask for RFVBAT_REGn_LL. |
mbed_official | 146:f64d43ff0c18 | 100 | #define BS_RFVBAT_REGn_LL (8U) //!< Bit field size in bits for RFVBAT_REGn_LL. |
mbed_official | 146:f64d43ff0c18 | 101 | |
mbed_official | 146:f64d43ff0c18 | 102 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 103 | //! @brief Read current value of the RFVBAT_REGn_LL field. |
mbed_official | 146:f64d43ff0c18 | 104 | #define BR_RFVBAT_REGn_LL(n) (HW_RFVBAT_REGn(n).B.LL) |
mbed_official | 146:f64d43ff0c18 | 105 | #endif |
mbed_official | 146:f64d43ff0c18 | 106 | |
mbed_official | 146:f64d43ff0c18 | 107 | //! @brief Format value for bitfield RFVBAT_REGn_LL. |
mbed_official | 146:f64d43ff0c18 | 108 | #define BF_RFVBAT_REGn_LL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_RFVBAT_REGn_LL), uint32_t) & BM_RFVBAT_REGn_LL) |
mbed_official | 146:f64d43ff0c18 | 109 | |
mbed_official | 146:f64d43ff0c18 | 110 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 111 | //! @brief Set the LL field to a new value. |
mbed_official | 146:f64d43ff0c18 | 112 | #define BW_RFVBAT_REGn_LL(n, v) (HW_RFVBAT_REGn_WR(n, (HW_RFVBAT_REGn_RD(n) & ~BM_RFVBAT_REGn_LL) | BF_RFVBAT_REGn_LL(v))) |
mbed_official | 146:f64d43ff0c18 | 113 | #endif |
mbed_official | 146:f64d43ff0c18 | 114 | //@} |
mbed_official | 146:f64d43ff0c18 | 115 | |
mbed_official | 146:f64d43ff0c18 | 116 | /*! |
mbed_official | 146:f64d43ff0c18 | 117 | * @name Register RFVBAT_REGn, field LH[15:8] (RW) |
mbed_official | 146:f64d43ff0c18 | 118 | * |
mbed_official | 146:f64d43ff0c18 | 119 | * Low higher byte |
mbed_official | 146:f64d43ff0c18 | 120 | */ |
mbed_official | 146:f64d43ff0c18 | 121 | //@{ |
mbed_official | 146:f64d43ff0c18 | 122 | #define BP_RFVBAT_REGn_LH (8U) //!< Bit position for RFVBAT_REGn_LH. |
mbed_official | 146:f64d43ff0c18 | 123 | #define BM_RFVBAT_REGn_LH (0x0000FF00U) //!< Bit mask for RFVBAT_REGn_LH. |
mbed_official | 146:f64d43ff0c18 | 124 | #define BS_RFVBAT_REGn_LH (8U) //!< Bit field size in bits for RFVBAT_REGn_LH. |
mbed_official | 146:f64d43ff0c18 | 125 | |
mbed_official | 146:f64d43ff0c18 | 126 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 127 | //! @brief Read current value of the RFVBAT_REGn_LH field. |
mbed_official | 146:f64d43ff0c18 | 128 | #define BR_RFVBAT_REGn_LH(n) (HW_RFVBAT_REGn(n).B.LH) |
mbed_official | 146:f64d43ff0c18 | 129 | #endif |
mbed_official | 146:f64d43ff0c18 | 130 | |
mbed_official | 146:f64d43ff0c18 | 131 | //! @brief Format value for bitfield RFVBAT_REGn_LH. |
mbed_official | 146:f64d43ff0c18 | 132 | #define BF_RFVBAT_REGn_LH(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_RFVBAT_REGn_LH), uint32_t) & BM_RFVBAT_REGn_LH) |
mbed_official | 146:f64d43ff0c18 | 133 | |
mbed_official | 146:f64d43ff0c18 | 134 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 135 | //! @brief Set the LH field to a new value. |
mbed_official | 146:f64d43ff0c18 | 136 | #define BW_RFVBAT_REGn_LH(n, v) (HW_RFVBAT_REGn_WR(n, (HW_RFVBAT_REGn_RD(n) & ~BM_RFVBAT_REGn_LH) | BF_RFVBAT_REGn_LH(v))) |
mbed_official | 146:f64d43ff0c18 | 137 | #endif |
mbed_official | 146:f64d43ff0c18 | 138 | //@} |
mbed_official | 146:f64d43ff0c18 | 139 | |
mbed_official | 146:f64d43ff0c18 | 140 | /*! |
mbed_official | 146:f64d43ff0c18 | 141 | * @name Register RFVBAT_REGn, field HL[23:16] (RW) |
mbed_official | 146:f64d43ff0c18 | 142 | * |
mbed_official | 146:f64d43ff0c18 | 143 | * High lower byte |
mbed_official | 146:f64d43ff0c18 | 144 | */ |
mbed_official | 146:f64d43ff0c18 | 145 | //@{ |
mbed_official | 146:f64d43ff0c18 | 146 | #define BP_RFVBAT_REGn_HL (16U) //!< Bit position for RFVBAT_REGn_HL. |
mbed_official | 146:f64d43ff0c18 | 147 | #define BM_RFVBAT_REGn_HL (0x00FF0000U) //!< Bit mask for RFVBAT_REGn_HL. |
mbed_official | 146:f64d43ff0c18 | 148 | #define BS_RFVBAT_REGn_HL (8U) //!< Bit field size in bits for RFVBAT_REGn_HL. |
mbed_official | 146:f64d43ff0c18 | 149 | |
mbed_official | 146:f64d43ff0c18 | 150 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 151 | //! @brief Read current value of the RFVBAT_REGn_HL field. |
mbed_official | 146:f64d43ff0c18 | 152 | #define BR_RFVBAT_REGn_HL(n) (HW_RFVBAT_REGn(n).B.HL) |
mbed_official | 146:f64d43ff0c18 | 153 | #endif |
mbed_official | 146:f64d43ff0c18 | 154 | |
mbed_official | 146:f64d43ff0c18 | 155 | //! @brief Format value for bitfield RFVBAT_REGn_HL. |
mbed_official | 146:f64d43ff0c18 | 156 | #define BF_RFVBAT_REGn_HL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_RFVBAT_REGn_HL), uint32_t) & BM_RFVBAT_REGn_HL) |
mbed_official | 146:f64d43ff0c18 | 157 | |
mbed_official | 146:f64d43ff0c18 | 158 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 159 | //! @brief Set the HL field to a new value. |
mbed_official | 146:f64d43ff0c18 | 160 | #define BW_RFVBAT_REGn_HL(n, v) (HW_RFVBAT_REGn_WR(n, (HW_RFVBAT_REGn_RD(n) & ~BM_RFVBAT_REGn_HL) | BF_RFVBAT_REGn_HL(v))) |
mbed_official | 146:f64d43ff0c18 | 161 | #endif |
mbed_official | 146:f64d43ff0c18 | 162 | //@} |
mbed_official | 146:f64d43ff0c18 | 163 | |
mbed_official | 146:f64d43ff0c18 | 164 | /*! |
mbed_official | 146:f64d43ff0c18 | 165 | * @name Register RFVBAT_REGn, field HH[31:24] (RW) |
mbed_official | 146:f64d43ff0c18 | 166 | * |
mbed_official | 146:f64d43ff0c18 | 167 | * High higher byte |
mbed_official | 146:f64d43ff0c18 | 168 | */ |
mbed_official | 146:f64d43ff0c18 | 169 | //@{ |
mbed_official | 146:f64d43ff0c18 | 170 | #define BP_RFVBAT_REGn_HH (24U) //!< Bit position for RFVBAT_REGn_HH. |
mbed_official | 146:f64d43ff0c18 | 171 | #define BM_RFVBAT_REGn_HH (0xFF000000U) //!< Bit mask for RFVBAT_REGn_HH. |
mbed_official | 146:f64d43ff0c18 | 172 | #define BS_RFVBAT_REGn_HH (8U) //!< Bit field size in bits for RFVBAT_REGn_HH. |
mbed_official | 146:f64d43ff0c18 | 173 | |
mbed_official | 146:f64d43ff0c18 | 174 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 175 | //! @brief Read current value of the RFVBAT_REGn_HH field. |
mbed_official | 146:f64d43ff0c18 | 176 | #define BR_RFVBAT_REGn_HH(n) (HW_RFVBAT_REGn(n).B.HH) |
mbed_official | 146:f64d43ff0c18 | 177 | #endif |
mbed_official | 146:f64d43ff0c18 | 178 | |
mbed_official | 146:f64d43ff0c18 | 179 | //! @brief Format value for bitfield RFVBAT_REGn_HH. |
mbed_official | 146:f64d43ff0c18 | 180 | #define BF_RFVBAT_REGn_HH(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_RFVBAT_REGn_HH), uint32_t) & BM_RFVBAT_REGn_HH) |
mbed_official | 146:f64d43ff0c18 | 181 | |
mbed_official | 146:f64d43ff0c18 | 182 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 183 | //! @brief Set the HH field to a new value. |
mbed_official | 146:f64d43ff0c18 | 184 | #define BW_RFVBAT_REGn_HH(n, v) (HW_RFVBAT_REGn_WR(n, (HW_RFVBAT_REGn_RD(n) & ~BM_RFVBAT_REGn_HH) | BF_RFVBAT_REGn_HH(v))) |
mbed_official | 146:f64d43ff0c18 | 185 | #endif |
mbed_official | 146:f64d43ff0c18 | 186 | //@} |
mbed_official | 146:f64d43ff0c18 | 187 | |
mbed_official | 146:f64d43ff0c18 | 188 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 189 | // hw_rfvbat_t - module struct |
mbed_official | 146:f64d43ff0c18 | 190 | //------------------------------------------------------------------------------------------- |
mbed_official | 146:f64d43ff0c18 | 191 | /*! |
mbed_official | 146:f64d43ff0c18 | 192 | * @brief All RFVBAT module registers. |
mbed_official | 146:f64d43ff0c18 | 193 | */ |
mbed_official | 146:f64d43ff0c18 | 194 | #ifndef __LANGUAGE_ASM__ |
mbed_official | 146:f64d43ff0c18 | 195 | #pragma pack(1) |
mbed_official | 146:f64d43ff0c18 | 196 | typedef struct _hw_rfvbat |
mbed_official | 146:f64d43ff0c18 | 197 | { |
mbed_official | 146:f64d43ff0c18 | 198 | __IO hw_rfvbat_regn_t REGn[8]; //!< [0x0] VBAT register file register |
mbed_official | 146:f64d43ff0c18 | 199 | } hw_rfvbat_t; |
mbed_official | 146:f64d43ff0c18 | 200 | #pragma pack() |
mbed_official | 146:f64d43ff0c18 | 201 | |
mbed_official | 146:f64d43ff0c18 | 202 | //! @brief Macro to access all RFVBAT registers. |
mbed_official | 146:f64d43ff0c18 | 203 | //! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct, |
mbed_official | 146:f64d43ff0c18 | 204 | //! use the '&' operator, like <code>&HW_RFVBAT</code>. |
mbed_official | 146:f64d43ff0c18 | 205 | #define HW_RFVBAT (*(hw_rfvbat_t *) REGS_RFVBAT_BASE) |
mbed_official | 146:f64d43ff0c18 | 206 | #endif |
mbed_official | 146:f64d43ff0c18 | 207 | |
mbed_official | 146:f64d43ff0c18 | 208 | #endif // __HW_RFVBAT_REGISTERS_H__ |
mbed_official | 146:f64d43ff0c18 | 209 | // v22/130726/0.9 |
mbed_official | 146:f64d43ff0c18 | 210 | // EOF |