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Last commit 20 Feb 2019 by 
mbed official
targets/cmsis/TARGET_Atmel/TARGET_SAM21/utils/cmsis/samd21/include/instance/ins_dac.h@592:a274ee790e56, 2015-07-17 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jul 17 09:15:10 2015 +0100
- Revision:
- 592:a274ee790e56
- Parent:
- 579:53297373a894
Synchronized with git revision e7144f83a8d75df80c4877936b6ffe552b0be9e6
Full URL: https://github.com/mbedmicro/mbed/commit/e7144f83a8d75df80c4877936b6ffe552b0be9e6/
More API implementation for SAMR21
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 579:53297373a894 | 1 | #ifndef _SAMD21_DAC_INSTANCE_ |
| mbed_official | 579:53297373a894 | 2 | #define _SAMD21_DAC_INSTANCE_ |
| mbed_official | 579:53297373a894 | 3 | |
| mbed_official | 579:53297373a894 | 4 | /* ========== Register definition for DAC peripheral ========== */ |
| mbed_official | 579:53297373a894 | 5 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 579:53297373a894 | 6 | #define REG_DAC_CTRLA (0x42004800U) /**< \brief (DAC) Control A */ |
| mbed_official | 579:53297373a894 | 7 | #define REG_DAC_CTRLB (0x42004801U) /**< \brief (DAC) Control B */ |
| mbed_official | 579:53297373a894 | 8 | #define REG_DAC_EVCTRL (0x42004802U) /**< \brief (DAC) Event Control */ |
| mbed_official | 579:53297373a894 | 9 | #define REG_DAC_INTENCLR (0x42004804U) /**< \brief (DAC) Interrupt Enable Clear */ |
| mbed_official | 579:53297373a894 | 10 | #define REG_DAC_INTENSET (0x42004805U) /**< \brief (DAC) Interrupt Enable Set */ |
| mbed_official | 579:53297373a894 | 11 | #define REG_DAC_INTFLAG (0x42004806U) /**< \brief (DAC) Interrupt Flag Status and Clear */ |
| mbed_official | 579:53297373a894 | 12 | #define REG_DAC_STATUS (0x42004807U) /**< \brief (DAC) Status */ |
| mbed_official | 579:53297373a894 | 13 | #define REG_DAC_DATA (0x42004808U) /**< \brief (DAC) Data */ |
| mbed_official | 579:53297373a894 | 14 | #define REG_DAC_DATABUF (0x4200480CU) /**< \brief (DAC) Data Buffer */ |
| mbed_official | 579:53297373a894 | 15 | #else |
| mbed_official | 579:53297373a894 | 16 | #define REG_DAC_CTRLA (*(RwReg8 *)0x42004800U) /**< \brief (DAC) Control A */ |
| mbed_official | 579:53297373a894 | 17 | #define REG_DAC_CTRLB (*(RwReg8 *)0x42004801U) /**< \brief (DAC) Control B */ |
| mbed_official | 579:53297373a894 | 18 | #define REG_DAC_EVCTRL (*(RwReg8 *)0x42004802U) /**< \brief (DAC) Event Control */ |
| mbed_official | 579:53297373a894 | 19 | #define REG_DAC_INTENCLR (*(RwReg8 *)0x42004804U) /**< \brief (DAC) Interrupt Enable Clear */ |
| mbed_official | 579:53297373a894 | 20 | #define REG_DAC_INTENSET (*(RwReg8 *)0x42004805U) /**< \brief (DAC) Interrupt Enable Set */ |
| mbed_official | 579:53297373a894 | 21 | #define REG_DAC_INTFLAG (*(RwReg8 *)0x42004806U) /**< \brief (DAC) Interrupt Flag Status and Clear */ |
| mbed_official | 579:53297373a894 | 22 | #define REG_DAC_STATUS (*(RoReg8 *)0x42004807U) /**< \brief (DAC) Status */ |
| mbed_official | 579:53297373a894 | 23 | #define REG_DAC_DATA (*(RwReg16*)0x42004808U) /**< \brief (DAC) Data */ |
| mbed_official | 579:53297373a894 | 24 | #define REG_DAC_DATABUF (*(RwReg16*)0x4200480CU) /**< \brief (DAC) Data Buffer */ |
| mbed_official | 579:53297373a894 | 25 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 579:53297373a894 | 26 | |
| mbed_official | 579:53297373a894 | 27 | /* ========== Instance parameters for DAC peripheral ========== */ |
| mbed_official | 579:53297373a894 | 28 | #define DAC_DMAC_ID_EMPTY 40 // Index of DMAC EMPTY trigger |
| mbed_official | 579:53297373a894 | 29 | #define DAC_GCLK_ID 33 // Index of Generic Clock |
| mbed_official | 579:53297373a894 | 30 | |
| mbed_official | 579:53297373a894 | 31 | #endif /* _SAMD21_DAC_INSTANCE_ */ |
