mbed official / mbed-src

mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/i2c_api.c@621:9c82b0f79f3d, 2015-09-11 (annotated)

Committer:
mbed_official
Date:
Fri Sep 11 09:30:09 2015 +0100
Revision:
621:9c82b0f79f3d
Parent:
541:7f313a59e20c 
Synchronized with git revision 6c1d63e069ab9bd86de92e8296ca783681257538



Full URL: https://github.com/mbedmicro/mbed/commit/6c1d63e069ab9bd86de92e8296ca783681257538/



ignore target files not supported by the yotta module

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 390:35c2c1cf29cd 1 /* mbed Microcontroller Library
mbed_official 390:35c2c1cf29cd 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 390:35c2c1cf29cd 3 *
mbed_official 390:35c2c1cf29cd 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 390:35c2c1cf29cd 5 * you may not use this file except in compliance with the License.
mbed_official 390:35c2c1cf29cd 6 * You may obtain a copy of the License at
mbed_official 390:35c2c1cf29cd 7 *
mbed_official 390:35c2c1cf29cd 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 390:35c2c1cf29cd 9 *
mbed_official 390:35c2c1cf29cd 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 390:35c2c1cf29cd 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 390:35c2c1cf29cd 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 390:35c2c1cf29cd 13 * See the License for the specific language governing permissions and
mbed_official 390:35c2c1cf29cd 14 * limitations under the License.
mbed_official 390:35c2c1cf29cd 15 */
mbed_official 390:35c2c1cf29cd 16 #include "mbed_assert.h"
mbed_official 390:35c2c1cf29cd 17 #include "i2c_api.h"
mbed_official 390:35c2c1cf29cd 18 #include "cmsis.h"
mbed_official 390:35c2c1cf29cd 19 #include "pinmap.h"
mbed_official 441:d2c15dda23c1 20 #include "r_typedefs.h"
mbed_official 390:35c2c1cf29cd 21
mbed_official 390:35c2c1cf29cd 22 #include "riic_iodefine.h"
mbed_official 422:a032ac66f24e 23 #include "RZ_A1_Init.h"
mbed_official 422:a032ac66f24e 24 #include "MBRZA1H.h"
mbed_official 390:35c2c1cf29cd 25
mbed_official 390:35c2c1cf29cd 26 volatile struct st_riic *RIIC[] = RIIC_ADDRESS_LIST;
mbed_official 390:35c2c1cf29cd 27
mbed_official 390:35c2c1cf29cd 28 #define REG(N) \
mbed_official 390:35c2c1cf29cd 29 RIIC[obj->i2c]->RIICn##N
mbed_official 390:35c2c1cf29cd 30
mbed_official 441:d2c15dda23c1 31 /* RIICnCR1 */
mbed_official 441:d2c15dda23c1 32 #define CR1_RST (1 << 6)
mbed_official 441:d2c15dda23c1 33 #define CR1_ICE (1 << 7)
mbed_official 441:d2c15dda23c1 34
mbed_official 441:d2c15dda23c1 35 /* RIICnCR2 */
mbed_official 441:d2c15dda23c1 36 #define CR2_ST (1 << 1)
mbed_official 460:3bcf9be0332c 37 #define CR2_RS (1 << 2)
mbed_official 441:d2c15dda23c1 38 #define CR2_SP (1 << 3)
mbed_official 460:3bcf9be0332c 39 #define CR2_TRS (1 << 5)
mbed_official 441:d2c15dda23c1 40 #define CR2_BBSY (1 << 7)
mbed_official 441:d2c15dda23c1 41
mbed_official 441:d2c15dda23c1 42 /* RIICnMR3 */
mbed_official 441:d2c15dda23c1 43 #define MR3_ACKBT (1 << 3)
mbed_official 441:d2c15dda23c1 44 #define MR3_ACKWP (1 << 4)
mbed_official 441:d2c15dda23c1 45 #define MR3_WAIT (1 << 6)
mbed_official 441:d2c15dda23c1 46
mbed_official 460:3bcf9be0332c 47 /* RIICnSER */
mbed_official 460:3bcf9be0332c 48 #define SER_SAR0E (1 << 0)
mbed_official 460:3bcf9be0332c 49
mbed_official 460:3bcf9be0332c 50 /* RIICnSR1 */
mbed_official 460:3bcf9be0332c 51 #define SR1_AAS0 (1 << 0)
mbed_official 460:3bcf9be0332c 52
mbed_official 441:d2c15dda23c1 53 /* RIICnSR2 */
mbed_official 460:3bcf9be0332c 54 #define SR2_START (1 << 2)
mbed_official 441:d2c15dda23c1 55 #define SR2_STOP (1 << 3)
mbed_official 441:d2c15dda23c1 56 #define SR2_NACKF (1 << 4)
mbed_official 441:d2c15dda23c1 57 #define SR2_RDRF (1 << 5)
mbed_official 441:d2c15dda23c1 58 #define SR2_TEND (1 << 6)
mbed_official 441:d2c15dda23c1 59 #define SR2_TDRE (1 << 7)
mbed_official 441:d2c15dda23c1 60
mbed_official 541:7f313a59e20c 61 #define WAIT_TIMEOUT (3600000) /* Loop counter : Time-out is about 1s. By 3600000 loops, measured value is 969ms. */
mbed_official 390:35c2c1cf29cd 62
mbed_official 390:35c2c1cf29cd 63 static const PinMap PinMap_I2C_SDA[] = {
mbed_official 390:35c2c1cf29cd 64 {P1_1 , I2C_0, 1},
mbed_official 390:35c2c1cf29cd 65 {P1_3 , I2C_1, 1},
mbed_official 390:35c2c1cf29cd 66 {P1_7 , I2C_3, 1},
mbed_official 390:35c2c1cf29cd 67 {NC , NC , 0}
mbed_official 390:35c2c1cf29cd 68 };
mbed_official 390:35c2c1cf29cd 69
mbed_official 390:35c2c1cf29cd 70 static const PinMap PinMap_I2C_SCL[] = {
mbed_official 390:35c2c1cf29cd 71 {P1_0 , I2C_0, 1},
mbed_official 390:35c2c1cf29cd 72 {P1_2 , I2C_1, 1},
mbed_official 390:35c2c1cf29cd 73 {P1_6 , I2C_3, 1},
mbed_official 390:35c2c1cf29cd 74 {NC , NC, 0}
mbed_official 390:35c2c1cf29cd 75 };
mbed_official 390:35c2c1cf29cd 76
mbed_official 441:d2c15dda23c1 77
mbed_official 390:35c2c1cf29cd 78 static inline int i2c_status(i2c_t *obj) {
mbed_official 390:35c2c1cf29cd 79 return REG(SR2.UINT8[0]);
mbed_official 390:35c2c1cf29cd 80 }
mbed_official 390:35c2c1cf29cd 81
mbed_official 441:d2c15dda23c1 82 static void i2c_reg_reset(i2c_t *obj) {
mbed_official 441:d2c15dda23c1 83 /* full reset */
mbed_official 441:d2c15dda23c1 84 REG(CR1.UINT8[0]) &= ~CR1_ICE; // CR1.ICE off
mbed_official 441:d2c15dda23c1 85 REG(CR1.UINT8[0]) |= CR1_RST; // CR1.IICRST on
mbed_official 441:d2c15dda23c1 86 REG(CR1.UINT8[0]) |= CR1_ICE; // CR1.ICE on
mbed_official 441:d2c15dda23c1 87
mbed_official 441:d2c15dda23c1 88 REG(MR1.UINT8[0]) = 0x08; // P_phi /x 9bit (including Ack)
mbed_official 441:d2c15dda23c1 89 REG(SER.UINT8[0]) = 0x00; // no slave addr enabled
mbed_official 441:d2c15dda23c1 90
mbed_official 441:d2c15dda23c1 91 /* set frequency */
mbed_official 441:d2c15dda23c1 92 REG(MR1.UINT8[0]) |= obj->pclk_bit;
mbed_official 441:d2c15dda23c1 93 REG(BRL.UINT8[0]) = obj->width_low;
mbed_official 441:d2c15dda23c1 94 REG(BRH.UINT8[0]) = obj->width_hi;
mbed_official 441:d2c15dda23c1 95
mbed_official 441:d2c15dda23c1 96 REG(MR2.UINT8[0]) = 0x07;
mbed_official 441:d2c15dda23c1 97 REG(MR3.UINT8[0]) = 0x00;
mbed_official 441:d2c15dda23c1 98
mbed_official 441:d2c15dda23c1 99 REG(FER.UINT8[0]) = 0x72; // SCLE, NFE enabled, TMOT
mbed_official 441:d2c15dda23c1 100 REG(IER.UINT8[0]) = 0x00; // no interrupt
mbed_official 441:d2c15dda23c1 101
mbed_official 441:d2c15dda23c1 102 REG(CR1.UINT32) &= ~CR1_RST; // CR1.IICRST negate reset
mbed_official 441:d2c15dda23c1 103 }
mbed_official 441:d2c15dda23c1 104
mbed_official 460:3bcf9be0332c 105 static inline int i2c_wait_RDRF(i2c_t *obj) {
mbed_official 460:3bcf9be0332c 106 int timeout = 0;
mbed_official 460:3bcf9be0332c 107
mbed_official 460:3bcf9be0332c 108 /* There is no timeout, but the upper limit value is set to avoid an infinite loop. */
mbed_official 541:7f313a59e20c 109 while ((i2c_status(obj) & SR2_RDRF) == 0) {
mbed_official 460:3bcf9be0332c 110 timeout ++;
mbed_official 506:520a30fd3bde 111 if (timeout >= WAIT_TIMEOUT) {
mbed_official 460:3bcf9be0332c 112 return -1;
mbed_official 460:3bcf9be0332c 113 }
mbed_official 460:3bcf9be0332c 114 }
mbed_official 460:3bcf9be0332c 115
mbed_official 460:3bcf9be0332c 116 return 0;
mbed_official 460:3bcf9be0332c 117 }
mbed_official 460:3bcf9be0332c 118
mbed_official 441:d2c15dda23c1 119 static int i2c_wait_TDRE(i2c_t *obj) {
mbed_official 409:a95c696104d3 120 int timeout = 0;
mbed_official 409:a95c696104d3 121
mbed_official 441:d2c15dda23c1 122 /* There is no timeout, but the upper limit value is set to avoid an infinite loop. */
mbed_official 541:7f313a59e20c 123 while ((i2c_status(obj) & SR2_TDRE) == 0) {
mbed_official 409:a95c696104d3 124 timeout ++;
mbed_official 506:520a30fd3bde 125 if (timeout >= WAIT_TIMEOUT) {
mbed_official 441:d2c15dda23c1 126 return -1;
mbed_official 441:d2c15dda23c1 127 }
mbed_official 441:d2c15dda23c1 128 }
mbed_official 441:d2c15dda23c1 129
mbed_official 441:d2c15dda23c1 130 return 0;
mbed_official 441:d2c15dda23c1 131 }
mbed_official 441:d2c15dda23c1 132
mbed_official 441:d2c15dda23c1 133 static int i2c_wait_TEND(i2c_t *obj) {
mbed_official 441:d2c15dda23c1 134 int timeout = 0;
mbed_official 441:d2c15dda23c1 135
mbed_official 441:d2c15dda23c1 136 /* There is no timeout, but the upper limit value is set to avoid an infinite loop. */
mbed_official 541:7f313a59e20c 137 while ((i2c_status(obj) & SR2_TEND) == 0) {
mbed_official 441:d2c15dda23c1 138 timeout ++;
mbed_official 506:520a30fd3bde 139 if (timeout >= WAIT_TIMEOUT) {
mbed_official 441:d2c15dda23c1 140 return -1;
mbed_official 441:d2c15dda23c1 141 }
mbed_official 409:a95c696104d3 142 }
mbed_official 409:a95c696104d3 143
mbed_official 409:a95c696104d3 144 return 0;
mbed_official 409:a95c696104d3 145 }
mbed_official 409:a95c696104d3 146
mbed_official 409:a95c696104d3 147
mbed_official 460:3bcf9be0332c 148 static int i2c_wait_START(i2c_t *obj) {
mbed_official 460:3bcf9be0332c 149 int timeout = 0;
mbed_official 460:3bcf9be0332c 150
mbed_official 460:3bcf9be0332c 151 /* There is no timeout, but the upper limit value is set to avoid an infinite loop. */
mbed_official 541:7f313a59e20c 152 while ((i2c_status(obj) & SR2_START) == 0) {
mbed_official 460:3bcf9be0332c 153 timeout ++;
mbed_official 506:520a30fd3bde 154 if (timeout >= WAIT_TIMEOUT) {
mbed_official 460:3bcf9be0332c 155 return -1;
mbed_official 460:3bcf9be0332c 156 }
mbed_official 460:3bcf9be0332c 157 }
mbed_official 460:3bcf9be0332c 158
mbed_official 460:3bcf9be0332c 159 return 0;
mbed_official 460:3bcf9be0332c 160 }
mbed_official 460:3bcf9be0332c 161
mbed_official 430:d406b7919023 162 static int i2c_wait_STOP(i2c_t *obj) {
mbed_official 441:d2c15dda23c1 163 int timeout = 0;
mbed_official 441:d2c15dda23c1 164
mbed_official 441:d2c15dda23c1 165 /* There is no timeout, but the upper limit value is set to avoid an infinite loop. */
mbed_official 541:7f313a59e20c 166 while ((i2c_status(obj) & SR2_STOP) == 0) {
mbed_official 441:d2c15dda23c1 167 timeout ++;
mbed_official 506:520a30fd3bde 168 if (timeout >= WAIT_TIMEOUT) {
mbed_official 441:d2c15dda23c1 169 return -1;
mbed_official 441:d2c15dda23c1 170 }
mbed_official 441:d2c15dda23c1 171 }
mbed_official 430:d406b7919023 172
mbed_official 430:d406b7919023 173 return 0;
mbed_official 430:d406b7919023 174 }
mbed_official 430:d406b7919023 175
mbed_official 541:7f313a59e20c 176 static int i2c_set_STOP(i2c_t *obj) {
mbed_official 541:7f313a59e20c 177 /* SR2.STOP = 0 */
mbed_official 541:7f313a59e20c 178 REG(SR2.UINT32) &= ~SR2_STOP;
mbed_official 541:7f313a59e20c 179 /* Stop condition */
mbed_official 541:7f313a59e20c 180 REG(CR2.UINT32) |= CR2_SP;
mbed_official 541:7f313a59e20c 181
mbed_official 541:7f313a59e20c 182 return 0;
mbed_official 541:7f313a59e20c 183 }
mbed_official 541:7f313a59e20c 184
mbed_official 460:3bcf9be0332c 185 static void i2c_set_SR2_NACKF_STOP(i2c_t *obj) {
mbed_official 441:d2c15dda23c1 186 /* SR2.NACKF = 0 */
mbed_official 441:d2c15dda23c1 187 REG(SR2.UINT32) &= ~SR2_NACKF;
mbed_official 460:3bcf9be0332c 188 /* SR2.STOP = 0 */
mbed_official 441:d2c15dda23c1 189 REG(SR2.UINT32) &= ~SR2_STOP;
mbed_official 441:d2c15dda23c1 190 }
mbed_official 441:d2c15dda23c1 191
mbed_official 460:3bcf9be0332c 192 static void i2c_set_MR3_NACK(i2c_t *obj) {
mbed_official 460:3bcf9be0332c 193 /* send a NOT ACK */
mbed_official 460:3bcf9be0332c 194 REG(MR3.UINT32) |= MR3_ACKWP;
mbed_official 460:3bcf9be0332c 195 REG(MR3.UINT32) |= MR3_ACKBT;
mbed_official 460:3bcf9be0332c 196 REG(MR3.UINT32) &= ~MR3_ACKWP;
mbed_official 460:3bcf9be0332c 197 }
mbed_official 460:3bcf9be0332c 198
mbed_official 460:3bcf9be0332c 199 static void i2c_set_MR3_ACK(i2c_t *obj) {
mbed_official 460:3bcf9be0332c 200 /* send a ACK */
mbed_official 460:3bcf9be0332c 201 REG(MR3.UINT32) |= MR3_ACKWP;
mbed_official 460:3bcf9be0332c 202 REG(MR3.UINT32) &= ~MR3_ACKBT;
mbed_official 460:3bcf9be0332c 203 REG(MR3.UINT32) &= ~MR3_ACKWP;
mbed_official 441:d2c15dda23c1 204 }
mbed_official 430:d406b7919023 205
mbed_official 390:35c2c1cf29cd 206 static inline void i2c_power_enable(i2c_t *obj) {
mbed_official 390:35c2c1cf29cd 207 volatile uint8_t dummy;
mbed_official 390:35c2c1cf29cd 208 switch ((int)obj->i2c) {
mbed_official 460:3bcf9be0332c 209 case I2C_0:
mbed_official 460:3bcf9be0332c 210 CPGSTBCR9 &= ~(0x80);
mbed_official 460:3bcf9be0332c 211 break;
mbed_official 460:3bcf9be0332c 212 case I2C_1:
mbed_official 460:3bcf9be0332c 213 CPGSTBCR9 &= ~(0x40);
mbed_official 460:3bcf9be0332c 214 break;
mbed_official 460:3bcf9be0332c 215 case I2C_2:
mbed_official 460:3bcf9be0332c 216 CPGSTBCR9 &= ~(0x20);
mbed_official 460:3bcf9be0332c 217 break;
mbed_official 460:3bcf9be0332c 218 case I2C_3:
mbed_official 460:3bcf9be0332c 219 CPGSTBCR9 &= ~(0x10);
mbed_official 460:3bcf9be0332c 220 break;
mbed_official 390:35c2c1cf29cd 221 }
mbed_official 390:35c2c1cf29cd 222 dummy = CPGSTBCR9;
mbed_official 390:35c2c1cf29cd 223 }
mbed_official 390:35c2c1cf29cd 224
mbed_official 390:35c2c1cf29cd 225 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
mbed_official 441:d2c15dda23c1 226 /* determine the I2C to use */
mbed_official 390:35c2c1cf29cd 227 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
mbed_official 390:35c2c1cf29cd 228 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
mbed_official 390:35c2c1cf29cd 229 obj->i2c = pinmap_merge(i2c_sda, i2c_scl);
mbed_official 390:35c2c1cf29cd 230 MBED_ASSERT((int)obj->i2c != NC);
mbed_official 409:a95c696104d3 231
mbed_official 441:d2c15dda23c1 232 /* enable power */
mbed_official 390:35c2c1cf29cd 233 i2c_power_enable(obj);
mbed_official 390:35c2c1cf29cd 234
mbed_official 441:d2c15dda23c1 235 /* set default frequency at 100k */
mbed_official 427:8eeb5157dee4 236 i2c_frequency(obj, 100000);
mbed_official 427:8eeb5157dee4 237
mbed_official 390:35c2c1cf29cd 238 pinmap_pinout(sda, PinMap_I2C_SDA);
mbed_official 390:35c2c1cf29cd 239 pinmap_pinout(scl, PinMap_I2C_SCL);
mbed_official 460:3bcf9be0332c 240
mbed_official 460:3bcf9be0332c 241 obj->last_stop_flag = 1;
mbed_official 390:35c2c1cf29cd 242 }
mbed_official 390:35c2c1cf29cd 243
mbed_official 390:35c2c1cf29cd 244 inline int i2c_start(i2c_t *obj) {
mbed_official 441:d2c15dda23c1 245 int timeout = 0;
mbed_official 441:d2c15dda23c1 246
mbed_official 541:7f313a59e20c 247 while ((REG(CR2.UINT32) & CR2_BBSY) != 0) {
mbed_official 441:d2c15dda23c1 248 timeout ++;
mbed_official 441:d2c15dda23c1 249 if (timeout >= obj->bbsy_wait_cnt) {
mbed_official 460:3bcf9be0332c 250 break;
mbed_official 441:d2c15dda23c1 251 }
mbed_official 390:35c2c1cf29cd 252 }
mbed_official 441:d2c15dda23c1 253 /* Start Condition */
mbed_official 441:d2c15dda23c1 254 REG(CR2.UINT8[0]) |= CR2_ST;
mbed_official 390:35c2c1cf29cd 255
mbed_official 441:d2c15dda23c1 256 return 0;
mbed_official 390:35c2c1cf29cd 257 }
mbed_official 390:35c2c1cf29cd 258
mbed_official 482:d9a48e768ce0 259 static inline int i2c_restart(i2c_t *obj) {
mbed_official 460:3bcf9be0332c 260 /* SR2.START = 0 */
mbed_official 460:3bcf9be0332c 261 REG(SR2.UINT32) &= ~SR2_START;
mbed_official 460:3bcf9be0332c 262 /* ReStart condition */
mbed_official 460:3bcf9be0332c 263 REG(CR2.UINT32) |= CR2_RS;
mbed_official 460:3bcf9be0332c 264
mbed_official 460:3bcf9be0332c 265 return 0;
mbed_official 460:3bcf9be0332c 266 }
mbed_official 460:3bcf9be0332c 267
mbed_official 390:35c2c1cf29cd 268 inline int i2c_stop(i2c_t *obj) {
mbed_official 541:7f313a59e20c 269 (void)i2c_set_STOP(obj);
mbed_official 541:7f313a59e20c 270 (void)i2c_wait_STOP(obj);
mbed_official 541:7f313a59e20c 271 i2c_set_SR2_NACKF_STOP(obj);
mbed_official 541:7f313a59e20c 272
mbed_official 390:35c2c1cf29cd 273 return 0;
mbed_official 390:35c2c1cf29cd 274 }
mbed_official 390:35c2c1cf29cd 275
mbed_official 506:520a30fd3bde 276 static void i2c_set_err_noslave(i2c_t *obj) {
mbed_official 541:7f313a59e20c 277 (void)i2c_set_STOP(obj);
mbed_official 506:520a30fd3bde 278 (void)i2c_wait_STOP(obj);
mbed_official 506:520a30fd3bde 279 i2c_set_SR2_NACKF_STOP(obj);
mbed_official 506:520a30fd3bde 280 obj->last_stop_flag = 1;
mbed_official 460:3bcf9be0332c 281 }
mbed_official 460:3bcf9be0332c 282
mbed_official 390:35c2c1cf29cd 283 static inline int i2c_do_write(i2c_t *obj, int value) {
mbed_official 441:d2c15dda23c1 284 int timeout = 0;
mbed_official 441:d2c15dda23c1 285
mbed_official 541:7f313a59e20c 286 /* There is no timeout, but the upper limit value is set to avoid an infinite loop. */
mbed_official 541:7f313a59e20c 287 while ((i2c_status(obj) & SR2_TDRE) == 0) {
mbed_official 541:7f313a59e20c 288 timeout ++;
mbed_official 541:7f313a59e20c 289 if (timeout >= WAIT_TIMEOUT) {
mbed_official 541:7f313a59e20c 290 return -1;
mbed_official 441:d2c15dda23c1 291 }
mbed_official 390:35c2c1cf29cd 292 }
mbed_official 541:7f313a59e20c 293 /* write the data */
mbed_official 541:7f313a59e20c 294 REG(DRT.UINT32) = value;
mbed_official 441:d2c15dda23c1 295
mbed_official 441:d2c15dda23c1 296 return 0;
mbed_official 441:d2c15dda23c1 297 }
mbed_official 441:d2c15dda23c1 298
mbed_official 441:d2c15dda23c1 299 static inline int i2c_read_address_write(i2c_t *obj, int value) {
mbed_official 441:d2c15dda23c1 300 int status;
mbed_official 460:3bcf9be0332c 301
mbed_official 441:d2c15dda23c1 302 status = i2c_wait_TDRE(obj);
mbed_official 441:d2c15dda23c1 303 if (status == 0) {
mbed_official 441:d2c15dda23c1 304 /* write the data */
mbed_official 441:d2c15dda23c1 305 REG(DRT.UINT32) = value;
mbed_official 441:d2c15dda23c1 306 }
mbed_official 460:3bcf9be0332c 307
mbed_official 460:3bcf9be0332c 308 return status;
mbed_official 441:d2c15dda23c1 309
mbed_official 390:35c2c1cf29cd 310 }
mbed_official 390:35c2c1cf29cd 311
mbed_official 390:35c2c1cf29cd 312 static inline int i2c_do_read(i2c_t *obj, int last) {
mbed_official 409:a95c696104d3 313 if (last == 2) {
mbed_official 409:a95c696104d3 314 /* this time is befor last byte read */
mbed_official 441:d2c15dda23c1 315 /* Set MR3 WAIT bit is 1 */;
mbed_official 441:d2c15dda23c1 316 REG(MR3.UINT32) |= MR3_WAIT;
mbed_official 409:a95c696104d3 317 } else if (last == 1) {
mbed_official 460:3bcf9be0332c 318 i2c_set_MR3_NACK(obj);
mbed_official 390:35c2c1cf29cd 319 } else {
mbed_official 460:3bcf9be0332c 320 i2c_set_MR3_ACK(obj);
mbed_official 390:35c2c1cf29cd 321 }
mbed_official 409:a95c696104d3 322
mbed_official 441:d2c15dda23c1 323 /* return the data */
mbed_official 390:35c2c1cf29cd 324 return (REG(DRR.UINT32) & 0xFF);
mbed_official 390:35c2c1cf29cd 325 }
mbed_official 390:35c2c1cf29cd 326
mbed_official 390:35c2c1cf29cd 327 void i2c_frequency(i2c_t *obj, int hz) {
mbed_official 441:d2c15dda23c1 328 float64_t pclk_val;
mbed_official 441:d2c15dda23c1 329 float64_t wait_utime;
mbed_official 441:d2c15dda23c1 330 volatile float64_t bps;
mbed_official 441:d2c15dda23c1 331 volatile float64_t L_time; /* H Width period */
mbed_official 441:d2c15dda23c1 332 volatile float64_t H_time; /* L Width period */
mbed_official 441:d2c15dda23c1 333 uint32_t tmp_L_width;
mbed_official 441:d2c15dda23c1 334 uint32_t tmp_H_width;
mbed_official 441:d2c15dda23c1 335 uint32_t remainder;
mbed_official 441:d2c15dda23c1 336 uint32_t wk_cks = 0;
mbed_official 427:8eeb5157dee4 337
mbed_official 422:a032ac66f24e 338 /* set PCLK */
mbed_official 427:8eeb5157dee4 339 if (false == RZ_A1_IsClockMode0()) {
mbed_official 441:d2c15dda23c1 340 pclk_val = (float64_t)CM1_RENESAS_RZ_A1_P0_CLK;
mbed_official 422:a032ac66f24e 341 } else {
mbed_official 441:d2c15dda23c1 342 pclk_val = (float64_t)CM0_RENESAS_RZ_A1_P0_CLK;
mbed_official 422:a032ac66f24e 343 }
mbed_official 427:8eeb5157dee4 344
mbed_official 422:a032ac66f24e 345 /* Min 10kHz, Max 400kHz */
mbed_official 422:a032ac66f24e 346 if (hz < 10000) {
mbed_official 441:d2c15dda23c1 347 bps = 10000;
mbed_official 422:a032ac66f24e 348 } else if (hz > 400000) {
mbed_official 441:d2c15dda23c1 349 bps = 400000;
mbed_official 422:a032ac66f24e 350 } else {
mbed_official 441:d2c15dda23c1 351 bps = (float64_t)hz;
mbed_official 422:a032ac66f24e 352 }
mbed_official 427:8eeb5157dee4 353
mbed_official 441:d2c15dda23c1 354 /* Calculation L width time */
mbed_official 441:d2c15dda23c1 355 L_time = (1 / (2 * bps)); /* Harf period of frequency */
mbed_official 441:d2c15dda23c1 356 H_time = L_time;
mbed_official 441:d2c15dda23c1 357
mbed_official 441:d2c15dda23c1 358 /* Check I2C mode of Speed */
mbed_official 441:d2c15dda23c1 359 if (bps > 100000) {
mbed_official 441:d2c15dda23c1 360 /* Fast-mode */
mbed_official 441:d2c15dda23c1 361 L_time -= 102E-9; /* Falling time of SCL clock. */
mbed_official 441:d2c15dda23c1 362 H_time -= 138E-9; /* Rising time of SCL clock. */
mbed_official 441:d2c15dda23c1 363 /* Check L wideth */
mbed_official 441:d2c15dda23c1 364 if (L_time < 1.3E-6) {
mbed_official 441:d2c15dda23c1 365 /* Wnen L width less than 1.3us */
mbed_official 441:d2c15dda23c1 366 /* Subtract Rise up and down time for SCL from H/L width */
mbed_official 441:d2c15dda23c1 367 L_time = 1.3E-6;
mbed_official 441:d2c15dda23c1 368 H_time = (1 / bps) - L_time - 138E-9 - 102E-9;
mbed_official 422:a032ac66f24e 369 }
mbed_official 422:a032ac66f24e 370 }
mbed_official 409:a95c696104d3 371
mbed_official 441:d2c15dda23c1 372 tmp_L_width = (uint32_t)(L_time * pclk_val * 10);
mbed_official 441:d2c15dda23c1 373 tmp_L_width >>= 1;
mbed_official 441:d2c15dda23c1 374 wk_cks++;
mbed_official 441:d2c15dda23c1 375 while (tmp_L_width >= 341) {
mbed_official 441:d2c15dda23c1 376 tmp_L_width >>= 1;
mbed_official 441:d2c15dda23c1 377 wk_cks++;
mbed_official 441:d2c15dda23c1 378 }
mbed_official 441:d2c15dda23c1 379 remainder = tmp_L_width % 10;
mbed_official 441:d2c15dda23c1 380 tmp_L_width = ((tmp_L_width + 9) / 10) - 3; /* carry */
mbed_official 441:d2c15dda23c1 381
mbed_official 441:d2c15dda23c1 382 tmp_H_width = (uint32_t)(H_time * pclk_val * 10);
mbed_official 441:d2c15dda23c1 383 tmp_H_width >>= wk_cks;
mbed_official 441:d2c15dda23c1 384 if (remainder == 0) {
mbed_official 441:d2c15dda23c1 385 tmp_H_width = ((tmp_H_width + 9) / 10) - 3; /* carry */
mbed_official 422:a032ac66f24e 386 } else {
mbed_official 441:d2c15dda23c1 387 remainder += tmp_H_width % 10;
mbed_official 441:d2c15dda23c1 388 tmp_H_width = (tmp_H_width / 10) - 3;
mbed_official 441:d2c15dda23c1 389 if (remainder > 10) {
mbed_official 441:d2c15dda23c1 390 tmp_H_width += 1; /* fine adjustment */
mbed_official 441:d2c15dda23c1 391 }
mbed_official 422:a032ac66f24e 392 }
mbed_official 441:d2c15dda23c1 393 /* timeout of BBSY bit is minimum low width by frequency */
mbed_official 441:d2c15dda23c1 394 /* so timeout calculates "(low width) * 2" by frequency */
mbed_official 441:d2c15dda23c1 395 wait_utime = (L_time * 2) * 1000000;
mbed_official 441:d2c15dda23c1 396 /* 1 wait of BBSY bit is about 0.3us. if it's below 0.3us, wait count is set as 1. */
mbed_official 441:d2c15dda23c1 397 if (wait_utime <= 0.3) {
mbed_official 441:d2c15dda23c1 398 obj->bbsy_wait_cnt = 1;
mbed_official 441:d2c15dda23c1 399 } else {
mbed_official 441:d2c15dda23c1 400 obj->bbsy_wait_cnt = (int)(wait_utime / 0.3);
mbed_official 441:d2c15dda23c1 401 }
mbed_official 441:d2c15dda23c1 402
mbed_official 441:d2c15dda23c1 403
mbed_official 441:d2c15dda23c1 404 /* I2C Rate */
mbed_official 441:d2c15dda23c1 405 obj->pclk_bit = (uint8_t)(0x10 * wk_cks); /* P_phi / xx */
mbed_official 441:d2c15dda23c1 406 obj->width_low = (uint8_t)(tmp_L_width | 0x000000E0);
mbed_official 441:d2c15dda23c1 407 obj->width_hi = (uint8_t)(tmp_H_width | 0x000000E0);
mbed_official 441:d2c15dda23c1 408
mbed_official 441:d2c15dda23c1 409 /* full reset */
mbed_official 441:d2c15dda23c1 410 i2c_reg_reset(obj);
mbed_official 390:35c2c1cf29cd 411 }
mbed_official 390:35c2c1cf29cd 412
mbed_official 390:35c2c1cf29cd 413 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
mbed_official 409:a95c696104d3 414 int count = 0;
mbed_official 409:a95c696104d3 415 int status;
mbed_official 409:a95c696104d3 416 int value;
mbed_official 409:a95c696104d3 417 volatile uint32_t work_reg = 0;
mbed_official 409:a95c696104d3 418
mbed_official 460:3bcf9be0332c 419 if(length <= 0) {
mbed_official 460:3bcf9be0332c 420 return 0;
mbed_official 390:35c2c1cf29cd 421 }
mbed_official 460:3bcf9be0332c 422 i2c_set_MR3_ACK(obj);
mbed_official 460:3bcf9be0332c 423 /* There is a STOP condition for last processing */
mbed_official 460:3bcf9be0332c 424 if (obj->last_stop_flag != 0) {
mbed_official 460:3bcf9be0332c 425 status = i2c_start(obj);
mbed_official 460:3bcf9be0332c 426 if (status != 0) {
mbed_official 506:520a30fd3bde 427 i2c_set_err_noslave(obj);
mbed_official 460:3bcf9be0332c 428 return I2C_ERROR_BUS_BUSY;
mbed_official 460:3bcf9be0332c 429 }
mbed_official 460:3bcf9be0332c 430 }
mbed_official 460:3bcf9be0332c 431 obj->last_stop_flag = stop;
mbed_official 441:d2c15dda23c1 432 /* Send Slave address */
mbed_official 441:d2c15dda23c1 433 status = i2c_read_address_write(obj, (address | 0x01));
mbed_official 441:d2c15dda23c1 434 if (status != 0) {
mbed_official 506:520a30fd3bde 435 i2c_set_err_noslave(obj);
mbed_official 390:35c2c1cf29cd 436 return I2C_ERROR_NO_SLAVE;
mbed_official 390:35c2c1cf29cd 437 }
mbed_official 460:3bcf9be0332c 438 /* wait RDRF */
mbed_official 441:d2c15dda23c1 439 status = i2c_wait_RDRF(obj);
mbed_official 409:a95c696104d3 440 /* check ACK/NACK */
mbed_official 541:7f313a59e20c 441 if ((status != 0) || ((REG(SR2.UINT32) & SR2_NACKF) != 0)) {
mbed_official 409:a95c696104d3 442 /* Slave sends NACK */
mbed_official 541:7f313a59e20c 443 (void)i2c_set_STOP(obj);
mbed_official 506:520a30fd3bde 444 /* dummy read */
mbed_official 506:520a30fd3bde 445 value = REG(DRR.UINT32);
mbed_official 506:520a30fd3bde 446 (void)i2c_wait_STOP(obj);
mbed_official 506:520a30fd3bde 447 i2c_set_SR2_NACKF_STOP(obj);
mbed_official 506:520a30fd3bde 448 obj->last_stop_flag = 1;
mbed_official 409:a95c696104d3 449 return I2C_ERROR_NO_SLAVE;
mbed_official 390:35c2c1cf29cd 450 }
mbed_official 441:d2c15dda23c1 451 /* Read in all except last byte */
mbed_official 430:d406b7919023 452 if (length > 2) {
mbed_official 441:d2c15dda23c1 453 /* dummy read */
mbed_official 441:d2c15dda23c1 454 value = REG(DRR.UINT32);
mbed_official 409:a95c696104d3 455 for (count = 0; count < (length - 1); count++) {
mbed_official 441:d2c15dda23c1 456 /* wait for it to arrive */
mbed_official 441:d2c15dda23c1 457 status = i2c_wait_RDRF(obj);
mbed_official 441:d2c15dda23c1 458 if (status != 0) {
mbed_official 506:520a30fd3bde 459 i2c_set_err_noslave(obj);
mbed_official 441:d2c15dda23c1 460 return I2C_ERROR_NO_SLAVE;
mbed_official 441:d2c15dda23c1 461 }
mbed_official 441:d2c15dda23c1 462 /* Recieve the data */
mbed_official 409:a95c696104d3 463 if (count == (length - 2)) {
mbed_official 409:a95c696104d3 464 value = i2c_do_read(obj, 1);
mbed_official 409:a95c696104d3 465 } else if ((length >= 3) && (count == (length - 3))) {
mbed_official 409:a95c696104d3 466 value = i2c_do_read(obj, 2);
mbed_official 409:a95c696104d3 467 } else {
mbed_official 409:a95c696104d3 468 value = i2c_do_read(obj, 0);
mbed_official 409:a95c696104d3 469 }
mbed_official 441:d2c15dda23c1 470 data[count] = (char)value;
mbed_official 409:a95c696104d3 471 }
mbed_official 430:d406b7919023 472 } else if (length == 2) {
mbed_official 460:3bcf9be0332c 473 /* Set MR3 WATI bit is 1 */
mbed_official 441:d2c15dda23c1 474 REG(MR3.UINT32) |= MR3_WAIT;
mbed_official 441:d2c15dda23c1 475 /* dummy read */
mbed_official 430:d406b7919023 476 value = REG(DRR.UINT32);
mbed_official 441:d2c15dda23c1 477 /* wait for it to arrive */
mbed_official 441:d2c15dda23c1 478 status = i2c_wait_RDRF(obj);
mbed_official 441:d2c15dda23c1 479 if (status != 0) {
mbed_official 506:520a30fd3bde 480 i2c_set_err_noslave(obj);
mbed_official 441:d2c15dda23c1 481 return I2C_ERROR_NO_SLAVE;
mbed_official 441:d2c15dda23c1 482 }
mbed_official 460:3bcf9be0332c 483 i2c_set_MR3_NACK(obj);
mbed_official 430:d406b7919023 484 data[count] = (char)REG(DRR.UINT32);
mbed_official 430:d406b7919023 485 count++;
mbed_official 460:3bcf9be0332c 486 } else {
mbed_official 460:3bcf9be0332c 487 /* length == 1 */
mbed_official 430:d406b7919023 488 /* Set MR3 WATI bit is 1 */;
mbed_official 441:d2c15dda23c1 489 REG(MR3.UINT32) |= MR3_WAIT;
mbed_official 460:3bcf9be0332c 490 i2c_set_MR3_NACK(obj);
mbed_official 441:d2c15dda23c1 491 /* dummy read */
mbed_official 430:d406b7919023 492 value = REG(DRR.UINT32);
mbed_official 441:d2c15dda23c1 493 }
mbed_official 441:d2c15dda23c1 494 /* wait for it to arrive */
mbed_official 441:d2c15dda23c1 495 status = i2c_wait_RDRF(obj);
mbed_official 441:d2c15dda23c1 496 if (status != 0) {
mbed_official 506:520a30fd3bde 497 i2c_set_err_noslave(obj);
mbed_official 441:d2c15dda23c1 498 return I2C_ERROR_NO_SLAVE;
mbed_official 409:a95c696104d3 499 }
mbed_official 460:3bcf9be0332c 500
mbed_official 443:ed48b4122bfb 501 /* If not repeated start, send stop. */
mbed_official 443:ed48b4122bfb 502 if (stop) {
mbed_official 541:7f313a59e20c 503 (void)i2c_set_STOP(obj);
mbed_official 443:ed48b4122bfb 504 /* RIICnDRR read */
mbed_official 541:7f313a59e20c 505 value = (REG(DRR.UINT32) & 0xFF);
mbed_official 443:ed48b4122bfb 506 data[count] = (char)value;
mbed_official 443:ed48b4122bfb 507 /* RIICnMR3.WAIT = 0 */
mbed_official 443:ed48b4122bfb 508 REG(MR3.UINT32) &= ~MR3_WAIT;
mbed_official 443:ed48b4122bfb 509 (void)i2c_wait_STOP(obj);
mbed_official 460:3bcf9be0332c 510 i2c_set_SR2_NACKF_STOP(obj);
mbed_official 443:ed48b4122bfb 511 } else {
mbed_official 460:3bcf9be0332c 512 (void)i2c_restart(obj);
mbed_official 443:ed48b4122bfb 513 /* RIICnDRR read */
mbed_official 541:7f313a59e20c 514 value = (REG(DRR.UINT32) & 0xFF);
mbed_official 443:ed48b4122bfb 515 data[count] = (char)value;
mbed_official 443:ed48b4122bfb 516 /* RIICnMR3.WAIT = 0 */
mbed_official 443:ed48b4122bfb 517 REG(MR3.UINT32) &= ~MR3_WAIT;
mbed_official 460:3bcf9be0332c 518 (void)i2c_wait_START(obj);
mbed_official 460:3bcf9be0332c 519 /* SR2.START = 0 */
mbed_official 460:3bcf9be0332c 520 REG(SR2.UINT32) &= ~SR2_START;
mbed_official 443:ed48b4122bfb 521 }
mbed_official 409:a95c696104d3 522
mbed_official 390:35c2c1cf29cd 523 return length;
mbed_official 390:35c2c1cf29cd 524 }
mbed_official 390:35c2c1cf29cd 525
mbed_official 390:35c2c1cf29cd 526 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
mbed_official 441:d2c15dda23c1 527 int cnt;
mbed_official 441:d2c15dda23c1 528 int status;
mbed_official 409:a95c696104d3 529
mbed_official 460:3bcf9be0332c 530 if(length <= 0) {
mbed_official 460:3bcf9be0332c 531 return 0;
mbed_official 390:35c2c1cf29cd 532 }
mbed_official 460:3bcf9be0332c 533
mbed_official 460:3bcf9be0332c 534 /* There is a STOP condition for last processing */
mbed_official 460:3bcf9be0332c 535 if (obj->last_stop_flag != 0) {
mbed_official 460:3bcf9be0332c 536 status = i2c_start(obj);
mbed_official 460:3bcf9be0332c 537 if (status != 0) {
mbed_official 506:520a30fd3bde 538 i2c_set_err_noslave(obj);
mbed_official 460:3bcf9be0332c 539 return I2C_ERROR_BUS_BUSY;
mbed_official 460:3bcf9be0332c 540 }
mbed_official 460:3bcf9be0332c 541 }
mbed_official 460:3bcf9be0332c 542 obj->last_stop_flag = stop;
mbed_official 441:d2c15dda23c1 543 /* Send Slave address */
mbed_official 390:35c2c1cf29cd 544 status = i2c_do_write(obj, address);
mbed_official 441:d2c15dda23c1 545 if (status != 0) {
mbed_official 506:520a30fd3bde 546 i2c_set_err_noslave(obj);
mbed_official 390:35c2c1cf29cd 547 return I2C_ERROR_NO_SLAVE;
mbed_official 390:35c2c1cf29cd 548 }
mbed_official 541:7f313a59e20c 549 /* Wait send end */
mbed_official 541:7f313a59e20c 550 status = i2c_wait_TEND(obj);
mbed_official 541:7f313a59e20c 551 if ((status != 0) || ((REG(SR2.UINT32) & SR2_NACKF) != 0)) {
mbed_official 541:7f313a59e20c 552 /* Slave sends NACK */
mbed_official 541:7f313a59e20c 553 i2c_set_err_noslave(obj);
mbed_official 541:7f313a59e20c 554 return I2C_ERROR_NO_SLAVE;
mbed_official 541:7f313a59e20c 555 }
mbed_official 441:d2c15dda23c1 556 /* Send Write data */
mbed_official 441:d2c15dda23c1 557 for (cnt=0; cnt<length; cnt++) {
mbed_official 441:d2c15dda23c1 558 status = i2c_do_write(obj, data[cnt]);
mbed_official 441:d2c15dda23c1 559 if(status != 0) {
mbed_official 506:520a30fd3bde 560 i2c_set_err_noslave(obj);
mbed_official 441:d2c15dda23c1 561 return cnt;
mbed_official 541:7f313a59e20c 562 } else {
mbed_official 541:7f313a59e20c 563 /* Wait send end */
mbed_official 541:7f313a59e20c 564 status = i2c_wait_TEND(obj);
mbed_official 541:7f313a59e20c 565 if ((status != 0) || ((REG(SR2.UINT32) & SR2_NACKF) != 0)) {
mbed_official 541:7f313a59e20c 566 /* Slave sends NACK */
mbed_official 541:7f313a59e20c 567 i2c_set_err_noslave(obj);
mbed_official 541:7f313a59e20c 568 return I2C_ERROR_NO_SLAVE;
mbed_official 541:7f313a59e20c 569 }
mbed_official 390:35c2c1cf29cd 570 }
mbed_official 390:35c2c1cf29cd 571 }
mbed_official 443:ed48b4122bfb 572 /* If not repeated start, send stop. */
mbed_official 443:ed48b4122bfb 573 if (stop) {
mbed_official 541:7f313a59e20c 574 (void)i2c_set_STOP(obj);
mbed_official 443:ed48b4122bfb 575 (void)i2c_wait_STOP(obj);
mbed_official 460:3bcf9be0332c 576 i2c_set_SR2_NACKF_STOP(obj);
mbed_official 460:3bcf9be0332c 577 } else {
mbed_official 460:3bcf9be0332c 578 (void)i2c_restart(obj);
mbed_official 460:3bcf9be0332c 579 (void)i2c_wait_START(obj);
mbed_official 460:3bcf9be0332c 580 /* SR2.START = 0 */
mbed_official 460:3bcf9be0332c 581 REG(SR2.UINT32) &= ~SR2_START;
mbed_official 460:3bcf9be0332c 582
mbed_official 443:ed48b4122bfb 583 }
mbed_official 441:d2c15dda23c1 584
mbed_official 390:35c2c1cf29cd 585 return length;
mbed_official 390:35c2c1cf29cd 586 }
mbed_official 390:35c2c1cf29cd 587
mbed_official 390:35c2c1cf29cd 588 void i2c_reset(i2c_t *obj) {
mbed_official 541:7f313a59e20c 589 (void)i2c_set_STOP(obj);
mbed_official 441:d2c15dda23c1 590 (void)i2c_wait_STOP(obj);
mbed_official 460:3bcf9be0332c 591 i2c_set_SR2_NACKF_STOP(obj);
mbed_official 390:35c2c1cf29cd 592 }
mbed_official 390:35c2c1cf29cd 593
mbed_official 390:35c2c1cf29cd 594 int i2c_byte_read(i2c_t *obj, int last) {
mbed_official 441:d2c15dda23c1 595 int status;
mbed_official 541:7f313a59e20c 596 int data;
mbed_official 441:d2c15dda23c1 597
mbed_official 541:7f313a59e20c 598 data = i2c_do_read(obj, last);
mbed_official 441:d2c15dda23c1 599 /* wait for it to arrive */
mbed_official 441:d2c15dda23c1 600 status = i2c_wait_RDRF(obj);
mbed_official 441:d2c15dda23c1 601 if (status != 0) {
mbed_official 541:7f313a59e20c 602 i2c_set_SR2_NACKF_STOP(obj);
mbed_official 441:d2c15dda23c1 603 return I2C_ERROR_NO_SLAVE;
mbed_official 441:d2c15dda23c1 604 }
mbed_official 430:d406b7919023 605
mbed_official 541:7f313a59e20c 606 return data;
mbed_official 390:35c2c1cf29cd 607 }
mbed_official 390:35c2c1cf29cd 608
mbed_official 390:35c2c1cf29cd 609 int i2c_byte_write(i2c_t *obj, int data) {
mbed_official 541:7f313a59e20c 610 int ack = 0;
mbed_official 460:3bcf9be0332c 611 int status;
mbed_official 541:7f313a59e20c 612 int timeout = 0;
mbed_official 460:3bcf9be0332c 613
mbed_official 460:3bcf9be0332c 614 status = i2c_do_write(obj, (data & 0xFF));
mbed_official 441:d2c15dda23c1 615 if (status != 0) {
mbed_official 541:7f313a59e20c 616 i2c_set_SR2_NACKF_STOP(obj);
mbed_official 390:35c2c1cf29cd 617 } else {
mbed_official 541:7f313a59e20c 618 while (((i2c_status(obj) & SR2_RDRF) == 0) && ((i2c_status(obj) & SR2_TEND) == 0)) {
mbed_official 541:7f313a59e20c 619 timeout++;
mbed_official 541:7f313a59e20c 620 if (timeout >= WAIT_TIMEOUT) {
mbed_official 541:7f313a59e20c 621 return ack;
mbed_official 541:7f313a59e20c 622 }
mbed_official 541:7f313a59e20c 623 }
mbed_official 541:7f313a59e20c 624 /* check ACK/NACK */
mbed_official 541:7f313a59e20c 625 if ((REG(SR2.UINT32) & SR2_NACKF) != 0) {
mbed_official 541:7f313a59e20c 626 /* NACK */
mbed_official 541:7f313a59e20c 627 i2c_set_SR2_NACKF_STOP(obj);
mbed_official 541:7f313a59e20c 628 } else {
mbed_official 541:7f313a59e20c 629 ack = 1;
mbed_official 541:7f313a59e20c 630 }
mbed_official 390:35c2c1cf29cd 631 }
mbed_official 409:a95c696104d3 632
mbed_official 390:35c2c1cf29cd 633 return ack;
mbed_official 390:35c2c1cf29cd 634 }
mbed_official 390:35c2c1cf29cd 635
mbed_official 390:35c2c1cf29cd 636 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
mbed_official 390:35c2c1cf29cd 637 if (enable_slave != 0) {
mbed_official 460:3bcf9be0332c 638 REG(SER.UINT32) |= SER_SAR0E; // only slave addr 0 is enabled
mbed_official 390:35c2c1cf29cd 639 } else {
mbed_official 460:3bcf9be0332c 640 REG(SER.UINT32) &= ~SER_SAR0E; // no slave addr enabled
mbed_official 390:35c2c1cf29cd 641 }
mbed_official 390:35c2c1cf29cd 642 }
mbed_official 390:35c2c1cf29cd 643
mbed_official 390:35c2c1cf29cd 644 int i2c_slave_receive(i2c_t *obj) {
mbed_official 390:35c2c1cf29cd 645 int status;
mbed_official 390:35c2c1cf29cd 646 int retval;
mbed_official 409:a95c696104d3 647
mbed_official 541:7f313a59e20c 648 status = (REG(SR1.UINT8[0]) & SR1_AAS0);
mbed_official 460:3bcf9be0332c 649 status |= (REG(CR2.UINT8[0]) & CR2_TRS) >> 4;
mbed_official 460:3bcf9be0332c 650
mbed_official 390:35c2c1cf29cd 651 switch(status) {
mbed_official 460:3bcf9be0332c 652 case 0x01:
mbed_official 460:3bcf9be0332c 653 /* the master is writing to this slave */
mbed_official 460:3bcf9be0332c 654 retval = 3;
mbed_official 460:3bcf9be0332c 655 break;
mbed_official 460:3bcf9be0332c 656 case 0x02:
mbed_official 460:3bcf9be0332c 657 /* the master is writing to all slave */
mbed_official 460:3bcf9be0332c 658 retval = 2;
mbed_official 460:3bcf9be0332c 659 break;
mbed_official 460:3bcf9be0332c 660 case 0x03:
mbed_official 460:3bcf9be0332c 661 /* the master has requested a read from this slave */
mbed_official 460:3bcf9be0332c 662 retval = 1;
mbed_official 460:3bcf9be0332c 663 break;
mbed_official 460:3bcf9be0332c 664 default :
mbed_official 460:3bcf9be0332c 665 /* no data */
mbed_official 460:3bcf9be0332c 666 retval = 0;
mbed_official 460:3bcf9be0332c 667 break;
mbed_official 390:35c2c1cf29cd 668 }
mbed_official 409:a95c696104d3 669
mbed_official 460:3bcf9be0332c 670 return retval;
mbed_official 390:35c2c1cf29cd 671 }
mbed_official 390:35c2c1cf29cd 672
mbed_official 390:35c2c1cf29cd 673 int i2c_slave_read(i2c_t *obj, char *data, int length) {
mbed_official 460:3bcf9be0332c 674 int timeout = 0;
mbed_official 460:3bcf9be0332c 675 int count;
mbed_official 460:3bcf9be0332c 676 int break_flg = 0;
mbed_official 409:a95c696104d3 677
mbed_official 460:3bcf9be0332c 678 if(length <= 0) {
mbed_official 460:3bcf9be0332c 679 return 0;
mbed_official 460:3bcf9be0332c 680 }
mbed_official 460:3bcf9be0332c 681 for (count = 0; ((count < (length + 1)) && (break_flg == 0)); count++) {
mbed_official 460:3bcf9be0332c 682 /* There is no timeout, but the upper limit value is set to avoid an infinite loop. */
mbed_official 541:7f313a59e20c 683 while (((i2c_status(obj) & SR2_STOP) != 0) || ((i2c_status(obj) & SR2_RDRF) == 0)) {
mbed_official 541:7f313a59e20c 684 if ((i2c_status(obj) & SR2_STOP) != 0) {
mbed_official 460:3bcf9be0332c 685 break_flg = 1;
mbed_official 460:3bcf9be0332c 686 break;
mbed_official 460:3bcf9be0332c 687 }
mbed_official 460:3bcf9be0332c 688 timeout ++;
mbed_official 506:520a30fd3bde 689 if (timeout >= WAIT_TIMEOUT) {
mbed_official 460:3bcf9be0332c 690 return -1;
mbed_official 460:3bcf9be0332c 691 }
mbed_official 460:3bcf9be0332c 692 }
mbed_official 460:3bcf9be0332c 693 if (break_flg == 0) {
mbed_official 460:3bcf9be0332c 694 if (count == 0) {
mbed_official 460:3bcf9be0332c 695 /* dummy read */
mbed_official 460:3bcf9be0332c 696 (void)REG(DRR.UINT32);
mbed_official 460:3bcf9be0332c 697 } else {
mbed_official 460:3bcf9be0332c 698 data[count - 1] = (char)(REG(DRR.UINT32) & 0xFF);
mbed_official 460:3bcf9be0332c 699 }
mbed_official 390:35c2c1cf29cd 700 }
mbed_official 460:3bcf9be0332c 701 }
mbed_official 460:3bcf9be0332c 702 if (break_flg == 0) {
mbed_official 460:3bcf9be0332c 703 (void)i2c_wait_STOP(obj);
mbed_official 460:3bcf9be0332c 704 } else {
mbed_official 541:7f313a59e20c 705 if ((i2c_status(obj) & SR2_RDRF) != 0) {
mbed_official 460:3bcf9be0332c 706 if (count <= 1) {
mbed_official 460:3bcf9be0332c 707 /* fail safe */
mbed_official 460:3bcf9be0332c 708 /* dummy read */
mbed_official 460:3bcf9be0332c 709 (void)REG(DRR.UINT32);
mbed_official 460:3bcf9be0332c 710 } else {
mbed_official 460:3bcf9be0332c 711 data[count - 2] = (char)(REG(DRR.UINT32) & 0xFF);
mbed_official 460:3bcf9be0332c 712 }
mbed_official 460:3bcf9be0332c 713 }
mbed_official 460:3bcf9be0332c 714 }
mbed_official 460:3bcf9be0332c 715 /* SR2.STOP = 0 */
mbed_official 460:3bcf9be0332c 716 REG(SR2.UINT32) &= ~SR2_STOP;
mbed_official 409:a95c696104d3 717
mbed_official 460:3bcf9be0332c 718 return (count - 1);
mbed_official 460:3bcf9be0332c 719 }
mbed_official 460:3bcf9be0332c 720
mbed_official 460:3bcf9be0332c 721 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
mbed_official 460:3bcf9be0332c 722 int count = 0;
mbed_official 460:3bcf9be0332c 723 int status = 0;
mbed_official 460:3bcf9be0332c 724
mbed_official 460:3bcf9be0332c 725 if(length <= 0) {
mbed_official 460:3bcf9be0332c 726 return 0;
mbed_official 390:35c2c1cf29cd 727 }
mbed_official 409:a95c696104d3 728
mbed_official 460:3bcf9be0332c 729 while ((count < length) && (status == 0)) {
mbed_official 460:3bcf9be0332c 730 status = i2c_do_write(obj, data[count]);
mbed_official 541:7f313a59e20c 731 if(status == 0) {
mbed_official 541:7f313a59e20c 732 /* Wait send end */
mbed_official 541:7f313a59e20c 733 status = i2c_wait_TEND(obj);
mbed_official 541:7f313a59e20c 734 if ((status != 0) || ((count < (length - 1)) && ((REG(SR2.UINT32) & SR2_NACKF) != 0))) {
mbed_official 541:7f313a59e20c 735 /* NACK */
mbed_official 541:7f313a59e20c 736 break;
mbed_official 541:7f313a59e20c 737 }
mbed_official 541:7f313a59e20c 738 }
mbed_official 460:3bcf9be0332c 739 count++;
mbed_official 460:3bcf9be0332c 740 }
mbed_official 460:3bcf9be0332c 741 /* dummy read */
mbed_official 460:3bcf9be0332c 742 (void)REG(DRR.UINT32);
mbed_official 460:3bcf9be0332c 743 (void)i2c_wait_STOP(obj);
mbed_official 460:3bcf9be0332c 744 i2c_set_SR2_NACKF_STOP(obj);
mbed_official 409:a95c696104d3 745
mbed_official 390:35c2c1cf29cd 746 return count;
mbed_official 390:35c2c1cf29cd 747 }
mbed_official 390:35c2c1cf29cd 748
mbed_official 460:3bcf9be0332c 749 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
mbed_official 541:7f313a59e20c 750 REG(SAR0.UINT32) = (address & 0xfffffffe);
mbed_official 390:35c2c1cf29cd 751 }