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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_i2c.c@630:825f75ca301e, 2015-09-28 (annotated)

Committer:
mbed_official
Date:
Mon Sep 28 10:45:10 2015 +0100
Revision:
630:825f75ca301e
Parent:
441:d2c15dda23c1 
Synchronized with git revision 54fbe4144faf309c37205a5d39fa665daa919f10



Full URL: https://github.com/mbedmicro/mbed/commit/54fbe4144faf309c37205a5d39fa665daa919f10/



NUCLEO_F031K6 : Add new target

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 340:28d1f895c6fe 1 /**
mbed_official 340:28d1f895c6fe 2 ******************************************************************************
mbed_official 340:28d1f895c6fe 3 * @file stm32f0xx_hal_i2c.c
mbed_official 340:28d1f895c6fe 4 * @author MCD Application Team
mbed_official 630:825f75ca301e 5 * @version V1.3.0
mbed_official 630:825f75ca301e 6 * @date 26-June-2015
mbed_official 340:28d1f895c6fe 7 * @brief I2C HAL module driver.
mbed_official 340:28d1f895c6fe 8 * This file provides firmware functions to manage the following
mbed_official 340:28d1f895c6fe 9 * functionalities of the Inter Integrated Circuit (I2C) peripheral:
mbed_official 340:28d1f895c6fe 10 * + Initialization and de-initialization functions
mbed_official 340:28d1f895c6fe 11 * + IO operation functions
mbed_official 630:825f75ca301e 12 * + Peripheral State and Errors functions
mbed_official 340:28d1f895c6fe 13 *
mbed_official 340:28d1f895c6fe 14 @verbatim
mbed_official 340:28d1f895c6fe 15 ==============================================================================
mbed_official 340:28d1f895c6fe 16 ##### How to use this driver #####
mbed_official 340:28d1f895c6fe 17 ==============================================================================
mbed_official 340:28d1f895c6fe 18 [..]
mbed_official 340:28d1f895c6fe 19 The I2C HAL driver can be used as follows:
mbed_official 340:28d1f895c6fe 20
mbed_official 340:28d1f895c6fe 21 (#) Declare a I2C_HandleTypeDef handle structure, for example:
mbed_official 340:28d1f895c6fe 22 I2C_HandleTypeDef hi2c;
mbed_official 340:28d1f895c6fe 23
mbed_official 630:825f75ca301e 24 (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
mbed_official 630:825f75ca301e 25 (##) Enable the I2Cx interface clock
mbed_official 630:825f75ca301e 26 (##) I2C pins configuration
mbed_official 340:28d1f895c6fe 27 (+++) Enable the clock for the I2C GPIOs
mbed_official 340:28d1f895c6fe 28 (+++) Configure I2C pins as alternate function open-drain
mbed_official 630:825f75ca301e 29 (##) NVIC configuration if you need to use interrupt process
mbed_official 340:28d1f895c6fe 30 (+++) Configure the I2Cx interrupt priority
mbed_official 340:28d1f895c6fe 31 (+++) Enable the NVIC I2C IRQ Channel
mbed_official 630:825f75ca301e 32 (##) DMA Configuration if you need to use DMA process
mbed_official 340:28d1f895c6fe 33 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
mbed_official 340:28d1f895c6fe 34 (+++) Enable the DMAx interface clock using
mbed_official 340:28d1f895c6fe 35 (+++) Configure the DMA handle parameters
mbed_official 340:28d1f895c6fe 36 (+++) Configure the DMA Tx or Rx channel
mbed_official 630:825f75ca301e 37 (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
mbed_official 630:825f75ca301e 38 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
mbed_official 630:825f75ca301e 39 the DMA Tx or Rx channel
mbed_official 630:825f75ca301e 40
mbed_official 630:825f75ca301e 41 (#) Configure the Communication Clock Timing, Own Address1, Master Addressing Mode, Dual Addressing mode,
mbed_official 340:28d1f895c6fe 42 Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure.
mbed_official 340:28d1f895c6fe 43
mbed_official 630:825f75ca301e 44 (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
mbed_official 630:825f75ca301e 45 (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
mbed_official 340:28d1f895c6fe 46
mbed_official 340:28d1f895c6fe 47 (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
mbed_official 340:28d1f895c6fe 48
mbed_official 630:825f75ca301e 49 (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
mbed_official 340:28d1f895c6fe 50
mbed_official 340:28d1f895c6fe 51 *** Polling mode IO operation ***
mbed_official 340:28d1f895c6fe 52 =================================
mbed_official 340:28d1f895c6fe 53 [..]
mbed_official 340:28d1f895c6fe 54 (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
mbed_official 340:28d1f895c6fe 55 (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
mbed_official 340:28d1f895c6fe 56 (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
mbed_official 340:28d1f895c6fe 57 (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
mbed_official 340:28d1f895c6fe 58
mbed_official 340:28d1f895c6fe 59 *** Polling mode IO MEM operation ***
mbed_official 340:28d1f895c6fe 60 =====================================
mbed_official 340:28d1f895c6fe 61 [..]
mbed_official 340:28d1f895c6fe 62 (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
mbed_official 340:28d1f895c6fe 63 (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
mbed_official 340:28d1f895c6fe 64
mbed_official 340:28d1f895c6fe 65
mbed_official 340:28d1f895c6fe 66 *** Interrupt mode IO operation ***
mbed_official 340:28d1f895c6fe 67 ===================================
mbed_official 340:28d1f895c6fe 68 [..]
mbed_official 630:825f75ca301e 69 (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT()
mbed_official 630:825f75ca301e 70 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 71 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
mbed_official 630:825f75ca301e 72 (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT()
mbed_official 630:825f75ca301e 73 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 74 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
mbed_official 630:825f75ca301e 75 (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT()
mbed_official 630:825f75ca301e 76 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 77 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
mbed_official 630:825f75ca301e 78 (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT()
mbed_official 630:825f75ca301e 79 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 80 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
mbed_official 340:28d1f895c6fe 81 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
mbed_official 630:825f75ca301e 82 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
mbed_official 340:28d1f895c6fe 83
mbed_official 340:28d1f895c6fe 84 *** Interrupt mode IO MEM operation ***
mbed_official 340:28d1f895c6fe 85 =======================================
mbed_official 340:28d1f895c6fe 86 [..]
mbed_official 630:825f75ca301e 87 (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
mbed_official 340:28d1f895c6fe 88 HAL_I2C_Mem_Write_IT()
mbed_official 630:825f75ca301e 89 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 90 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
mbed_official 630:825f75ca301e 91 (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
mbed_official 340:28d1f895c6fe 92 HAL_I2C_Mem_Read_IT()
mbed_official 630:825f75ca301e 93 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 94 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
mbed_official 340:28d1f895c6fe 95 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
mbed_official 630:825f75ca301e 96 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
mbed_official 340:28d1f895c6fe 97
mbed_official 340:28d1f895c6fe 98 *** DMA mode IO operation ***
mbed_official 340:28d1f895c6fe 99 ==============================
mbed_official 340:28d1f895c6fe 100 [..]
mbed_official 630:825f75ca301e 101 (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
mbed_official 340:28d1f895c6fe 102 HAL_I2C_Master_Transmit_DMA()
mbed_official 630:825f75ca301e 103 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 104 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
mbed_official 630:825f75ca301e 105 (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
mbed_official 340:28d1f895c6fe 106 HAL_I2C_Master_Receive_DMA()
mbed_official 630:825f75ca301e 107 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 108 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
mbed_official 630:825f75ca301e 109 (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
mbed_official 340:28d1f895c6fe 110 HAL_I2C_Slave_Transmit_DMA()
mbed_official 630:825f75ca301e 111 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 112 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
mbed_official 630:825f75ca301e 113 (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
mbed_official 340:28d1f895c6fe 114 HAL_I2C_Slave_Receive_DMA()
mbed_official 630:825f75ca301e 115 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 116 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
mbed_official 340:28d1f895c6fe 117 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
mbed_official 630:825f75ca301e 118 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
mbed_official 340:28d1f895c6fe 119
mbed_official 340:28d1f895c6fe 120 *** DMA mode IO MEM operation ***
mbed_official 340:28d1f895c6fe 121 =================================
mbed_official 340:28d1f895c6fe 122 [..]
mbed_official 630:825f75ca301e 123 (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
mbed_official 340:28d1f895c6fe 124 HAL_I2C_Mem_Write_DMA()
mbed_official 630:825f75ca301e 125 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 126 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
mbed_official 630:825f75ca301e 127 (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
mbed_official 340:28d1f895c6fe 128 HAL_I2C_Mem_Read_DMA()
mbed_official 630:825f75ca301e 129 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback() is executed and user can
mbed_official 630:825f75ca301e 130 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
mbed_official 340:28d1f895c6fe 131 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
mbed_official 630:825f75ca301e 132 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
mbed_official 340:28d1f895c6fe 133
mbed_official 340:28d1f895c6fe 134
mbed_official 340:28d1f895c6fe 135 *** I2C HAL driver macros list ***
mbed_official 340:28d1f895c6fe 136 ==================================
mbed_official 340:28d1f895c6fe 137 [..]
mbed_official 340:28d1f895c6fe 138 Below the list of most used macros in I2C HAL driver.
mbed_official 340:28d1f895c6fe 139
mbed_official 630:825f75ca301e 140 (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
mbed_official 630:825f75ca301e 141 (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
mbed_official 630:825f75ca301e 142 (+) __HAL_I2C_GET_FLAG: Checks whether the specified I2C flag is set or not
mbed_official 630:825f75ca301e 143 (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
mbed_official 630:825f75ca301e 144 (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
mbed_official 630:825f75ca301e 145 (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
mbed_official 340:28d1f895c6fe 146
mbed_official 340:28d1f895c6fe 147 [..]
mbed_official 340:28d1f895c6fe 148 (@) You can refer to the I2C HAL driver header file for more useful macros
mbed_official 340:28d1f895c6fe 149
mbed_official 340:28d1f895c6fe 150 @endverbatim
mbed_official 340:28d1f895c6fe 151 ******************************************************************************
mbed_official 340:28d1f895c6fe 152 * @attention
mbed_official 340:28d1f895c6fe 153 *
mbed_official 630:825f75ca301e 154 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 340:28d1f895c6fe 155 *
mbed_official 340:28d1f895c6fe 156 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 340:28d1f895c6fe 157 * are permitted provided that the following conditions are met:
mbed_official 340:28d1f895c6fe 158 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 340:28d1f895c6fe 159 * this list of conditions and the following disclaimer.
mbed_official 340:28d1f895c6fe 160 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 340:28d1f895c6fe 161 * this list of conditions and the following disclaimer in the documentation
mbed_official 340:28d1f895c6fe 162 * and/or other materials provided with the distribution.
mbed_official 340:28d1f895c6fe 163 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 340:28d1f895c6fe 164 * may be used to endorse or promote products derived from this software
mbed_official 340:28d1f895c6fe 165 * without specific prior written permission.
mbed_official 340:28d1f895c6fe 166 *
mbed_official 340:28d1f895c6fe 167 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 340:28d1f895c6fe 168 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 340:28d1f895c6fe 169 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 340:28d1f895c6fe 170 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 340:28d1f895c6fe 171 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 340:28d1f895c6fe 172 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 340:28d1f895c6fe 173 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 340:28d1f895c6fe 174 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 340:28d1f895c6fe 175 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 340:28d1f895c6fe 176 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 340:28d1f895c6fe 177 *
mbed_official 340:28d1f895c6fe 178 ******************************************************************************
mbed_official 340:28d1f895c6fe 179 */
mbed_official 340:28d1f895c6fe 180
mbed_official 340:28d1f895c6fe 181 /* Includes ------------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 182 #include "stm32f0xx_hal.h"
mbed_official 340:28d1f895c6fe 183
mbed_official 340:28d1f895c6fe 184 /** @addtogroup STM32F0xx_HAL_Driver
mbed_official 340:28d1f895c6fe 185 * @{
mbed_official 340:28d1f895c6fe 186 */
mbed_official 340:28d1f895c6fe 187
mbed_official 630:825f75ca301e 188 /** @defgroup I2C I2C
mbed_official 340:28d1f895c6fe 189 * @brief I2C HAL module driver
mbed_official 340:28d1f895c6fe 190 * @{
mbed_official 340:28d1f895c6fe 191 */
mbed_official 340:28d1f895c6fe 192
mbed_official 340:28d1f895c6fe 193 #ifdef HAL_I2C_MODULE_ENABLED
mbed_official 340:28d1f895c6fe 194
mbed_official 340:28d1f895c6fe 195 /* Private typedef -----------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 196 /* Private define ------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 197
mbed_official 340:28d1f895c6fe 198 /** @defgroup I2C_Private_Define I2C Private Define
mbed_official 340:28d1f895c6fe 199 * @{
mbed_official 340:28d1f895c6fe 200 */
mbed_official 340:28d1f895c6fe 201 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! I2C TIMING clear register Mask */
mbed_official 340:28d1f895c6fe 202 #define I2C_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */
mbed_official 340:28d1f895c6fe 203 #define I2C_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 204 #define I2C_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 205 #define I2C_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 206 #define I2C_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 207 #define I2C_TIMEOUT_TC ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 208 #define I2C_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 209 #define I2C_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 210 #define I2C_TIMEOUT_FLAG ((uint32_t)25) /* 25 ms */
mbed_official 340:28d1f895c6fe 211 /**
mbed_official 340:28d1f895c6fe 212 * @}
mbed_official 340:28d1f895c6fe 213 */
mbed_official 340:28d1f895c6fe 214
mbed_official 340:28d1f895c6fe 215 /* Private macro -------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 216 /* Private variables ---------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 217 /* Private function prototypes -----------------------------------------------*/
mbed_official 340:28d1f895c6fe 218
mbed_official 340:28d1f895c6fe 219 /** @defgroup I2C_Private_Functions I2C Private Functions
mbed_official 340:28d1f895c6fe 220 * @{
mbed_official 340:28d1f895c6fe 221 */
mbed_official 340:28d1f895c6fe 222 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 223 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 224 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 225 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 226 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 227 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 228 static void I2C_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 229
mbed_official 340:28d1f895c6fe 230 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
mbed_official 340:28d1f895c6fe 231 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
mbed_official 340:28d1f895c6fe 232 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
mbed_official 630:825f75ca301e 233 static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
mbed_official 340:28d1f895c6fe 234 static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
mbed_official 340:28d1f895c6fe 235 static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
mbed_official 340:28d1f895c6fe 236 static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
mbed_official 340:28d1f895c6fe 237
mbed_official 340:28d1f895c6fe 238 static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c);
mbed_official 340:28d1f895c6fe 239 static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c);
mbed_official 340:28d1f895c6fe 240
mbed_official 340:28d1f895c6fe 241 static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c);
mbed_official 340:28d1f895c6fe 242 static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c);
mbed_official 340:28d1f895c6fe 243
mbed_official 340:28d1f895c6fe 244 static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
mbed_official 340:28d1f895c6fe 245 /**
mbed_official 340:28d1f895c6fe 246 * @}
mbed_official 340:28d1f895c6fe 247 */
mbed_official 340:28d1f895c6fe 248
mbed_official 630:825f75ca301e 249 /* Exported functions --------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 250
mbed_official 340:28d1f895c6fe 251 /** @defgroup I2C_Exported_Functions I2C Exported Functions
mbed_official 340:28d1f895c6fe 252 * @{
mbed_official 340:28d1f895c6fe 253 */
mbed_official 340:28d1f895c6fe 254
mbed_official 340:28d1f895c6fe 255 /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 340:28d1f895c6fe 256 * @brief Initialization and Configuration functions
mbed_official 340:28d1f895c6fe 257 *
mbed_official 340:28d1f895c6fe 258 @verbatim
mbed_official 340:28d1f895c6fe 259 ===============================================================================
mbed_official 630:825f75ca301e 260 ##### Initialization and de-initialization functions #####
mbed_official 340:28d1f895c6fe 261 ===============================================================================
mbed_official 340:28d1f895c6fe 262 [..] This subsection provides a set of functions allowing to initialize and
mbed_official 630:825f75ca301e 263 deinitialize the I2Cx peripheral:
mbed_official 340:28d1f895c6fe 264
mbed_official 340:28d1f895c6fe 265 (+) User must Implement HAL_I2C_MspInit() function in which he configures
mbed_official 340:28d1f895c6fe 266 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
mbed_official 340:28d1f895c6fe 267
mbed_official 340:28d1f895c6fe 268 (+) Call the function HAL_I2C_Init() to configure the selected device with
mbed_official 340:28d1f895c6fe 269 the selected configuration:
mbed_official 340:28d1f895c6fe 270 (++) Clock Timing
mbed_official 340:28d1f895c6fe 271 (++) Own Address 1
mbed_official 340:28d1f895c6fe 272 (++) Addressing mode (Master, Slave)
mbed_official 340:28d1f895c6fe 273 (++) Dual Addressing mode
mbed_official 340:28d1f895c6fe 274 (++) Own Address 2
mbed_official 340:28d1f895c6fe 275 (++) Own Address 2 Mask
mbed_official 340:28d1f895c6fe 276 (++) General call mode
mbed_official 340:28d1f895c6fe 277 (++) Nostretch mode
mbed_official 340:28d1f895c6fe 278
mbed_official 340:28d1f895c6fe 279 (+) Call the function HAL_I2C_DeInit() to restore the default configuration
mbed_official 630:825f75ca301e 280 of the selected I2Cx peripheral.
mbed_official 340:28d1f895c6fe 281
mbed_official 340:28d1f895c6fe 282 @endverbatim
mbed_official 340:28d1f895c6fe 283 * @{
mbed_official 340:28d1f895c6fe 284 */
mbed_official 340:28d1f895c6fe 285
mbed_official 340:28d1f895c6fe 286 /**
mbed_official 340:28d1f895c6fe 287 * @brief Initializes the I2C according to the specified parameters
mbed_official 630:825f75ca301e 288 * in the I2C_InitTypeDef and initialize the associated handle.
mbed_official 340:28d1f895c6fe 289 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 290 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 291 * @retval HAL status
mbed_official 340:28d1f895c6fe 292 */
mbed_official 340:28d1f895c6fe 293 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 294 {
mbed_official 340:28d1f895c6fe 295 /* Check the I2C handle allocation */
mbed_official 441:d2c15dda23c1 296 if(hi2c == NULL)
mbed_official 340:28d1f895c6fe 297 {
mbed_official 340:28d1f895c6fe 298 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 299 }
mbed_official 340:28d1f895c6fe 300
mbed_official 340:28d1f895c6fe 301 /* Check the parameters */
mbed_official 340:28d1f895c6fe 302 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
mbed_official 340:28d1f895c6fe 303 assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
mbed_official 340:28d1f895c6fe 304 assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
mbed_official 340:28d1f895c6fe 305 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
mbed_official 340:28d1f895c6fe 306 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
mbed_official 340:28d1f895c6fe 307 assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks));
mbed_official 340:28d1f895c6fe 308 assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
mbed_official 340:28d1f895c6fe 309 assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
mbed_official 340:28d1f895c6fe 310
mbed_official 340:28d1f895c6fe 311 if(hi2c->State == HAL_I2C_STATE_RESET)
mbed_official 340:28d1f895c6fe 312 {
mbed_official 630:825f75ca301e 313 /* Allocate lock resource and initialize it */
mbed_official 630:825f75ca301e 314 hi2c->Lock = HAL_UNLOCKED;
mbed_official 630:825f75ca301e 315
mbed_official 340:28d1f895c6fe 316 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
mbed_official 340:28d1f895c6fe 317 HAL_I2C_MspInit(hi2c);
mbed_official 340:28d1f895c6fe 318 }
mbed_official 340:28d1f895c6fe 319
mbed_official 340:28d1f895c6fe 320 hi2c->State = HAL_I2C_STATE_BUSY;
mbed_official 340:28d1f895c6fe 321
mbed_official 340:28d1f895c6fe 322 /* Disable the selected I2C peripheral */
mbed_official 340:28d1f895c6fe 323 __HAL_I2C_DISABLE(hi2c);
mbed_official 340:28d1f895c6fe 324
mbed_official 340:28d1f895c6fe 325 /*---------------------------- I2Cx TIMINGR Configuration ------------------*/
mbed_official 340:28d1f895c6fe 326 /* Configure I2Cx: Frequency range */
mbed_official 340:28d1f895c6fe 327 hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
mbed_official 340:28d1f895c6fe 328
mbed_official 340:28d1f895c6fe 329 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
mbed_official 340:28d1f895c6fe 330 /* Configure I2Cx: Own Address1 and ack own address1 mode */
mbed_official 340:28d1f895c6fe 331 hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
mbed_official 340:28d1f895c6fe 332 if(hi2c->Init.OwnAddress1 != 0)
mbed_official 340:28d1f895c6fe 333 {
mbed_official 340:28d1f895c6fe 334 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
mbed_official 340:28d1f895c6fe 335 {
mbed_official 340:28d1f895c6fe 336 hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
mbed_official 340:28d1f895c6fe 337 }
mbed_official 340:28d1f895c6fe 338 else /* I2C_ADDRESSINGMODE_10BIT */
mbed_official 340:28d1f895c6fe 339 {
mbed_official 340:28d1f895c6fe 340 hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);
mbed_official 340:28d1f895c6fe 341 }
mbed_official 340:28d1f895c6fe 342 }
mbed_official 340:28d1f895c6fe 343
mbed_official 340:28d1f895c6fe 344 /*---------------------------- I2Cx CR2 Configuration ----------------------*/
mbed_official 340:28d1f895c6fe 345 /* Configure I2Cx: Addressing Master mode */
mbed_official 340:28d1f895c6fe 346 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
mbed_official 340:28d1f895c6fe 347 {
mbed_official 340:28d1f895c6fe 348 hi2c->Instance->CR2 = (I2C_CR2_ADD10);
mbed_official 340:28d1f895c6fe 349 }
mbed_official 340:28d1f895c6fe 350 /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
mbed_official 340:28d1f895c6fe 351 hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
mbed_official 340:28d1f895c6fe 352
mbed_official 340:28d1f895c6fe 353 /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
mbed_official 340:28d1f895c6fe 354 /* Configure I2Cx: Dual mode and Own Address2 */
mbed_official 340:28d1f895c6fe 355 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8));
mbed_official 340:28d1f895c6fe 356
mbed_official 340:28d1f895c6fe 357 /*---------------------------- I2Cx CR1 Configuration ----------------------*/
mbed_official 340:28d1f895c6fe 358 /* Configure I2Cx: Generalcall and NoStretch mode */
mbed_official 340:28d1f895c6fe 359 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
mbed_official 340:28d1f895c6fe 360
mbed_official 340:28d1f895c6fe 361 /* Enable the selected I2C peripheral */
mbed_official 340:28d1f895c6fe 362 __HAL_I2C_ENABLE(hi2c);
mbed_official 340:28d1f895c6fe 363
mbed_official 340:28d1f895c6fe 364 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 365 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 366
mbed_official 340:28d1f895c6fe 367 return HAL_OK;
mbed_official 340:28d1f895c6fe 368 }
mbed_official 340:28d1f895c6fe 369
mbed_official 340:28d1f895c6fe 370 /**
mbed_official 630:825f75ca301e 371 * @brief DeInitialize the I2C peripheral.
mbed_official 340:28d1f895c6fe 372 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 373 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 374 * @retval HAL status
mbed_official 340:28d1f895c6fe 375 */
mbed_official 340:28d1f895c6fe 376 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 377 {
mbed_official 340:28d1f895c6fe 378 /* Check the I2C handle allocation */
mbed_official 441:d2c15dda23c1 379 if(hi2c == NULL)
mbed_official 340:28d1f895c6fe 380 {
mbed_official 340:28d1f895c6fe 381 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 382 }
mbed_official 340:28d1f895c6fe 383
mbed_official 340:28d1f895c6fe 384 /* Check the parameters */
mbed_official 340:28d1f895c6fe 385 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
mbed_official 340:28d1f895c6fe 386
mbed_official 340:28d1f895c6fe 387 hi2c->State = HAL_I2C_STATE_BUSY;
mbed_official 340:28d1f895c6fe 388
mbed_official 340:28d1f895c6fe 389 /* Disable the I2C Peripheral Clock */
mbed_official 340:28d1f895c6fe 390 __HAL_I2C_DISABLE(hi2c);
mbed_official 340:28d1f895c6fe 391
mbed_official 340:28d1f895c6fe 392 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 340:28d1f895c6fe 393 HAL_I2C_MspDeInit(hi2c);
mbed_official 340:28d1f895c6fe 394
mbed_official 340:28d1f895c6fe 395 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 630:825f75ca301e 396
mbed_official 340:28d1f895c6fe 397 hi2c->State = HAL_I2C_STATE_RESET;
mbed_official 340:28d1f895c6fe 398
mbed_official 340:28d1f895c6fe 399 /* Release Lock */
mbed_official 340:28d1f895c6fe 400 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 401
mbed_official 340:28d1f895c6fe 402 return HAL_OK;
mbed_official 340:28d1f895c6fe 403 }
mbed_official 340:28d1f895c6fe 404
mbed_official 340:28d1f895c6fe 405 /**
mbed_official 630:825f75ca301e 406 * @brief Initialize the I2C MSP.
mbed_official 340:28d1f895c6fe 407 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 408 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 409 * @retval None
mbed_official 340:28d1f895c6fe 410 */
mbed_official 340:28d1f895c6fe 411 __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 412 {
mbed_official 630:825f75ca301e 413 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 414 the HAL_I2C_MspInit could be implemented in the user file
mbed_official 340:28d1f895c6fe 415 */
mbed_official 340:28d1f895c6fe 416 }
mbed_official 340:28d1f895c6fe 417
mbed_official 340:28d1f895c6fe 418 /**
mbed_official 630:825f75ca301e 419 * @brief DeInitialize the I2C MSP.
mbed_official 340:28d1f895c6fe 420 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 421 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 422 * @retval None
mbed_official 340:28d1f895c6fe 423 */
mbed_official 340:28d1f895c6fe 424 __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 425 {
mbed_official 630:825f75ca301e 426 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 427 the HAL_I2C_MspDeInit could be implemented in the user file
mbed_official 340:28d1f895c6fe 428 */
mbed_official 340:28d1f895c6fe 429 }
mbed_official 340:28d1f895c6fe 430
mbed_official 340:28d1f895c6fe 431 /**
mbed_official 340:28d1f895c6fe 432 * @}
mbed_official 340:28d1f895c6fe 433 */
mbed_official 340:28d1f895c6fe 434
mbed_official 340:28d1f895c6fe 435 /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
mbed_official 340:28d1f895c6fe 436 * @brief Data transfers functions
mbed_official 340:28d1f895c6fe 437 *
mbed_official 340:28d1f895c6fe 438 @verbatim
mbed_official 340:28d1f895c6fe 439 ===============================================================================
mbed_official 340:28d1f895c6fe 440 ##### IO operation functions #####
mbed_official 340:28d1f895c6fe 441 ===============================================================================
mbed_official 340:28d1f895c6fe 442 [..]
mbed_official 340:28d1f895c6fe 443 This subsection provides a set of functions allowing to manage the I2C data
mbed_official 340:28d1f895c6fe 444 transfers.
mbed_official 340:28d1f895c6fe 445
mbed_official 630:825f75ca301e 446 (#) There are two modes of transfer:
mbed_official 340:28d1f895c6fe 447 (++) Blocking mode : The communication is performed in the polling mode.
mbed_official 340:28d1f895c6fe 448 The status of all data processing is returned by the same function
mbed_official 340:28d1f895c6fe 449 after finishing transfer.
mbed_official 340:28d1f895c6fe 450 (++) No-Blocking mode : The communication is performed using Interrupts
mbed_official 340:28d1f895c6fe 451 or DMA. These functions return the status of the transfer startup.
mbed_official 340:28d1f895c6fe 452 The end of the data processing will be indicated through the
mbed_official 340:28d1f895c6fe 453 dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
mbed_official 340:28d1f895c6fe 454 using DMA mode.
mbed_official 340:28d1f895c6fe 455
mbed_official 340:28d1f895c6fe 456 (#) Blocking mode functions are :
mbed_official 340:28d1f895c6fe 457 (++) HAL_I2C_Master_Transmit()
mbed_official 340:28d1f895c6fe 458 (++) HAL_I2C_Master_Receive()
mbed_official 340:28d1f895c6fe 459 (++) HAL_I2C_Slave_Transmit()
mbed_official 340:28d1f895c6fe 460 (++) HAL_I2C_Slave_Receive()
mbed_official 340:28d1f895c6fe 461 (++) HAL_I2C_Mem_Write()
mbed_official 340:28d1f895c6fe 462 (++) HAL_I2C_Mem_Read()
mbed_official 340:28d1f895c6fe 463 (++) HAL_I2C_IsDeviceReady()
mbed_official 340:28d1f895c6fe 464
mbed_official 340:28d1f895c6fe 465 (#) No-Blocking mode functions with Interrupt are :
mbed_official 340:28d1f895c6fe 466 (++) HAL_I2C_Master_Transmit_IT()
mbed_official 340:28d1f895c6fe 467 (++) HAL_I2C_Master_Receive_IT()
mbed_official 340:28d1f895c6fe 468 (++) HAL_I2C_Slave_Transmit_IT()
mbed_official 340:28d1f895c6fe 469 (++) HAL_I2C_Slave_Receive_IT()
mbed_official 340:28d1f895c6fe 470 (++) HAL_I2C_Mem_Write_IT()
mbed_official 340:28d1f895c6fe 471 (++) HAL_I2C_Mem_Read_IT()
mbed_official 340:28d1f895c6fe 472
mbed_official 340:28d1f895c6fe 473 (#) No-Blocking mode functions with DMA are :
mbed_official 340:28d1f895c6fe 474 (++) HAL_I2C_Master_Transmit_DMA()
mbed_official 340:28d1f895c6fe 475 (++) HAL_I2C_Master_Receive_DMA()
mbed_official 340:28d1f895c6fe 476 (++) HAL_I2C_Slave_Transmit_DMA()
mbed_official 340:28d1f895c6fe 477 (++) HAL_I2C_Slave_Receive_DMA()
mbed_official 340:28d1f895c6fe 478 (++) HAL_I2C_Mem_Write_DMA()
mbed_official 340:28d1f895c6fe 479 (++) HAL_I2C_Mem_Read_DMA()
mbed_official 340:28d1f895c6fe 480
mbed_official 630:825f75ca301e 481 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
mbed_official 340:28d1f895c6fe 482 (++) HAL_I2C_MemTxCpltCallback()
mbed_official 340:28d1f895c6fe 483 (++) HAL_I2C_MemRxCpltCallback()
mbed_official 340:28d1f895c6fe 484 (++) HAL_I2C_MasterTxCpltCallback()
mbed_official 340:28d1f895c6fe 485 (++) HAL_I2C_MasterRxCpltCallback()
mbed_official 340:28d1f895c6fe 486 (++) HAL_I2C_SlaveTxCpltCallback()
mbed_official 340:28d1f895c6fe 487 (++) HAL_I2C_SlaveRxCpltCallback()
mbed_official 340:28d1f895c6fe 488 (++) HAL_I2C_ErrorCallback()
mbed_official 340:28d1f895c6fe 489
mbed_official 340:28d1f895c6fe 490 @endverbatim
mbed_official 340:28d1f895c6fe 491 * @{
mbed_official 340:28d1f895c6fe 492 */
mbed_official 340:28d1f895c6fe 493
mbed_official 340:28d1f895c6fe 494 /**
mbed_official 340:28d1f895c6fe 495 * @brief Transmits in master mode an amount of data in blocking mode.
mbed_official 340:28d1f895c6fe 496 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 497 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 498 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 499 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 500 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 501 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 502 * @retval HAL status
mbed_official 340:28d1f895c6fe 503 */
mbed_official 340:28d1f895c6fe 504 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 505 {
mbed_official 340:28d1f895c6fe 506 uint32_t sizetmp = 0;
mbed_official 340:28d1f895c6fe 507
mbed_official 340:28d1f895c6fe 508 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 509 {
mbed_official 441:d2c15dda23c1 510 if((pData == NULL ) || (Size == 0))
mbed_official 340:28d1f895c6fe 511 {
mbed_official 340:28d1f895c6fe 512 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 513 }
mbed_official 340:28d1f895c6fe 514
mbed_official 340:28d1f895c6fe 515 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 516 {
mbed_official 340:28d1f895c6fe 517 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 518 }
mbed_official 340:28d1f895c6fe 519
mbed_official 340:28d1f895c6fe 520 /* Process Locked */
mbed_official 340:28d1f895c6fe 521 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 522
mbed_official 340:28d1f895c6fe 523 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
mbed_official 340:28d1f895c6fe 524 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 525
mbed_official 340:28d1f895c6fe 526 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 527 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
mbed_official 340:28d1f895c6fe 528 /* Size > 255, need to set RELOAD bit */
mbed_official 340:28d1f895c6fe 529 if(Size > 255)
mbed_official 340:28d1f895c6fe 530 {
mbed_official 340:28d1f895c6fe 531 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
mbed_official 340:28d1f895c6fe 532 sizetmp = 255;
mbed_official 340:28d1f895c6fe 533 }
mbed_official 340:28d1f895c6fe 534 else
mbed_official 340:28d1f895c6fe 535 {
mbed_official 340:28d1f895c6fe 536 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
mbed_official 340:28d1f895c6fe 537 sizetmp = Size;
mbed_official 340:28d1f895c6fe 538 }
mbed_official 340:28d1f895c6fe 539
mbed_official 340:28d1f895c6fe 540 do
mbed_official 340:28d1f895c6fe 541 {
mbed_official 340:28d1f895c6fe 542 /* Wait until TXIS flag is set */
mbed_official 340:28d1f895c6fe 543 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 544 {
mbed_official 340:28d1f895c6fe 545 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 546 {
mbed_official 340:28d1f895c6fe 547 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 548 }
mbed_official 340:28d1f895c6fe 549 else
mbed_official 340:28d1f895c6fe 550 {
mbed_official 340:28d1f895c6fe 551 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 552 }
mbed_official 340:28d1f895c6fe 553 }
mbed_official 340:28d1f895c6fe 554 /* Write data to TXDR */
mbed_official 340:28d1f895c6fe 555 hi2c->Instance->TXDR = (*pData++);
mbed_official 340:28d1f895c6fe 556 sizetmp--;
mbed_official 340:28d1f895c6fe 557 Size--;
mbed_official 340:28d1f895c6fe 558
mbed_official 340:28d1f895c6fe 559 if((sizetmp == 0)&&(Size!=0))
mbed_official 340:28d1f895c6fe 560 {
mbed_official 340:28d1f895c6fe 561 /* Wait until TXE flag is set */
mbed_official 340:28d1f895c6fe 562 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 563 {
mbed_official 340:28d1f895c6fe 564 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 565 }
mbed_official 340:28d1f895c6fe 566
mbed_official 340:28d1f895c6fe 567 if(Size > 255)
mbed_official 340:28d1f895c6fe 568 {
mbed_official 340:28d1f895c6fe 569 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 570 sizetmp = 255;
mbed_official 340:28d1f895c6fe 571 }
mbed_official 340:28d1f895c6fe 572 else
mbed_official 340:28d1f895c6fe 573 {
mbed_official 340:28d1f895c6fe 574 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 575 sizetmp = Size;
mbed_official 340:28d1f895c6fe 576 }
mbed_official 340:28d1f895c6fe 577 }
mbed_official 340:28d1f895c6fe 578
mbed_official 340:28d1f895c6fe 579 }while(Size > 0);
mbed_official 340:28d1f895c6fe 580
mbed_official 340:28d1f895c6fe 581 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 582 /* Wait until STOPF flag is set */
mbed_official 340:28d1f895c6fe 583 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 584 {
mbed_official 340:28d1f895c6fe 585 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 586 {
mbed_official 340:28d1f895c6fe 587 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 588 }
mbed_official 340:28d1f895c6fe 589 else
mbed_official 340:28d1f895c6fe 590 {
mbed_official 340:28d1f895c6fe 591 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 592 }
mbed_official 340:28d1f895c6fe 593 }
mbed_official 340:28d1f895c6fe 594
mbed_official 340:28d1f895c6fe 595 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 596 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 597
mbed_official 340:28d1f895c6fe 598 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 599 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 600
mbed_official 340:28d1f895c6fe 601 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 602
mbed_official 340:28d1f895c6fe 603 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 604 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 605
mbed_official 340:28d1f895c6fe 606 return HAL_OK;
mbed_official 340:28d1f895c6fe 607 }
mbed_official 340:28d1f895c6fe 608 else
mbed_official 340:28d1f895c6fe 609 {
mbed_official 340:28d1f895c6fe 610 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 611 }
mbed_official 340:28d1f895c6fe 612 }
mbed_official 340:28d1f895c6fe 613
mbed_official 340:28d1f895c6fe 614 /**
mbed_official 340:28d1f895c6fe 615 * @brief Receives in master mode an amount of data in blocking mode.
mbed_official 340:28d1f895c6fe 616 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 617 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 618 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 619 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 620 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 621 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 622 * @retval HAL status
mbed_official 340:28d1f895c6fe 623 */
mbed_official 340:28d1f895c6fe 624 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 625 {
mbed_official 340:28d1f895c6fe 626 uint32_t sizetmp = 0;
mbed_official 340:28d1f895c6fe 627
mbed_official 340:28d1f895c6fe 628 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 629 {
mbed_official 441:d2c15dda23c1 630 if((pData == NULL ) || (Size == 0))
mbed_official 340:28d1f895c6fe 631 {
mbed_official 340:28d1f895c6fe 632 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 633 }
mbed_official 340:28d1f895c6fe 634
mbed_official 340:28d1f895c6fe 635 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 636 {
mbed_official 340:28d1f895c6fe 637 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 638 }
mbed_official 340:28d1f895c6fe 639
mbed_official 340:28d1f895c6fe 640 /* Process Locked */
mbed_official 340:28d1f895c6fe 641 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 642
mbed_official 340:28d1f895c6fe 643 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
mbed_official 340:28d1f895c6fe 644 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 645
mbed_official 340:28d1f895c6fe 646 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 647 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
mbed_official 340:28d1f895c6fe 648 /* Size > 255, need to set RELOAD bit */
mbed_official 340:28d1f895c6fe 649 if(Size > 255)
mbed_official 340:28d1f895c6fe 650 {
mbed_official 340:28d1f895c6fe 651 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 652 sizetmp = 255;
mbed_official 340:28d1f895c6fe 653 }
mbed_official 340:28d1f895c6fe 654 else
mbed_official 340:28d1f895c6fe 655 {
mbed_official 340:28d1f895c6fe 656 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 657 sizetmp = Size;
mbed_official 340:28d1f895c6fe 658 }
mbed_official 340:28d1f895c6fe 659
mbed_official 340:28d1f895c6fe 660 do
mbed_official 340:28d1f895c6fe 661 {
mbed_official 340:28d1f895c6fe 662 /* Wait until RXNE flag is set */
mbed_official 340:28d1f895c6fe 663 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 664 {
mbed_official 340:28d1f895c6fe 665 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 666 }
mbed_official 340:28d1f895c6fe 667
mbed_official 340:28d1f895c6fe 668 /* Write data to RXDR */
mbed_official 340:28d1f895c6fe 669 (*pData++) =hi2c->Instance->RXDR;
mbed_official 340:28d1f895c6fe 670 sizetmp--;
mbed_official 340:28d1f895c6fe 671 Size--;
mbed_official 340:28d1f895c6fe 672
mbed_official 340:28d1f895c6fe 673 if((sizetmp == 0)&&(Size!=0))
mbed_official 340:28d1f895c6fe 674 {
mbed_official 340:28d1f895c6fe 675 /* Wait until TCR flag is set */
mbed_official 340:28d1f895c6fe 676 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 677 {
mbed_official 340:28d1f895c6fe 678 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 679 }
mbed_official 340:28d1f895c6fe 680
mbed_official 340:28d1f895c6fe 681 if(Size > 255)
mbed_official 340:28d1f895c6fe 682 {
mbed_official 340:28d1f895c6fe 683 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 684 sizetmp = 255;
mbed_official 340:28d1f895c6fe 685 }
mbed_official 340:28d1f895c6fe 686 else
mbed_official 340:28d1f895c6fe 687 {
mbed_official 340:28d1f895c6fe 688 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 689 sizetmp = Size;
mbed_official 340:28d1f895c6fe 690 }
mbed_official 340:28d1f895c6fe 691 }
mbed_official 340:28d1f895c6fe 692
mbed_official 340:28d1f895c6fe 693 }while(Size > 0);
mbed_official 340:28d1f895c6fe 694
mbed_official 340:28d1f895c6fe 695 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 696 /* Wait until STOPF flag is set */
mbed_official 340:28d1f895c6fe 697 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 698 {
mbed_official 340:28d1f895c6fe 699 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 700 {
mbed_official 340:28d1f895c6fe 701 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 702 }
mbed_official 340:28d1f895c6fe 703 else
mbed_official 340:28d1f895c6fe 704 {
mbed_official 340:28d1f895c6fe 705 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 706 }
mbed_official 340:28d1f895c6fe 707 }
mbed_official 340:28d1f895c6fe 708
mbed_official 340:28d1f895c6fe 709 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 710 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 711
mbed_official 340:28d1f895c6fe 712 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 713 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 714
mbed_official 340:28d1f895c6fe 715 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 716
mbed_official 340:28d1f895c6fe 717 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 718 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 719
mbed_official 340:28d1f895c6fe 720 return HAL_OK;
mbed_official 340:28d1f895c6fe 721 }
mbed_official 340:28d1f895c6fe 722 else
mbed_official 340:28d1f895c6fe 723 {
mbed_official 340:28d1f895c6fe 724 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 725 }
mbed_official 340:28d1f895c6fe 726 }
mbed_official 340:28d1f895c6fe 727
mbed_official 340:28d1f895c6fe 728 /**
mbed_official 340:28d1f895c6fe 729 * @brief Transmits in slave mode an amount of data in blocking mode.
mbed_official 340:28d1f895c6fe 730 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 731 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 732 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 733 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 734 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 735 * @retval HAL status
mbed_official 340:28d1f895c6fe 736 */
mbed_official 340:28d1f895c6fe 737 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 738 {
mbed_official 340:28d1f895c6fe 739 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 740 {
mbed_official 441:d2c15dda23c1 741 if((pData == NULL ) || (Size == 0))
mbed_official 340:28d1f895c6fe 742 {
mbed_official 340:28d1f895c6fe 743 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 744 }
mbed_official 340:28d1f895c6fe 745
mbed_official 340:28d1f895c6fe 746 /* Process Locked */
mbed_official 340:28d1f895c6fe 747 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 748
mbed_official 340:28d1f895c6fe 749 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
mbed_official 340:28d1f895c6fe 750 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 751
mbed_official 340:28d1f895c6fe 752 /* Enable Address Acknowledge */
mbed_official 340:28d1f895c6fe 753 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 754
mbed_official 340:28d1f895c6fe 755 /* Wait until ADDR flag is set */
mbed_official 340:28d1f895c6fe 756 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 757 {
mbed_official 340:28d1f895c6fe 758 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 759 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 760 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 761 }
mbed_official 340:28d1f895c6fe 762
mbed_official 340:28d1f895c6fe 763 /* Clear ADDR flag */
mbed_official 340:28d1f895c6fe 764 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
mbed_official 340:28d1f895c6fe 765
mbed_official 340:28d1f895c6fe 766 /* If 10bit addressing mode is selected */
mbed_official 340:28d1f895c6fe 767 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
mbed_official 340:28d1f895c6fe 768 {
mbed_official 340:28d1f895c6fe 769 /* Wait until ADDR flag is set */
mbed_official 340:28d1f895c6fe 770 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 771 {
mbed_official 340:28d1f895c6fe 772 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 773 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 774 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 775 }
mbed_official 340:28d1f895c6fe 776
mbed_official 340:28d1f895c6fe 777 /* Clear ADDR flag */
mbed_official 340:28d1f895c6fe 778 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
mbed_official 340:28d1f895c6fe 779 }
mbed_official 340:28d1f895c6fe 780
mbed_official 340:28d1f895c6fe 781 /* Wait until DIR flag is set Transmitter mode */
mbed_official 340:28d1f895c6fe 782 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 783 {
mbed_official 340:28d1f895c6fe 784 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 785 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 786 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 787 }
mbed_official 340:28d1f895c6fe 788
mbed_official 340:28d1f895c6fe 789 do
mbed_official 340:28d1f895c6fe 790 {
mbed_official 340:28d1f895c6fe 791 /* Wait until TXIS flag is set */
mbed_official 340:28d1f895c6fe 792 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 793 {
mbed_official 340:28d1f895c6fe 794 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 795 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 796
mbed_official 340:28d1f895c6fe 797 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 798 {
mbed_official 340:28d1f895c6fe 799 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 800 }
mbed_official 340:28d1f895c6fe 801 else
mbed_official 340:28d1f895c6fe 802 {
mbed_official 340:28d1f895c6fe 803 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 804 }
mbed_official 340:28d1f895c6fe 805 }
mbed_official 340:28d1f895c6fe 806
mbed_official 340:28d1f895c6fe 807 /* Read data from TXDR */
mbed_official 340:28d1f895c6fe 808 hi2c->Instance->TXDR = (*pData++);
mbed_official 340:28d1f895c6fe 809 Size--;
mbed_official 340:28d1f895c6fe 810 }while(Size > 0);
mbed_official 340:28d1f895c6fe 811
mbed_official 340:28d1f895c6fe 812 /* Wait until STOP flag is set */
mbed_official 340:28d1f895c6fe 813 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 814 {
mbed_official 340:28d1f895c6fe 815 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 816 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 817
mbed_official 340:28d1f895c6fe 818 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 819 {
mbed_official 340:28d1f895c6fe 820 /* Normal use case for Transmitter mode */
mbed_official 340:28d1f895c6fe 821 /* A NACK is generated to confirm the end of transfer */
mbed_official 340:28d1f895c6fe 822 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 823 }
mbed_official 340:28d1f895c6fe 824 else
mbed_official 340:28d1f895c6fe 825 {
mbed_official 340:28d1f895c6fe 826 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 827 }
mbed_official 340:28d1f895c6fe 828 }
mbed_official 340:28d1f895c6fe 829
mbed_official 340:28d1f895c6fe 830 /* Clear STOP flag */
mbed_official 340:28d1f895c6fe 831 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 832
mbed_official 340:28d1f895c6fe 833 /* Wait until BUSY flag is reset */
mbed_official 340:28d1f895c6fe 834 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 835 {
mbed_official 340:28d1f895c6fe 836 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 837 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 838 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 839 }
mbed_official 340:28d1f895c6fe 840
mbed_official 340:28d1f895c6fe 841 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 842 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 843
mbed_official 340:28d1f895c6fe 844 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 845
mbed_official 340:28d1f895c6fe 846 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 847 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 848
mbed_official 340:28d1f895c6fe 849 return HAL_OK;
mbed_official 340:28d1f895c6fe 850 }
mbed_official 340:28d1f895c6fe 851 else
mbed_official 340:28d1f895c6fe 852 {
mbed_official 340:28d1f895c6fe 853 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 854 }
mbed_official 340:28d1f895c6fe 855 }
mbed_official 340:28d1f895c6fe 856
mbed_official 340:28d1f895c6fe 857 /**
mbed_official 340:28d1f895c6fe 858 * @brief Receive in slave mode an amount of data in blocking mode
mbed_official 340:28d1f895c6fe 859 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 860 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 861 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 862 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 863 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 864 * @retval HAL status
mbed_official 340:28d1f895c6fe 865 */
mbed_official 340:28d1f895c6fe 866 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 867 {
mbed_official 340:28d1f895c6fe 868 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 869 {
mbed_official 441:d2c15dda23c1 870 if((pData == NULL ) || (Size == 0))
mbed_official 340:28d1f895c6fe 871 {
mbed_official 340:28d1f895c6fe 872 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 873 }
mbed_official 340:28d1f895c6fe 874
mbed_official 340:28d1f895c6fe 875 /* Process Locked */
mbed_official 340:28d1f895c6fe 876 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 877
mbed_official 340:28d1f895c6fe 878 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
mbed_official 340:28d1f895c6fe 879 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 880
mbed_official 340:28d1f895c6fe 881 /* Enable Address Acknowledge */
mbed_official 340:28d1f895c6fe 882 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 883
mbed_official 340:28d1f895c6fe 884 /* Wait until ADDR flag is set */
mbed_official 340:28d1f895c6fe 885 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 886 {
mbed_official 340:28d1f895c6fe 887 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 888 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 889 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 890 }
mbed_official 340:28d1f895c6fe 891
mbed_official 340:28d1f895c6fe 892 /* Clear ADDR flag */
mbed_official 340:28d1f895c6fe 893 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
mbed_official 340:28d1f895c6fe 894
mbed_official 340:28d1f895c6fe 895 /* Wait until DIR flag is reset Receiver mode */
mbed_official 340:28d1f895c6fe 896 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 897 {
mbed_official 340:28d1f895c6fe 898 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 899 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 900 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 901 }
mbed_official 340:28d1f895c6fe 902
mbed_official 340:28d1f895c6fe 903 while(Size > 0)
mbed_official 340:28d1f895c6fe 904 {
mbed_official 340:28d1f895c6fe 905 /* Wait until RXNE flag is set */
mbed_official 340:28d1f895c6fe 906 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 907 {
mbed_official 340:28d1f895c6fe 908 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 909 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 910 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
mbed_official 340:28d1f895c6fe 911 {
mbed_official 340:28d1f895c6fe 912 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 913 }
mbed_official 340:28d1f895c6fe 914 else
mbed_official 340:28d1f895c6fe 915 {
mbed_official 340:28d1f895c6fe 916 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 917 }
mbed_official 340:28d1f895c6fe 918 }
mbed_official 340:28d1f895c6fe 919
mbed_official 340:28d1f895c6fe 920 /* Read data from RXDR */
mbed_official 340:28d1f895c6fe 921 (*pData++) = hi2c->Instance->RXDR;
mbed_official 340:28d1f895c6fe 922 Size--;
mbed_official 340:28d1f895c6fe 923 }
mbed_official 340:28d1f895c6fe 924
mbed_official 340:28d1f895c6fe 925 /* Wait until STOP flag is set */
mbed_official 340:28d1f895c6fe 926 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 927 {
mbed_official 340:28d1f895c6fe 928 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 929 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 930
mbed_official 340:28d1f895c6fe 931 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 932 {
mbed_official 340:28d1f895c6fe 933 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 934 }
mbed_official 340:28d1f895c6fe 935 else
mbed_official 340:28d1f895c6fe 936 {
mbed_official 340:28d1f895c6fe 937 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 938 }
mbed_official 340:28d1f895c6fe 939 }
mbed_official 340:28d1f895c6fe 940
mbed_official 340:28d1f895c6fe 941 /* Clear STOP flag */
mbed_official 340:28d1f895c6fe 942 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 943
mbed_official 340:28d1f895c6fe 944 /* Wait until BUSY flag is reset */
mbed_official 340:28d1f895c6fe 945 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 946 {
mbed_official 340:28d1f895c6fe 947 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 948 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 949 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 950 }
mbed_official 340:28d1f895c6fe 951
mbed_official 340:28d1f895c6fe 952
mbed_official 340:28d1f895c6fe 953 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 954 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 955
mbed_official 340:28d1f895c6fe 956 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 957
mbed_official 340:28d1f895c6fe 958 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 959 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 960
mbed_official 340:28d1f895c6fe 961 return HAL_OK;
mbed_official 340:28d1f895c6fe 962 }
mbed_official 340:28d1f895c6fe 963 else
mbed_official 340:28d1f895c6fe 964 {
mbed_official 340:28d1f895c6fe 965 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 966 }
mbed_official 340:28d1f895c6fe 967 }
mbed_official 340:28d1f895c6fe 968
mbed_official 340:28d1f895c6fe 969 /**
mbed_official 630:825f75ca301e 970 * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 971 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 972 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 973 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 974 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 975 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 976 * @retval HAL status
mbed_official 340:28d1f895c6fe 977 */
mbed_official 340:28d1f895c6fe 978 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 979 {
mbed_official 340:28d1f895c6fe 980 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 981 {
mbed_official 441:d2c15dda23c1 982 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 983 {
mbed_official 340:28d1f895c6fe 984 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 985 }
mbed_official 340:28d1f895c6fe 986
mbed_official 340:28d1f895c6fe 987 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 988 {
mbed_official 340:28d1f895c6fe 989 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 990 }
mbed_official 340:28d1f895c6fe 991
mbed_official 340:28d1f895c6fe 992 /* Process Locked */
mbed_official 340:28d1f895c6fe 993 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 994
mbed_official 340:28d1f895c6fe 995 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
mbed_official 340:28d1f895c6fe 996 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 997
mbed_official 340:28d1f895c6fe 998 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 999 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 1000 if(Size > 255)
mbed_official 340:28d1f895c6fe 1001 {
mbed_official 340:28d1f895c6fe 1002 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 1003 }
mbed_official 340:28d1f895c6fe 1004 else
mbed_official 340:28d1f895c6fe 1005 {
mbed_official 340:28d1f895c6fe 1006 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 1007 }
mbed_official 340:28d1f895c6fe 1008
mbed_official 340:28d1f895c6fe 1009 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 1010 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
mbed_official 340:28d1f895c6fe 1011 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 1012 {
mbed_official 340:28d1f895c6fe 1013 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
mbed_official 340:28d1f895c6fe 1014 }
mbed_official 340:28d1f895c6fe 1015 else
mbed_official 340:28d1f895c6fe 1016 {
mbed_official 340:28d1f895c6fe 1017 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
mbed_official 340:28d1f895c6fe 1018 }
mbed_official 340:28d1f895c6fe 1019
mbed_official 340:28d1f895c6fe 1020 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1021 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1022
mbed_official 340:28d1f895c6fe 1023 /* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official 340:28d1f895c6fe 1024 to avoid the risk of I2C interrupt handle execution before current
mbed_official 340:28d1f895c6fe 1025 process unlock */
mbed_official 340:28d1f895c6fe 1026
mbed_official 340:28d1f895c6fe 1027
mbed_official 340:28d1f895c6fe 1028 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
mbed_official 340:28d1f895c6fe 1029 /* possible to enable all of these */
mbed_official 340:28d1f895c6fe 1030 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
mbed_official 340:28d1f895c6fe 1031 __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI );
mbed_official 340:28d1f895c6fe 1032
mbed_official 340:28d1f895c6fe 1033 return HAL_OK;
mbed_official 340:28d1f895c6fe 1034 }
mbed_official 340:28d1f895c6fe 1035 else
mbed_official 340:28d1f895c6fe 1036 {
mbed_official 340:28d1f895c6fe 1037 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1038 }
mbed_official 340:28d1f895c6fe 1039 }
mbed_official 340:28d1f895c6fe 1040
mbed_official 340:28d1f895c6fe 1041 /**
mbed_official 630:825f75ca301e 1042 * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 1043 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1044 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 1045 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 1046 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 1047 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 1048 * @retval HAL status
mbed_official 340:28d1f895c6fe 1049 */
mbed_official 340:28d1f895c6fe 1050 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 1051 {
mbed_official 340:28d1f895c6fe 1052 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 1053 {
mbed_official 441:d2c15dda23c1 1054 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 1055 {
mbed_official 340:28d1f895c6fe 1056 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1057 }
mbed_official 340:28d1f895c6fe 1058
mbed_official 340:28d1f895c6fe 1059 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 1060 {
mbed_official 340:28d1f895c6fe 1061 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1062 }
mbed_official 340:28d1f895c6fe 1063
mbed_official 340:28d1f895c6fe 1064 /* Process Locked */
mbed_official 340:28d1f895c6fe 1065 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 1066
mbed_official 340:28d1f895c6fe 1067 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
mbed_official 340:28d1f895c6fe 1068 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 1069
mbed_official 340:28d1f895c6fe 1070 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 1071 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 1072 if(Size > 255)
mbed_official 340:28d1f895c6fe 1073 {
mbed_official 340:28d1f895c6fe 1074 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 1075 }
mbed_official 340:28d1f895c6fe 1076 else
mbed_official 340:28d1f895c6fe 1077 {
mbed_official 340:28d1f895c6fe 1078 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 1079 }
mbed_official 340:28d1f895c6fe 1080
mbed_official 340:28d1f895c6fe 1081 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 1082 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
mbed_official 340:28d1f895c6fe 1083 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 1084 {
mbed_official 340:28d1f895c6fe 1085 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 1086 }
mbed_official 340:28d1f895c6fe 1087 else
mbed_official 340:28d1f895c6fe 1088 {
mbed_official 340:28d1f895c6fe 1089 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 1090 }
mbed_official 340:28d1f895c6fe 1091
mbed_official 340:28d1f895c6fe 1092 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1093 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1094
mbed_official 340:28d1f895c6fe 1095 /* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official 340:28d1f895c6fe 1096 to avoid the risk of I2C interrupt handle execution before current
mbed_official 340:28d1f895c6fe 1097 process unlock */
mbed_official 340:28d1f895c6fe 1098
mbed_official 340:28d1f895c6fe 1099 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
mbed_official 340:28d1f895c6fe 1100 /* possible to enable all of these */
mbed_official 340:28d1f895c6fe 1101 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
mbed_official 340:28d1f895c6fe 1102 __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI );
mbed_official 340:28d1f895c6fe 1103
mbed_official 340:28d1f895c6fe 1104 return HAL_OK;
mbed_official 340:28d1f895c6fe 1105 }
mbed_official 340:28d1f895c6fe 1106 else
mbed_official 340:28d1f895c6fe 1107 {
mbed_official 340:28d1f895c6fe 1108 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1109 }
mbed_official 340:28d1f895c6fe 1110 }
mbed_official 340:28d1f895c6fe 1111
mbed_official 340:28d1f895c6fe 1112 /**
mbed_official 630:825f75ca301e 1113 * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 1114 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1115 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 1116 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 1117 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 1118 * @retval HAL status
mbed_official 340:28d1f895c6fe 1119 */
mbed_official 340:28d1f895c6fe 1120 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 1121 {
mbed_official 340:28d1f895c6fe 1122 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 1123 {
mbed_official 441:d2c15dda23c1 1124 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 1125 {
mbed_official 340:28d1f895c6fe 1126 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1127 }
mbed_official 340:28d1f895c6fe 1128
mbed_official 340:28d1f895c6fe 1129 /* Process Locked */
mbed_official 340:28d1f895c6fe 1130 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 1131
mbed_official 340:28d1f895c6fe 1132 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX;
mbed_official 340:28d1f895c6fe 1133 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 1134
mbed_official 340:28d1f895c6fe 1135 /* Enable Address Acknowledge */
mbed_official 340:28d1f895c6fe 1136 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1137
mbed_official 340:28d1f895c6fe 1138 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 1139 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 1140 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 1141
mbed_official 340:28d1f895c6fe 1142 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1143 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1144
mbed_official 340:28d1f895c6fe 1145 /* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official 340:28d1f895c6fe 1146 to avoid the risk of I2C interrupt handle execution before current
mbed_official 340:28d1f895c6fe 1147 process unlock */
mbed_official 340:28d1f895c6fe 1148
mbed_official 340:28d1f895c6fe 1149 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
mbed_official 340:28d1f895c6fe 1150 /* possible to enable all of these */
mbed_official 340:28d1f895c6fe 1151 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
mbed_official 340:28d1f895c6fe 1152 __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_TXI );
mbed_official 340:28d1f895c6fe 1153
mbed_official 340:28d1f895c6fe 1154 return HAL_OK;
mbed_official 340:28d1f895c6fe 1155 }
mbed_official 340:28d1f895c6fe 1156 else
mbed_official 340:28d1f895c6fe 1157 {
mbed_official 340:28d1f895c6fe 1158 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1159 }
mbed_official 340:28d1f895c6fe 1160 }
mbed_official 340:28d1f895c6fe 1161
mbed_official 340:28d1f895c6fe 1162 /**
mbed_official 630:825f75ca301e 1163 * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 1164 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1165 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 1166 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 1167 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 1168 * @retval HAL status
mbed_official 340:28d1f895c6fe 1169 */
mbed_official 340:28d1f895c6fe 1170 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 1171 {
mbed_official 340:28d1f895c6fe 1172 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 1173 {
mbed_official 441:d2c15dda23c1 1174 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 1175 {
mbed_official 340:28d1f895c6fe 1176 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1177 }
mbed_official 340:28d1f895c6fe 1178
mbed_official 340:28d1f895c6fe 1179 /* Process Locked */
mbed_official 340:28d1f895c6fe 1180 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 1181
mbed_official 340:28d1f895c6fe 1182 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
mbed_official 340:28d1f895c6fe 1183 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 1184
mbed_official 340:28d1f895c6fe 1185 /* Enable Address Acknowledge */
mbed_official 340:28d1f895c6fe 1186 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1187
mbed_official 340:28d1f895c6fe 1188 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 1189 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 1190 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 1191
mbed_official 340:28d1f895c6fe 1192 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1193 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1194
mbed_official 340:28d1f895c6fe 1195 /* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official 340:28d1f895c6fe 1196 to avoid the risk of I2C interrupt handle execution before current
mbed_official 340:28d1f895c6fe 1197 process unlock */
mbed_official 340:28d1f895c6fe 1198
mbed_official 340:28d1f895c6fe 1199 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
mbed_official 340:28d1f895c6fe 1200 /* possible to enable all of these */
mbed_official 340:28d1f895c6fe 1201 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
mbed_official 340:28d1f895c6fe 1202 __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI);
mbed_official 340:28d1f895c6fe 1203
mbed_official 340:28d1f895c6fe 1204 return HAL_OK;
mbed_official 340:28d1f895c6fe 1205 }
mbed_official 340:28d1f895c6fe 1206 else
mbed_official 340:28d1f895c6fe 1207 {
mbed_official 340:28d1f895c6fe 1208 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1209 }
mbed_official 340:28d1f895c6fe 1210 }
mbed_official 340:28d1f895c6fe 1211
mbed_official 340:28d1f895c6fe 1212 /**
mbed_official 630:825f75ca301e 1213 * @brief Transmit in master mode an amount of data in non-blocking mode with DMA
mbed_official 340:28d1f895c6fe 1214 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1215 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 1216 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 1217 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 1218 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 1219 * @retval HAL status
mbed_official 340:28d1f895c6fe 1220 */
mbed_official 340:28d1f895c6fe 1221 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 1222 {
mbed_official 340:28d1f895c6fe 1223 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 1224 {
mbed_official 441:d2c15dda23c1 1225 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 1226 {
mbed_official 340:28d1f895c6fe 1227 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1228 }
mbed_official 340:28d1f895c6fe 1229
mbed_official 340:28d1f895c6fe 1230 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 1231 {
mbed_official 340:28d1f895c6fe 1232 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1233 }
mbed_official 340:28d1f895c6fe 1234
mbed_official 340:28d1f895c6fe 1235 /* Process Locked */
mbed_official 340:28d1f895c6fe 1236 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 1237
mbed_official 340:28d1f895c6fe 1238 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_TX;
mbed_official 340:28d1f895c6fe 1239 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 1240
mbed_official 340:28d1f895c6fe 1241 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 1242 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 1243 if(Size > 255)
mbed_official 340:28d1f895c6fe 1244 {
mbed_official 340:28d1f895c6fe 1245 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 1246 }
mbed_official 340:28d1f895c6fe 1247 else
mbed_official 340:28d1f895c6fe 1248 {
mbed_official 340:28d1f895c6fe 1249 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 1250 }
mbed_official 340:28d1f895c6fe 1251
mbed_official 340:28d1f895c6fe 1252 /* Set the I2C DMA transfer complete callback */
mbed_official 340:28d1f895c6fe 1253 hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
mbed_official 340:28d1f895c6fe 1254
mbed_official 340:28d1f895c6fe 1255 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 1256 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
mbed_official 340:28d1f895c6fe 1257
mbed_official 340:28d1f895c6fe 1258 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 1259 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
mbed_official 340:28d1f895c6fe 1260
mbed_official 340:28d1f895c6fe 1261 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 1262 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
mbed_official 340:28d1f895c6fe 1263 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 1264 {
mbed_official 340:28d1f895c6fe 1265 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
mbed_official 340:28d1f895c6fe 1266 }
mbed_official 340:28d1f895c6fe 1267 else
mbed_official 340:28d1f895c6fe 1268 {
mbed_official 340:28d1f895c6fe 1269 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
mbed_official 340:28d1f895c6fe 1270 }
mbed_official 340:28d1f895c6fe 1271
mbed_official 340:28d1f895c6fe 1272 /* Wait until TXIS flag is set */
mbed_official 340:28d1f895c6fe 1273 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
mbed_official 340:28d1f895c6fe 1274 {
mbed_official 340:28d1f895c6fe 1275 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 1276 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1277
mbed_official 340:28d1f895c6fe 1278 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 1279 {
mbed_official 340:28d1f895c6fe 1280 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1281 }
mbed_official 340:28d1f895c6fe 1282 else
mbed_official 340:28d1f895c6fe 1283 {
mbed_official 340:28d1f895c6fe 1284 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1285 }
mbed_official 340:28d1f895c6fe 1286 }
mbed_official 340:28d1f895c6fe 1287
mbed_official 340:28d1f895c6fe 1288
mbed_official 340:28d1f895c6fe 1289 /* Enable DMA Request */
mbed_official 340:28d1f895c6fe 1290 hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
mbed_official 340:28d1f895c6fe 1291
mbed_official 340:28d1f895c6fe 1292 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1293 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1294
mbed_official 340:28d1f895c6fe 1295 return HAL_OK;
mbed_official 340:28d1f895c6fe 1296 }
mbed_official 340:28d1f895c6fe 1297 else
mbed_official 340:28d1f895c6fe 1298 {
mbed_official 340:28d1f895c6fe 1299 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1300 }
mbed_official 340:28d1f895c6fe 1301 }
mbed_official 340:28d1f895c6fe 1302
mbed_official 340:28d1f895c6fe 1303 /**
mbed_official 630:825f75ca301e 1304 * @brief Receive in master mode an amount of data in non-blocking mode with DMA
mbed_official 340:28d1f895c6fe 1305 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1306 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 1307 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 1308 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 1309 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 1310 * @retval HAL status
mbed_official 340:28d1f895c6fe 1311 */
mbed_official 340:28d1f895c6fe 1312 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 1313 {
mbed_official 340:28d1f895c6fe 1314 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 1315 {
mbed_official 441:d2c15dda23c1 1316 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 1317 {
mbed_official 340:28d1f895c6fe 1318 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1319 }
mbed_official 340:28d1f895c6fe 1320
mbed_official 340:28d1f895c6fe 1321 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 1322 {
mbed_official 340:28d1f895c6fe 1323 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1324 }
mbed_official 340:28d1f895c6fe 1325
mbed_official 340:28d1f895c6fe 1326 /* Process Locked */
mbed_official 340:28d1f895c6fe 1327 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 1328
mbed_official 340:28d1f895c6fe 1329 hi2c->State = HAL_I2C_STATE_MASTER_BUSY_RX;
mbed_official 340:28d1f895c6fe 1330 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 1331
mbed_official 340:28d1f895c6fe 1332 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 1333 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 1334 if(Size > 255)
mbed_official 340:28d1f895c6fe 1335 {
mbed_official 340:28d1f895c6fe 1336 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 1337 }
mbed_official 340:28d1f895c6fe 1338 else
mbed_official 340:28d1f895c6fe 1339 {
mbed_official 340:28d1f895c6fe 1340 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 1341 }
mbed_official 340:28d1f895c6fe 1342
mbed_official 340:28d1f895c6fe 1343 /* Set the I2C DMA transfer complete callback */
mbed_official 340:28d1f895c6fe 1344 hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
mbed_official 340:28d1f895c6fe 1345
mbed_official 340:28d1f895c6fe 1346 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 1347 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
mbed_official 340:28d1f895c6fe 1348
mbed_official 340:28d1f895c6fe 1349 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 1350 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
mbed_official 340:28d1f895c6fe 1351
mbed_official 340:28d1f895c6fe 1352 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 1353 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
mbed_official 340:28d1f895c6fe 1354 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 1355 {
mbed_official 340:28d1f895c6fe 1356 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 1357 }
mbed_official 340:28d1f895c6fe 1358 else
mbed_official 340:28d1f895c6fe 1359 {
mbed_official 340:28d1f895c6fe 1360 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 1361 }
mbed_official 340:28d1f895c6fe 1362
mbed_official 340:28d1f895c6fe 1363 /* Wait until RXNE flag is set */
mbed_official 340:28d1f895c6fe 1364 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
mbed_official 340:28d1f895c6fe 1365 {
mbed_official 340:28d1f895c6fe 1366 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1367 }
mbed_official 340:28d1f895c6fe 1368
mbed_official 340:28d1f895c6fe 1369
mbed_official 340:28d1f895c6fe 1370 /* Enable DMA Request */
mbed_official 340:28d1f895c6fe 1371 hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
mbed_official 340:28d1f895c6fe 1372
mbed_official 340:28d1f895c6fe 1373 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1374 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1375
mbed_official 340:28d1f895c6fe 1376 return HAL_OK;
mbed_official 340:28d1f895c6fe 1377 }
mbed_official 340:28d1f895c6fe 1378 else
mbed_official 340:28d1f895c6fe 1379 {
mbed_official 340:28d1f895c6fe 1380 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1381 }
mbed_official 340:28d1f895c6fe 1382 }
mbed_official 340:28d1f895c6fe 1383
mbed_official 340:28d1f895c6fe 1384 /**
mbed_official 630:825f75ca301e 1385 * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
mbed_official 340:28d1f895c6fe 1386 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1387 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 1388 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 1389 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 1390 * @retval HAL status
mbed_official 340:28d1f895c6fe 1391 */
mbed_official 340:28d1f895c6fe 1392 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 1393 {
mbed_official 340:28d1f895c6fe 1394 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 1395 {
mbed_official 441:d2c15dda23c1 1396 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 1397 {
mbed_official 340:28d1f895c6fe 1398 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1399 }
mbed_official 340:28d1f895c6fe 1400 /* Process Locked */
mbed_official 340:28d1f895c6fe 1401 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 1402
mbed_official 340:28d1f895c6fe 1403 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_TX;
mbed_official 340:28d1f895c6fe 1404 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 1405
mbed_official 340:28d1f895c6fe 1406 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 1407 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 1408 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 1409
mbed_official 340:28d1f895c6fe 1410 /* Set the I2C DMA transfer complete callback */
mbed_official 340:28d1f895c6fe 1411 hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
mbed_official 340:28d1f895c6fe 1412
mbed_official 340:28d1f895c6fe 1413 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 1414 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
mbed_official 340:28d1f895c6fe 1415
mbed_official 340:28d1f895c6fe 1416 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 1417 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
mbed_official 340:28d1f895c6fe 1418
mbed_official 340:28d1f895c6fe 1419 /* Enable Address Acknowledge */
mbed_official 340:28d1f895c6fe 1420 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1421
mbed_official 340:28d1f895c6fe 1422 /* Wait until ADDR flag is set */
mbed_official 340:28d1f895c6fe 1423 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
mbed_official 340:28d1f895c6fe 1424 {
mbed_official 340:28d1f895c6fe 1425 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 1426 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1427 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1428 }
mbed_official 340:28d1f895c6fe 1429
mbed_official 340:28d1f895c6fe 1430 /* Clear ADDR flag */
mbed_official 340:28d1f895c6fe 1431 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
mbed_official 340:28d1f895c6fe 1432
mbed_official 340:28d1f895c6fe 1433 /* If 10bits addressing mode is selected */
mbed_official 340:28d1f895c6fe 1434 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
mbed_official 340:28d1f895c6fe 1435 {
mbed_official 340:28d1f895c6fe 1436 /* Wait until ADDR flag is set */
mbed_official 340:28d1f895c6fe 1437 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
mbed_official 340:28d1f895c6fe 1438 {
mbed_official 340:28d1f895c6fe 1439 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 1440 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1441 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1442 }
mbed_official 340:28d1f895c6fe 1443
mbed_official 340:28d1f895c6fe 1444 /* Clear ADDR flag */
mbed_official 340:28d1f895c6fe 1445 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
mbed_official 340:28d1f895c6fe 1446 }
mbed_official 340:28d1f895c6fe 1447
mbed_official 340:28d1f895c6fe 1448 /* Wait until DIR flag is set Transmitter mode */
mbed_official 340:28d1f895c6fe 1449 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, I2C_TIMEOUT_BUSY) != HAL_OK)
mbed_official 340:28d1f895c6fe 1450 {
mbed_official 340:28d1f895c6fe 1451 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 1452 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1453 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1454 }
mbed_official 340:28d1f895c6fe 1455
mbed_official 340:28d1f895c6fe 1456 /* Enable DMA Request */
mbed_official 340:28d1f895c6fe 1457 hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
mbed_official 340:28d1f895c6fe 1458
mbed_official 340:28d1f895c6fe 1459 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1460 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1461
mbed_official 340:28d1f895c6fe 1462 return HAL_OK;
mbed_official 340:28d1f895c6fe 1463 }
mbed_official 340:28d1f895c6fe 1464 else
mbed_official 340:28d1f895c6fe 1465 {
mbed_official 340:28d1f895c6fe 1466 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1467 }
mbed_official 340:28d1f895c6fe 1468 }
mbed_official 340:28d1f895c6fe 1469
mbed_official 340:28d1f895c6fe 1470 /**
mbed_official 630:825f75ca301e 1471 * @brief Receive in slave mode an amount of data in non-blocking mode with DMA
mbed_official 340:28d1f895c6fe 1472 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1473 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 1474 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 1475 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 1476 * @retval HAL status
mbed_official 340:28d1f895c6fe 1477 */
mbed_official 340:28d1f895c6fe 1478 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 1479 {
mbed_official 340:28d1f895c6fe 1480 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 1481 {
mbed_official 441:d2c15dda23c1 1482 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 1483 {
mbed_official 340:28d1f895c6fe 1484 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1485 }
mbed_official 340:28d1f895c6fe 1486 /* Process Locked */
mbed_official 340:28d1f895c6fe 1487 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 1488
mbed_official 340:28d1f895c6fe 1489 hi2c->State = HAL_I2C_STATE_SLAVE_BUSY_RX;
mbed_official 340:28d1f895c6fe 1490 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 1491
mbed_official 340:28d1f895c6fe 1492 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 1493 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 1494 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 1495
mbed_official 340:28d1f895c6fe 1496 /* Set the I2C DMA transfer complete callback */
mbed_official 340:28d1f895c6fe 1497 hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
mbed_official 340:28d1f895c6fe 1498
mbed_official 340:28d1f895c6fe 1499 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 1500 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
mbed_official 340:28d1f895c6fe 1501
mbed_official 340:28d1f895c6fe 1502 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 1503 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, Size);
mbed_official 340:28d1f895c6fe 1504
mbed_official 340:28d1f895c6fe 1505 /* Enable Address Acknowledge */
mbed_official 340:28d1f895c6fe 1506 hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1507
mbed_official 340:28d1f895c6fe 1508 /* Wait until ADDR flag is set */
mbed_official 340:28d1f895c6fe 1509 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR) != HAL_OK)
mbed_official 340:28d1f895c6fe 1510 {
mbed_official 340:28d1f895c6fe 1511 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 1512 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1513 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1514 }
mbed_official 340:28d1f895c6fe 1515
mbed_official 340:28d1f895c6fe 1516 /* Clear ADDR flag */
mbed_official 340:28d1f895c6fe 1517 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_ADDR);
mbed_official 340:28d1f895c6fe 1518
mbed_official 340:28d1f895c6fe 1519 /* Wait until DIR flag is set Receiver mode */
mbed_official 340:28d1f895c6fe 1520 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, I2C_TIMEOUT_DIR) != HAL_OK)
mbed_official 340:28d1f895c6fe 1521 {
mbed_official 340:28d1f895c6fe 1522 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 1523 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 1524 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1525 }
mbed_official 340:28d1f895c6fe 1526
mbed_official 340:28d1f895c6fe 1527 /* Enable DMA Request */
mbed_official 340:28d1f895c6fe 1528 hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
mbed_official 340:28d1f895c6fe 1529
mbed_official 340:28d1f895c6fe 1530 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1531 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1532
mbed_official 340:28d1f895c6fe 1533 return HAL_OK;
mbed_official 340:28d1f895c6fe 1534 }
mbed_official 340:28d1f895c6fe 1535 else
mbed_official 340:28d1f895c6fe 1536 {
mbed_official 340:28d1f895c6fe 1537 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1538 }
mbed_official 340:28d1f895c6fe 1539 }
mbed_official 340:28d1f895c6fe 1540 /**
mbed_official 340:28d1f895c6fe 1541 * @brief Write an amount of data in blocking mode to a specific memory address
mbed_official 340:28d1f895c6fe 1542 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1543 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 1544 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 1545 * @param MemAddress: Internal memory address
mbed_official 340:28d1f895c6fe 1546 * @param MemAddSize: Size of internal memory address
mbed_official 340:28d1f895c6fe 1547 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 1548 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 1549 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 1550 * @retval HAL status
mbed_official 340:28d1f895c6fe 1551 */
mbed_official 340:28d1f895c6fe 1552 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 1553 {
mbed_official 340:28d1f895c6fe 1554 uint32_t Sizetmp = 0;
mbed_official 340:28d1f895c6fe 1555
mbed_official 340:28d1f895c6fe 1556 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1557 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
mbed_official 340:28d1f895c6fe 1558
mbed_official 340:28d1f895c6fe 1559 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 1560 {
mbed_official 441:d2c15dda23c1 1561 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 1562 {
mbed_official 340:28d1f895c6fe 1563 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1564 }
mbed_official 340:28d1f895c6fe 1565
mbed_official 340:28d1f895c6fe 1566 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 1567 {
mbed_official 340:28d1f895c6fe 1568 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1569 }
mbed_official 340:28d1f895c6fe 1570
mbed_official 340:28d1f895c6fe 1571 /* Process Locked */
mbed_official 340:28d1f895c6fe 1572 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 1573
mbed_official 340:28d1f895c6fe 1574 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
mbed_official 340:28d1f895c6fe 1575 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 1576
mbed_official 340:28d1f895c6fe 1577 /* Send Slave Address and Memory Address */
mbed_official 340:28d1f895c6fe 1578 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 1579 {
mbed_official 340:28d1f895c6fe 1580 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 1581 {
mbed_official 340:28d1f895c6fe 1582 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1583 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1584 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1585 }
mbed_official 340:28d1f895c6fe 1586 else
mbed_official 340:28d1f895c6fe 1587 {
mbed_official 340:28d1f895c6fe 1588 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1589 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1590 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1591 }
mbed_official 340:28d1f895c6fe 1592 }
mbed_official 340:28d1f895c6fe 1593
mbed_official 340:28d1f895c6fe 1594 /* Set NBYTES to write and reload if size > 255 */
mbed_official 340:28d1f895c6fe 1595 /* Size > 255, need to set RELOAD bit */
mbed_official 340:28d1f895c6fe 1596 if(Size > 255)
mbed_official 340:28d1f895c6fe 1597 {
mbed_official 340:28d1f895c6fe 1598 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1599 Sizetmp = 255;
mbed_official 340:28d1f895c6fe 1600 }
mbed_official 340:28d1f895c6fe 1601 else
mbed_official 340:28d1f895c6fe 1602 {
mbed_official 340:28d1f895c6fe 1603 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1604 Sizetmp = Size;
mbed_official 340:28d1f895c6fe 1605 }
mbed_official 340:28d1f895c6fe 1606
mbed_official 340:28d1f895c6fe 1607 do
mbed_official 340:28d1f895c6fe 1608 {
mbed_official 340:28d1f895c6fe 1609 /* Wait until TXIS flag is set */
mbed_official 340:28d1f895c6fe 1610 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 1611 {
mbed_official 340:28d1f895c6fe 1612 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 1613 {
mbed_official 340:28d1f895c6fe 1614 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1615 }
mbed_official 340:28d1f895c6fe 1616 else
mbed_official 340:28d1f895c6fe 1617 {
mbed_official 340:28d1f895c6fe 1618 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1619 }
mbed_official 340:28d1f895c6fe 1620 }
mbed_official 340:28d1f895c6fe 1621
mbed_official 340:28d1f895c6fe 1622 /* Write data to DR */
mbed_official 340:28d1f895c6fe 1623 hi2c->Instance->TXDR = (*pData++);
mbed_official 340:28d1f895c6fe 1624 Sizetmp--;
mbed_official 340:28d1f895c6fe 1625 Size--;
mbed_official 340:28d1f895c6fe 1626
mbed_official 340:28d1f895c6fe 1627 if((Sizetmp == 0)&&(Size!=0))
mbed_official 340:28d1f895c6fe 1628 {
mbed_official 340:28d1f895c6fe 1629 /* Wait until TCR flag is set */
mbed_official 340:28d1f895c6fe 1630 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 1631 {
mbed_official 340:28d1f895c6fe 1632 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1633 }
mbed_official 340:28d1f895c6fe 1634
mbed_official 340:28d1f895c6fe 1635
mbed_official 340:28d1f895c6fe 1636 if(Size > 255)
mbed_official 340:28d1f895c6fe 1637 {
mbed_official 340:28d1f895c6fe 1638 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1639 Sizetmp = 255;
mbed_official 340:28d1f895c6fe 1640 }
mbed_official 340:28d1f895c6fe 1641 else
mbed_official 340:28d1f895c6fe 1642 {
mbed_official 340:28d1f895c6fe 1643 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1644 Sizetmp = Size;
mbed_official 340:28d1f895c6fe 1645 }
mbed_official 340:28d1f895c6fe 1646 }
mbed_official 340:28d1f895c6fe 1647
mbed_official 340:28d1f895c6fe 1648 }while(Size > 0);
mbed_official 340:28d1f895c6fe 1649
mbed_official 340:28d1f895c6fe 1650 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 1651 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 1652 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 1653 {
mbed_official 340:28d1f895c6fe 1654 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 1655 {
mbed_official 340:28d1f895c6fe 1656 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1657 }
mbed_official 340:28d1f895c6fe 1658 else
mbed_official 340:28d1f895c6fe 1659 {
mbed_official 340:28d1f895c6fe 1660 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1661 }
mbed_official 340:28d1f895c6fe 1662 }
mbed_official 340:28d1f895c6fe 1663
mbed_official 340:28d1f895c6fe 1664 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 1665 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 1666
mbed_official 340:28d1f895c6fe 1667 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 1668 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 1669
mbed_official 340:28d1f895c6fe 1670 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 1671
mbed_official 340:28d1f895c6fe 1672 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1673 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1674
mbed_official 340:28d1f895c6fe 1675 return HAL_OK;
mbed_official 340:28d1f895c6fe 1676 }
mbed_official 340:28d1f895c6fe 1677 else
mbed_official 340:28d1f895c6fe 1678 {
mbed_official 340:28d1f895c6fe 1679 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1680 }
mbed_official 340:28d1f895c6fe 1681 }
mbed_official 340:28d1f895c6fe 1682
mbed_official 340:28d1f895c6fe 1683 /**
mbed_official 340:28d1f895c6fe 1684 * @brief Read an amount of data in blocking mode from a specific memory address
mbed_official 340:28d1f895c6fe 1685 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1686 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 1687 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 1688 * @param MemAddress: Internal memory address
mbed_official 340:28d1f895c6fe 1689 * @param MemAddSize: Size of internal memory address
mbed_official 340:28d1f895c6fe 1690 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 1691 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 1692 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 1693 * @retval HAL status
mbed_official 340:28d1f895c6fe 1694 */
mbed_official 340:28d1f895c6fe 1695 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 1696 {
mbed_official 340:28d1f895c6fe 1697 uint32_t Sizetmp = 0;
mbed_official 340:28d1f895c6fe 1698
mbed_official 340:28d1f895c6fe 1699 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1700 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
mbed_official 340:28d1f895c6fe 1701
mbed_official 340:28d1f895c6fe 1702 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 1703 {
mbed_official 441:d2c15dda23c1 1704 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 1705 {
mbed_official 340:28d1f895c6fe 1706 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1707 }
mbed_official 340:28d1f895c6fe 1708
mbed_official 340:28d1f895c6fe 1709 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 1710 {
mbed_official 340:28d1f895c6fe 1711 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1712 }
mbed_official 340:28d1f895c6fe 1713
mbed_official 340:28d1f895c6fe 1714 /* Process Locked */
mbed_official 340:28d1f895c6fe 1715 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 1716
mbed_official 340:28d1f895c6fe 1717 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
mbed_official 340:28d1f895c6fe 1718 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 1719
mbed_official 340:28d1f895c6fe 1720 /* Send Slave Address and Memory Address */
mbed_official 340:28d1f895c6fe 1721 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 1722 {
mbed_official 340:28d1f895c6fe 1723 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 1724 {
mbed_official 340:28d1f895c6fe 1725 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1726 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1727 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1728 }
mbed_official 340:28d1f895c6fe 1729 else
mbed_official 340:28d1f895c6fe 1730 {
mbed_official 340:28d1f895c6fe 1731 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1732 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1733 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1734 }
mbed_official 340:28d1f895c6fe 1735 }
mbed_official 340:28d1f895c6fe 1736
mbed_official 340:28d1f895c6fe 1737 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 1738 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
mbed_official 340:28d1f895c6fe 1739 /* Size > 255, need to set RELOAD bit */
mbed_official 340:28d1f895c6fe 1740 if(Size > 255)
mbed_official 340:28d1f895c6fe 1741 {
mbed_official 340:28d1f895c6fe 1742 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 1743 Sizetmp = 255;
mbed_official 340:28d1f895c6fe 1744 }
mbed_official 340:28d1f895c6fe 1745 else
mbed_official 340:28d1f895c6fe 1746 {
mbed_official 340:28d1f895c6fe 1747 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 1748 Sizetmp = Size;
mbed_official 340:28d1f895c6fe 1749 }
mbed_official 340:28d1f895c6fe 1750
mbed_official 340:28d1f895c6fe 1751 do
mbed_official 340:28d1f895c6fe 1752 {
mbed_official 340:28d1f895c6fe 1753 /* Wait until RXNE flag is set */
mbed_official 340:28d1f895c6fe 1754 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 1755 {
mbed_official 340:28d1f895c6fe 1756 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1757 }
mbed_official 340:28d1f895c6fe 1758
mbed_official 340:28d1f895c6fe 1759 /* Read data from RXDR */
mbed_official 340:28d1f895c6fe 1760 (*pData++) = hi2c->Instance->RXDR;
mbed_official 340:28d1f895c6fe 1761
mbed_official 340:28d1f895c6fe 1762 /* Decrement the Size counter */
mbed_official 340:28d1f895c6fe 1763 Sizetmp--;
mbed_official 340:28d1f895c6fe 1764 Size--;
mbed_official 340:28d1f895c6fe 1765
mbed_official 340:28d1f895c6fe 1766 if((Sizetmp == 0)&&(Size!=0))
mbed_official 340:28d1f895c6fe 1767 {
mbed_official 340:28d1f895c6fe 1768 /* Wait until TCR flag is set */
mbed_official 340:28d1f895c6fe 1769 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 1770 {
mbed_official 340:28d1f895c6fe 1771 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1772 }
mbed_official 340:28d1f895c6fe 1773
mbed_official 340:28d1f895c6fe 1774 if(Size > 255)
mbed_official 340:28d1f895c6fe 1775 {
mbed_official 340:28d1f895c6fe 1776 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1777 Sizetmp = 255;
mbed_official 340:28d1f895c6fe 1778 }
mbed_official 340:28d1f895c6fe 1779 else
mbed_official 340:28d1f895c6fe 1780 {
mbed_official 340:28d1f895c6fe 1781 I2C_TransferConfig(hi2c,DevAddress,Size, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1782 Sizetmp = Size;
mbed_official 340:28d1f895c6fe 1783 }
mbed_official 340:28d1f895c6fe 1784 }
mbed_official 340:28d1f895c6fe 1785
mbed_official 340:28d1f895c6fe 1786 }while(Size > 0);
mbed_official 340:28d1f895c6fe 1787
mbed_official 340:28d1f895c6fe 1788 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 1789 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 1790 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 1791 {
mbed_official 340:28d1f895c6fe 1792 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 1793 {
mbed_official 340:28d1f895c6fe 1794 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1795 }
mbed_official 340:28d1f895c6fe 1796 else
mbed_official 340:28d1f895c6fe 1797 {
mbed_official 340:28d1f895c6fe 1798 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1799 }
mbed_official 340:28d1f895c6fe 1800 }
mbed_official 340:28d1f895c6fe 1801
mbed_official 340:28d1f895c6fe 1802 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 1803 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 1804
mbed_official 340:28d1f895c6fe 1805 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 1806 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 1807
mbed_official 340:28d1f895c6fe 1808 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 1809
mbed_official 340:28d1f895c6fe 1810 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1811 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1812
mbed_official 340:28d1f895c6fe 1813 return HAL_OK;
mbed_official 340:28d1f895c6fe 1814 }
mbed_official 340:28d1f895c6fe 1815 else
mbed_official 340:28d1f895c6fe 1816 {
mbed_official 340:28d1f895c6fe 1817 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1818 }
mbed_official 340:28d1f895c6fe 1819 }
mbed_official 340:28d1f895c6fe 1820 /**
mbed_official 630:825f75ca301e 1821 * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
mbed_official 340:28d1f895c6fe 1822 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1823 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 1824 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 1825 * @param MemAddress: Internal memory address
mbed_official 340:28d1f895c6fe 1826 * @param MemAddSize: Size of internal memory address
mbed_official 340:28d1f895c6fe 1827 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 1828 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 1829 * @retval HAL status
mbed_official 340:28d1f895c6fe 1830 */
mbed_official 340:28d1f895c6fe 1831 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 1832 {
mbed_official 340:28d1f895c6fe 1833 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1834 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
mbed_official 340:28d1f895c6fe 1835
mbed_official 340:28d1f895c6fe 1836 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 1837 {
mbed_official 441:d2c15dda23c1 1838 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 1839 {
mbed_official 340:28d1f895c6fe 1840 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1841 }
mbed_official 340:28d1f895c6fe 1842
mbed_official 340:28d1f895c6fe 1843 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 1844 {
mbed_official 340:28d1f895c6fe 1845 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1846 }
mbed_official 340:28d1f895c6fe 1847
mbed_official 340:28d1f895c6fe 1848 /* Process Locked */
mbed_official 340:28d1f895c6fe 1849 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 1850
mbed_official 340:28d1f895c6fe 1851 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
mbed_official 340:28d1f895c6fe 1852 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 1853
mbed_official 340:28d1f895c6fe 1854 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 1855 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 1856 if(Size > 255)
mbed_official 340:28d1f895c6fe 1857 {
mbed_official 340:28d1f895c6fe 1858 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 1859 }
mbed_official 340:28d1f895c6fe 1860 else
mbed_official 340:28d1f895c6fe 1861 {
mbed_official 340:28d1f895c6fe 1862 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 1863 }
mbed_official 340:28d1f895c6fe 1864
mbed_official 340:28d1f895c6fe 1865 /* Send Slave Address and Memory Address */
mbed_official 340:28d1f895c6fe 1866 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
mbed_official 340:28d1f895c6fe 1867 {
mbed_official 340:28d1f895c6fe 1868 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 1869 {
mbed_official 340:28d1f895c6fe 1870 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1871 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1872 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1873 }
mbed_official 340:28d1f895c6fe 1874 else
mbed_official 340:28d1f895c6fe 1875 {
mbed_official 340:28d1f895c6fe 1876 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1877 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1878 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1879 }
mbed_official 340:28d1f895c6fe 1880 }
mbed_official 340:28d1f895c6fe 1881
mbed_official 340:28d1f895c6fe 1882 /* Set NBYTES to write and reload if size > 255 */
mbed_official 340:28d1f895c6fe 1883 /* Size > 255, need to set RELOAD bit */
mbed_official 340:28d1f895c6fe 1884 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 1885 {
mbed_official 340:28d1f895c6fe 1886 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1887 }
mbed_official 340:28d1f895c6fe 1888 else
mbed_official 340:28d1f895c6fe 1889 {
mbed_official 340:28d1f895c6fe 1890 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 1891 }
mbed_official 340:28d1f895c6fe 1892
mbed_official 340:28d1f895c6fe 1893 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1894 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1895
mbed_official 340:28d1f895c6fe 1896 /* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official 340:28d1f895c6fe 1897 to avoid the risk of I2C interrupt handle execution before current
mbed_official 340:28d1f895c6fe 1898 process unlock */
mbed_official 340:28d1f895c6fe 1899
mbed_official 340:28d1f895c6fe 1900 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
mbed_official 340:28d1f895c6fe 1901 /* possible to enable all of these */
mbed_official 340:28d1f895c6fe 1902 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
mbed_official 340:28d1f895c6fe 1903 __HAL_I2C_ENABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI );
mbed_official 340:28d1f895c6fe 1904
mbed_official 340:28d1f895c6fe 1905 return HAL_OK;
mbed_official 340:28d1f895c6fe 1906 }
mbed_official 340:28d1f895c6fe 1907 else
mbed_official 340:28d1f895c6fe 1908 {
mbed_official 340:28d1f895c6fe 1909 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1910 }
mbed_official 340:28d1f895c6fe 1911 }
mbed_official 340:28d1f895c6fe 1912
mbed_official 340:28d1f895c6fe 1913 /**
mbed_official 630:825f75ca301e 1914 * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
mbed_official 340:28d1f895c6fe 1915 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1916 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 1917 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 1918 * @param MemAddress: Internal memory address
mbed_official 340:28d1f895c6fe 1919 * @param MemAddSize: Size of internal memory address
mbed_official 340:28d1f895c6fe 1920 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 1921 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 1922 * @retval HAL status
mbed_official 340:28d1f895c6fe 1923 */
mbed_official 340:28d1f895c6fe 1924 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 1925 {
mbed_official 340:28d1f895c6fe 1926 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1927 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
mbed_official 340:28d1f895c6fe 1928
mbed_official 340:28d1f895c6fe 1929 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 1930 {
mbed_official 441:d2c15dda23c1 1931 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 1932 {
mbed_official 340:28d1f895c6fe 1933 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1934 }
mbed_official 340:28d1f895c6fe 1935
mbed_official 340:28d1f895c6fe 1936 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 1937 {
mbed_official 340:28d1f895c6fe 1938 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 1939 }
mbed_official 340:28d1f895c6fe 1940
mbed_official 340:28d1f895c6fe 1941 /* Process Locked */
mbed_official 340:28d1f895c6fe 1942 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 1943
mbed_official 340:28d1f895c6fe 1944 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
mbed_official 340:28d1f895c6fe 1945
mbed_official 340:28d1f895c6fe 1946 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 1947 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 1948 if(Size > 255)
mbed_official 340:28d1f895c6fe 1949 {
mbed_official 340:28d1f895c6fe 1950 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 1951 }
mbed_official 340:28d1f895c6fe 1952 else
mbed_official 340:28d1f895c6fe 1953 {
mbed_official 340:28d1f895c6fe 1954 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 1955 }
mbed_official 340:28d1f895c6fe 1956
mbed_official 340:28d1f895c6fe 1957 /* Send Slave Address and Memory Address */
mbed_official 340:28d1f895c6fe 1958 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
mbed_official 340:28d1f895c6fe 1959 {
mbed_official 340:28d1f895c6fe 1960 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 1961 {
mbed_official 340:28d1f895c6fe 1962 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1963 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1964 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 1965 }
mbed_official 340:28d1f895c6fe 1966 else
mbed_official 340:28d1f895c6fe 1967 {
mbed_official 340:28d1f895c6fe 1968 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1969 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1970 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1971 }
mbed_official 340:28d1f895c6fe 1972 }
mbed_official 340:28d1f895c6fe 1973
mbed_official 340:28d1f895c6fe 1974 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
mbed_official 340:28d1f895c6fe 1975 /* Size > 255, need to set RELOAD bit */
mbed_official 340:28d1f895c6fe 1976 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 1977 {
mbed_official 340:28d1f895c6fe 1978 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 1979 }
mbed_official 340:28d1f895c6fe 1980 else
mbed_official 340:28d1f895c6fe 1981 {
mbed_official 340:28d1f895c6fe 1982 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 1983 }
mbed_official 340:28d1f895c6fe 1984
mbed_official 340:28d1f895c6fe 1985 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1986 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 1987
mbed_official 340:28d1f895c6fe 1988 /* Note : The I2C interrupts must be enabled after unlocking current process
mbed_official 340:28d1f895c6fe 1989 to avoid the risk of I2C interrupt handle execution before current
mbed_official 340:28d1f895c6fe 1990 process unlock */
mbed_official 340:28d1f895c6fe 1991
mbed_official 340:28d1f895c6fe 1992 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
mbed_official 340:28d1f895c6fe 1993 /* possible to enable all of these */
mbed_official 340:28d1f895c6fe 1994 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
mbed_official 340:28d1f895c6fe 1995 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI );
mbed_official 340:28d1f895c6fe 1996
mbed_official 340:28d1f895c6fe 1997 return HAL_OK;
mbed_official 340:28d1f895c6fe 1998 }
mbed_official 340:28d1f895c6fe 1999 else
mbed_official 340:28d1f895c6fe 2000 {
mbed_official 340:28d1f895c6fe 2001 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 2002 }
mbed_official 340:28d1f895c6fe 2003 }
mbed_official 340:28d1f895c6fe 2004 /**
mbed_official 630:825f75ca301e 2005 * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
mbed_official 340:28d1f895c6fe 2006 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2007 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2008 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 2009 * @param MemAddress: Internal memory address
mbed_official 340:28d1f895c6fe 2010 * @param MemAddSize: Size of internal memory address
mbed_official 340:28d1f895c6fe 2011 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 2012 * @param Size: Amount of data to be sent
mbed_official 340:28d1f895c6fe 2013 * @retval HAL status
mbed_official 340:28d1f895c6fe 2014 */
mbed_official 340:28d1f895c6fe 2015 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 2016 {
mbed_official 340:28d1f895c6fe 2017 /* Check the parameters */
mbed_official 340:28d1f895c6fe 2018 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
mbed_official 340:28d1f895c6fe 2019
mbed_official 340:28d1f895c6fe 2020 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 2021 {
mbed_official 441:d2c15dda23c1 2022 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 2023 {
mbed_official 340:28d1f895c6fe 2024 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 2025 }
mbed_official 340:28d1f895c6fe 2026
mbed_official 340:28d1f895c6fe 2027 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 2028 {
mbed_official 340:28d1f895c6fe 2029 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 2030 }
mbed_official 340:28d1f895c6fe 2031
mbed_official 340:28d1f895c6fe 2032 /* Process Locked */
mbed_official 340:28d1f895c6fe 2033 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 2034
mbed_official 340:28d1f895c6fe 2035 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
mbed_official 340:28d1f895c6fe 2036 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 2037
mbed_official 340:28d1f895c6fe 2038 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 2039 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 2040 if(Size > 255)
mbed_official 340:28d1f895c6fe 2041 {
mbed_official 340:28d1f895c6fe 2042 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 2043 }
mbed_official 340:28d1f895c6fe 2044 else
mbed_official 340:28d1f895c6fe 2045 {
mbed_official 340:28d1f895c6fe 2046 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 2047 }
mbed_official 340:28d1f895c6fe 2048
mbed_official 340:28d1f895c6fe 2049 /* Set the I2C DMA transfer complete callback */
mbed_official 340:28d1f895c6fe 2050 hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
mbed_official 340:28d1f895c6fe 2051
mbed_official 340:28d1f895c6fe 2052 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 2053 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
mbed_official 340:28d1f895c6fe 2054
mbed_official 340:28d1f895c6fe 2055 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 2056 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
mbed_official 340:28d1f895c6fe 2057
mbed_official 340:28d1f895c6fe 2058 /* Send Slave Address and Memory Address */
mbed_official 340:28d1f895c6fe 2059 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
mbed_official 340:28d1f895c6fe 2060 {
mbed_official 340:28d1f895c6fe 2061 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 2062 {
mbed_official 340:28d1f895c6fe 2063 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2064 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2065 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 2066 }
mbed_official 340:28d1f895c6fe 2067 else
mbed_official 340:28d1f895c6fe 2068 {
mbed_official 340:28d1f895c6fe 2069 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2070 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2071 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2072 }
mbed_official 340:28d1f895c6fe 2073 }
mbed_official 340:28d1f895c6fe 2074
mbed_official 340:28d1f895c6fe 2075 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 2076 /* Set NBYTES to write and reload if size > 255 */
mbed_official 340:28d1f895c6fe 2077 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 2078 {
mbed_official 340:28d1f895c6fe 2079 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 2080 }
mbed_official 340:28d1f895c6fe 2081 else
mbed_official 340:28d1f895c6fe 2082 {
mbed_official 340:28d1f895c6fe 2083 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 2084 }
mbed_official 340:28d1f895c6fe 2085
mbed_official 340:28d1f895c6fe 2086 /* Wait until TXIS flag is set */
mbed_official 340:28d1f895c6fe 2087 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
mbed_official 340:28d1f895c6fe 2088 {
mbed_official 340:28d1f895c6fe 2089 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 2090 {
mbed_official 340:28d1f895c6fe 2091 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 2092 }
mbed_official 340:28d1f895c6fe 2093 else
mbed_official 340:28d1f895c6fe 2094 {
mbed_official 340:28d1f895c6fe 2095 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2096 }
mbed_official 340:28d1f895c6fe 2097 }
mbed_official 340:28d1f895c6fe 2098
mbed_official 340:28d1f895c6fe 2099 /* Enable DMA Request */
mbed_official 340:28d1f895c6fe 2100 hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
mbed_official 340:28d1f895c6fe 2101
mbed_official 340:28d1f895c6fe 2102 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2103 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2104
mbed_official 340:28d1f895c6fe 2105 return HAL_OK;
mbed_official 340:28d1f895c6fe 2106 }
mbed_official 340:28d1f895c6fe 2107 else
mbed_official 340:28d1f895c6fe 2108 {
mbed_official 340:28d1f895c6fe 2109 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 2110 }
mbed_official 340:28d1f895c6fe 2111 }
mbed_official 340:28d1f895c6fe 2112
mbed_official 340:28d1f895c6fe 2113 /**
mbed_official 630:825f75ca301e 2114 * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
mbed_official 340:28d1f895c6fe 2115 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2116 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2117 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 2118 * @param MemAddress: Internal memory address
mbed_official 340:28d1f895c6fe 2119 * @param MemAddSize: Size of internal memory address
mbed_official 340:28d1f895c6fe 2120 * @param pData: Pointer to data buffer
mbed_official 340:28d1f895c6fe 2121 * @param Size: Amount of data to be read
mbed_official 340:28d1f895c6fe 2122 * @retval HAL status
mbed_official 340:28d1f895c6fe 2123 */
mbed_official 340:28d1f895c6fe 2124 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 2125 {
mbed_official 340:28d1f895c6fe 2126 /* Check the parameters */
mbed_official 340:28d1f895c6fe 2127 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
mbed_official 340:28d1f895c6fe 2128
mbed_official 340:28d1f895c6fe 2129 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 2130 {
mbed_official 441:d2c15dda23c1 2131 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 2132 {
mbed_official 340:28d1f895c6fe 2133 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 2134 }
mbed_official 340:28d1f895c6fe 2135
mbed_official 340:28d1f895c6fe 2136 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 2137 {
mbed_official 340:28d1f895c6fe 2138 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 2139 }
mbed_official 340:28d1f895c6fe 2140
mbed_official 340:28d1f895c6fe 2141 /* Process Locked */
mbed_official 340:28d1f895c6fe 2142 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 2143
mbed_official 340:28d1f895c6fe 2144 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
mbed_official 340:28d1f895c6fe 2145
mbed_official 340:28d1f895c6fe 2146 hi2c->pBuffPtr = pData;
mbed_official 340:28d1f895c6fe 2147 hi2c->XferCount = Size;
mbed_official 340:28d1f895c6fe 2148 if(Size > 255)
mbed_official 340:28d1f895c6fe 2149 {
mbed_official 340:28d1f895c6fe 2150 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 2151 }
mbed_official 340:28d1f895c6fe 2152 else
mbed_official 340:28d1f895c6fe 2153 {
mbed_official 340:28d1f895c6fe 2154 hi2c->XferSize = Size;
mbed_official 340:28d1f895c6fe 2155 }
mbed_official 340:28d1f895c6fe 2156
mbed_official 340:28d1f895c6fe 2157 /* Set the I2C DMA transfer complete callback */
mbed_official 340:28d1f895c6fe 2158 hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
mbed_official 340:28d1f895c6fe 2159
mbed_official 340:28d1f895c6fe 2160 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 2161 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
mbed_official 340:28d1f895c6fe 2162
mbed_official 340:28d1f895c6fe 2163 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 2164 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
mbed_official 340:28d1f895c6fe 2165
mbed_official 340:28d1f895c6fe 2166 /* Send Slave Address and Memory Address */
mbed_official 340:28d1f895c6fe 2167 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
mbed_official 340:28d1f895c6fe 2168 {
mbed_official 340:28d1f895c6fe 2169 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 2170 {
mbed_official 340:28d1f895c6fe 2171 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2172 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2173 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 2174 }
mbed_official 340:28d1f895c6fe 2175 else
mbed_official 340:28d1f895c6fe 2176 {
mbed_official 340:28d1f895c6fe 2177 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2178 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2179 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2180 }
mbed_official 340:28d1f895c6fe 2181 }
mbed_official 340:28d1f895c6fe 2182
mbed_official 340:28d1f895c6fe 2183 /* Set NBYTES to write and reload if size > 255 and generate RESTART */
mbed_official 340:28d1f895c6fe 2184 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 2185 {
mbed_official 340:28d1f895c6fe 2186 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 2187 }
mbed_official 340:28d1f895c6fe 2188 else
mbed_official 340:28d1f895c6fe 2189 {
mbed_official 340:28d1f895c6fe 2190 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
mbed_official 340:28d1f895c6fe 2191 }
mbed_official 340:28d1f895c6fe 2192
mbed_official 340:28d1f895c6fe 2193 /* Wait until RXNE flag is set */
mbed_official 340:28d1f895c6fe 2194 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
mbed_official 340:28d1f895c6fe 2195 {
mbed_official 340:28d1f895c6fe 2196 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2197 }
mbed_official 340:28d1f895c6fe 2198
mbed_official 340:28d1f895c6fe 2199 /* Enable DMA Request */
mbed_official 340:28d1f895c6fe 2200 hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
mbed_official 340:28d1f895c6fe 2201
mbed_official 340:28d1f895c6fe 2202 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2203 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2204
mbed_official 340:28d1f895c6fe 2205 return HAL_OK;
mbed_official 340:28d1f895c6fe 2206 }
mbed_official 340:28d1f895c6fe 2207 else
mbed_official 340:28d1f895c6fe 2208 {
mbed_official 340:28d1f895c6fe 2209 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 2210 }
mbed_official 340:28d1f895c6fe 2211 }
mbed_official 340:28d1f895c6fe 2212
mbed_official 340:28d1f895c6fe 2213 /**
mbed_official 340:28d1f895c6fe 2214 * @brief Checks if target device is ready for communication.
mbed_official 340:28d1f895c6fe 2215 * @note This function is used with Memory devices
mbed_official 340:28d1f895c6fe 2216 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2217 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2218 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 2219 * @param Trials: Number of trials
mbed_official 340:28d1f895c6fe 2220 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 2221 * @retval HAL status
mbed_official 340:28d1f895c6fe 2222 */
mbed_official 340:28d1f895c6fe 2223 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 2224 {
mbed_official 340:28d1f895c6fe 2225 uint32_t tickstart = 0;
mbed_official 340:28d1f895c6fe 2226
mbed_official 340:28d1f895c6fe 2227 __IO uint32_t I2C_Trials = 0;
mbed_official 340:28d1f895c6fe 2228
mbed_official 340:28d1f895c6fe 2229 if(hi2c->State == HAL_I2C_STATE_READY)
mbed_official 340:28d1f895c6fe 2230 {
mbed_official 340:28d1f895c6fe 2231 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
mbed_official 340:28d1f895c6fe 2232 {
mbed_official 340:28d1f895c6fe 2233 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 2234 }
mbed_official 340:28d1f895c6fe 2235
mbed_official 340:28d1f895c6fe 2236 /* Process Locked */
mbed_official 340:28d1f895c6fe 2237 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 2238
mbed_official 340:28d1f895c6fe 2239 hi2c->State = HAL_I2C_STATE_BUSY;
mbed_official 340:28d1f895c6fe 2240 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 2241
mbed_official 340:28d1f895c6fe 2242 do
mbed_official 340:28d1f895c6fe 2243 {
mbed_official 340:28d1f895c6fe 2244 /* Generate Start */
mbed_official 630:825f75ca301e 2245 hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode,DevAddress);
mbed_official 340:28d1f895c6fe 2246
mbed_official 340:28d1f895c6fe 2247 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 2248 /* Wait until STOPF flag is set or a NACK flag is set*/
mbed_official 340:28d1f895c6fe 2249 tickstart = HAL_GetTick();
mbed_official 340:28d1f895c6fe 2250 while((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && (hi2c->State != HAL_I2C_STATE_TIMEOUT))
mbed_official 340:28d1f895c6fe 2251 {
mbed_official 340:28d1f895c6fe 2252 if(Timeout != HAL_MAX_DELAY)
mbed_official 340:28d1f895c6fe 2253 {
mbed_official 340:28d1f895c6fe 2254 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 2255 {
mbed_official 340:28d1f895c6fe 2256 /* Device is ready */
mbed_official 340:28d1f895c6fe 2257 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 2258 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2259 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2260 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2261 }
mbed_official 340:28d1f895c6fe 2262 }
mbed_official 340:28d1f895c6fe 2263 }
mbed_official 340:28d1f895c6fe 2264
mbed_official 340:28d1f895c6fe 2265 /* Check if the NACKF flag has not been set */
mbed_official 340:28d1f895c6fe 2266 if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET)
mbed_official 340:28d1f895c6fe 2267 {
mbed_official 340:28d1f895c6fe 2268 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 2269 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 2270 {
mbed_official 340:28d1f895c6fe 2271 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2272 }
mbed_official 340:28d1f895c6fe 2273
mbed_official 340:28d1f895c6fe 2274 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 2275 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 2276
mbed_official 340:28d1f895c6fe 2277 /* Device is ready */
mbed_official 340:28d1f895c6fe 2278 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 2279
mbed_official 340:28d1f895c6fe 2280 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2281 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2282
mbed_official 340:28d1f895c6fe 2283 return HAL_OK;
mbed_official 340:28d1f895c6fe 2284 }
mbed_official 340:28d1f895c6fe 2285 else
mbed_official 340:28d1f895c6fe 2286 {
mbed_official 340:28d1f895c6fe 2287 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 2288 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 2289 {
mbed_official 340:28d1f895c6fe 2290 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2291 }
mbed_official 340:28d1f895c6fe 2292
mbed_official 340:28d1f895c6fe 2293 /* Clear NACK Flag */
mbed_official 340:28d1f895c6fe 2294 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official 340:28d1f895c6fe 2295
mbed_official 340:28d1f895c6fe 2296 /* Clear STOP Flag, auto generated with autoend*/
mbed_official 340:28d1f895c6fe 2297 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 2298 }
mbed_official 340:28d1f895c6fe 2299
mbed_official 340:28d1f895c6fe 2300 /* Check if the maximum allowed number of trials has been reached */
mbed_official 340:28d1f895c6fe 2301 if (I2C_Trials++ == Trials)
mbed_official 340:28d1f895c6fe 2302 {
mbed_official 340:28d1f895c6fe 2303 /* Generate Stop */
mbed_official 340:28d1f895c6fe 2304 hi2c->Instance->CR2 |= I2C_CR2_STOP;
mbed_official 340:28d1f895c6fe 2305
mbed_official 340:28d1f895c6fe 2306 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 2307 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 2308 {
mbed_official 340:28d1f895c6fe 2309 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2310 }
mbed_official 340:28d1f895c6fe 2311
mbed_official 340:28d1f895c6fe 2312 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 2313 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 2314 }
mbed_official 340:28d1f895c6fe 2315 }while(I2C_Trials < Trials);
mbed_official 340:28d1f895c6fe 2316
mbed_official 340:28d1f895c6fe 2317 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 2318
mbed_official 340:28d1f895c6fe 2319 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2320 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2321
mbed_official 340:28d1f895c6fe 2322 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2323 }
mbed_official 340:28d1f895c6fe 2324 else
mbed_official 340:28d1f895c6fe 2325 {
mbed_official 340:28d1f895c6fe 2326 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 2327 }
mbed_official 340:28d1f895c6fe 2328 }
mbed_official 630:825f75ca301e 2329 /**
mbed_official 630:825f75ca301e 2330 * @}
mbed_official 630:825f75ca301e 2331 */
mbed_official 630:825f75ca301e 2332
mbed_official 630:825f75ca301e 2333 /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
mbed_official 630:825f75ca301e 2334 * @{
mbed_official 630:825f75ca301e 2335 */
mbed_official 340:28d1f895c6fe 2336
mbed_official 340:28d1f895c6fe 2337 /**
mbed_official 340:28d1f895c6fe 2338 * @brief This function handles I2C event interrupt request.
mbed_official 340:28d1f895c6fe 2339 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2340 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2341 * @retval None
mbed_official 340:28d1f895c6fe 2342 */
mbed_official 340:28d1f895c6fe 2343 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2344 {
mbed_official 340:28d1f895c6fe 2345 /* I2C in mode Transmitter ---------------------------------------------------*/
mbed_official 340:28d1f895c6fe 2346 if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI | I2C_IT_ADDRI)) == SET))
mbed_official 340:28d1f895c6fe 2347 {
mbed_official 340:28d1f895c6fe 2348 /* Slave mode selected */
mbed_official 340:28d1f895c6fe 2349 if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_TX)
mbed_official 340:28d1f895c6fe 2350 {
mbed_official 340:28d1f895c6fe 2351 I2C_SlaveTransmit_ISR(hi2c);
mbed_official 340:28d1f895c6fe 2352 }
mbed_official 340:28d1f895c6fe 2353 }
mbed_official 340:28d1f895c6fe 2354
mbed_official 340:28d1f895c6fe 2355 if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI)) == SET))
mbed_official 340:28d1f895c6fe 2356 {
mbed_official 340:28d1f895c6fe 2357 /* Master mode selected */
mbed_official 340:28d1f895c6fe 2358 if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX))
mbed_official 340:28d1f895c6fe 2359 {
mbed_official 340:28d1f895c6fe 2360 I2C_MasterTransmit_ISR(hi2c);
mbed_official 340:28d1f895c6fe 2361 }
mbed_official 340:28d1f895c6fe 2362 }
mbed_official 340:28d1f895c6fe 2363
mbed_official 340:28d1f895c6fe 2364 /* I2C in mode Receiver ----------------------------------------------------*/
mbed_official 340:28d1f895c6fe 2365 if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI | I2C_IT_ADDRI)) == SET))
mbed_official 340:28d1f895c6fe 2366 {
mbed_official 340:28d1f895c6fe 2367 /* Slave mode selected */
mbed_official 340:28d1f895c6fe 2368 if (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_RX)
mbed_official 340:28d1f895c6fe 2369 {
mbed_official 340:28d1f895c6fe 2370 I2C_SlaveReceive_ISR(hi2c);
mbed_official 340:28d1f895c6fe 2371 }
mbed_official 340:28d1f895c6fe 2372 }
mbed_official 340:28d1f895c6fe 2373 if (((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) || (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)) && (__HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI)) == SET))
mbed_official 340:28d1f895c6fe 2374 {
mbed_official 340:28d1f895c6fe 2375 /* Master mode selected */
mbed_official 340:28d1f895c6fe 2376 if ((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX))
mbed_official 340:28d1f895c6fe 2377 {
mbed_official 340:28d1f895c6fe 2378 I2C_MasterReceive_ISR(hi2c);
mbed_official 340:28d1f895c6fe 2379 }
mbed_official 340:28d1f895c6fe 2380 }
mbed_official 340:28d1f895c6fe 2381 }
mbed_official 340:28d1f895c6fe 2382
mbed_official 340:28d1f895c6fe 2383 /**
mbed_official 340:28d1f895c6fe 2384 * @brief This function handles I2C error interrupt request.
mbed_official 340:28d1f895c6fe 2385 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2386 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2387 * @retval None
mbed_official 340:28d1f895c6fe 2388 */
mbed_official 340:28d1f895c6fe 2389 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2390 {
mbed_official 340:28d1f895c6fe 2391 /* I2C Bus error interrupt occurred ------------------------------------*/
mbed_official 340:28d1f895c6fe 2392 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
mbed_official 340:28d1f895c6fe 2393 {
mbed_official 340:28d1f895c6fe 2394 hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
mbed_official 340:28d1f895c6fe 2395
mbed_official 340:28d1f895c6fe 2396 /* Clear BERR flag */
mbed_official 340:28d1f895c6fe 2397 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
mbed_official 340:28d1f895c6fe 2398 }
mbed_official 340:28d1f895c6fe 2399
mbed_official 340:28d1f895c6fe 2400 /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/
mbed_official 340:28d1f895c6fe 2401 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
mbed_official 340:28d1f895c6fe 2402 {
mbed_official 340:28d1f895c6fe 2403 hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
mbed_official 340:28d1f895c6fe 2404
mbed_official 340:28d1f895c6fe 2405 /* Clear OVR flag */
mbed_official 340:28d1f895c6fe 2406 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
mbed_official 340:28d1f895c6fe 2407 }
mbed_official 340:28d1f895c6fe 2408
mbed_official 340:28d1f895c6fe 2409 /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/
mbed_official 340:28d1f895c6fe 2410 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO) == SET) && (__HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERRI) == SET))
mbed_official 340:28d1f895c6fe 2411 {
mbed_official 340:28d1f895c6fe 2412 hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
mbed_official 340:28d1f895c6fe 2413
mbed_official 340:28d1f895c6fe 2414 /* Clear ARLO flag */
mbed_official 340:28d1f895c6fe 2415 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
mbed_official 340:28d1f895c6fe 2416 }
mbed_official 340:28d1f895c6fe 2417
mbed_official 340:28d1f895c6fe 2418 /* Call the Error Callback in case of Error detected */
mbed_official 630:825f75ca301e 2419 if((hi2c->ErrorCode & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 2420 {
mbed_official 340:28d1f895c6fe 2421 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 2422
mbed_official 340:28d1f895c6fe 2423 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 2424 }
mbed_official 340:28d1f895c6fe 2425 }
mbed_official 340:28d1f895c6fe 2426
mbed_official 340:28d1f895c6fe 2427 /**
mbed_official 340:28d1f895c6fe 2428 * @brief Master Tx Transfer completed callbacks.
mbed_official 340:28d1f895c6fe 2429 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2430 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2431 * @retval None
mbed_official 340:28d1f895c6fe 2432 */
mbed_official 340:28d1f895c6fe 2433 __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2434 {
mbed_official 630:825f75ca301e 2435 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 2436 the HAL_I2C_TxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 2437 */
mbed_official 340:28d1f895c6fe 2438 }
mbed_official 340:28d1f895c6fe 2439
mbed_official 340:28d1f895c6fe 2440 /**
mbed_official 340:28d1f895c6fe 2441 * @brief Master Rx Transfer completed callbacks.
mbed_official 340:28d1f895c6fe 2442 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2443 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2444 * @retval None
mbed_official 340:28d1f895c6fe 2445 */
mbed_official 340:28d1f895c6fe 2446 __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2447 {
mbed_official 630:825f75ca301e 2448 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 2449 the HAL_I2C_TxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 2450 */
mbed_official 340:28d1f895c6fe 2451 }
mbed_official 340:28d1f895c6fe 2452
mbed_official 340:28d1f895c6fe 2453 /** @brief Slave Tx Transfer completed callbacks.
mbed_official 340:28d1f895c6fe 2454 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2455 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2456 * @retval None
mbed_official 340:28d1f895c6fe 2457 */
mbed_official 340:28d1f895c6fe 2458 __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2459 {
mbed_official 630:825f75ca301e 2460 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 2461 the HAL_I2C_TxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 2462 */
mbed_official 340:28d1f895c6fe 2463 }
mbed_official 340:28d1f895c6fe 2464
mbed_official 340:28d1f895c6fe 2465 /**
mbed_official 340:28d1f895c6fe 2466 * @brief Slave Rx Transfer completed callbacks.
mbed_official 340:28d1f895c6fe 2467 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2468 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2469 * @retval None
mbed_official 340:28d1f895c6fe 2470 */
mbed_official 340:28d1f895c6fe 2471 __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2472 {
mbed_official 630:825f75ca301e 2473 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 2474 the HAL_I2C_TxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 2475 */
mbed_official 340:28d1f895c6fe 2476 }
mbed_official 340:28d1f895c6fe 2477
mbed_official 340:28d1f895c6fe 2478 /**
mbed_official 340:28d1f895c6fe 2479 * @brief Memory Tx Transfer completed callbacks.
mbed_official 340:28d1f895c6fe 2480 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2481 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2482 * @retval None
mbed_official 340:28d1f895c6fe 2483 */
mbed_official 340:28d1f895c6fe 2484 __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2485 {
mbed_official 630:825f75ca301e 2486 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 2487 the HAL_I2C_TxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 2488 */
mbed_official 340:28d1f895c6fe 2489 }
mbed_official 340:28d1f895c6fe 2490
mbed_official 340:28d1f895c6fe 2491 /**
mbed_official 340:28d1f895c6fe 2492 * @brief Memory Rx Transfer completed callbacks.
mbed_official 340:28d1f895c6fe 2493 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2494 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2495 * @retval None
mbed_official 340:28d1f895c6fe 2496 */
mbed_official 340:28d1f895c6fe 2497 __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2498 {
mbed_official 630:825f75ca301e 2499 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 2500 the HAL_I2C_TxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 2501 */
mbed_official 340:28d1f895c6fe 2502 }
mbed_official 340:28d1f895c6fe 2503
mbed_official 340:28d1f895c6fe 2504 /**
mbed_official 340:28d1f895c6fe 2505 * @brief I2C error callbacks.
mbed_official 340:28d1f895c6fe 2506 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2507 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2508 * @retval None
mbed_official 340:28d1f895c6fe 2509 */
mbed_official 340:28d1f895c6fe 2510 __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2511 {
mbed_official 630:825f75ca301e 2512 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 2513 the HAL_I2C_ErrorCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 2514 */
mbed_official 340:28d1f895c6fe 2515 }
mbed_official 340:28d1f895c6fe 2516
mbed_official 340:28d1f895c6fe 2517 /**
mbed_official 340:28d1f895c6fe 2518 * @}
mbed_official 340:28d1f895c6fe 2519 */
mbed_official 340:28d1f895c6fe 2520
mbed_official 340:28d1f895c6fe 2521 /** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
mbed_official 340:28d1f895c6fe 2522 * @brief Peripheral State and Errors functions
mbed_official 340:28d1f895c6fe 2523 *
mbed_official 340:28d1f895c6fe 2524 @verbatim
mbed_official 340:28d1f895c6fe 2525 ===============================================================================
mbed_official 340:28d1f895c6fe 2526 ##### Peripheral State and Errors functions #####
mbed_official 340:28d1f895c6fe 2527 ===============================================================================
mbed_official 340:28d1f895c6fe 2528 [..]
mbed_official 630:825f75ca301e 2529 This subsection permits to get in run-time the status of the peripheral
mbed_official 340:28d1f895c6fe 2530 and the data flow.
mbed_official 340:28d1f895c6fe 2531
mbed_official 340:28d1f895c6fe 2532 @endverbatim
mbed_official 340:28d1f895c6fe 2533 * @{
mbed_official 340:28d1f895c6fe 2534 */
mbed_official 340:28d1f895c6fe 2535
mbed_official 340:28d1f895c6fe 2536 /**
mbed_official 630:825f75ca301e 2537 * @brief Return the I2C handle state.
mbed_official 630:825f75ca301e 2538 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 630:825f75ca301e 2539 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2540 * @retval HAL state
mbed_official 340:28d1f895c6fe 2541 */
mbed_official 340:28d1f895c6fe 2542 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2543 {
mbed_official 630:825f75ca301e 2544 /* Return I2C handle state */
mbed_official 340:28d1f895c6fe 2545 return hi2c->State;
mbed_official 340:28d1f895c6fe 2546 }
mbed_official 340:28d1f895c6fe 2547
mbed_official 340:28d1f895c6fe 2548 /**
mbed_official 630:825f75ca301e 2549 * @brief Return the I2C error code.
mbed_official 630:825f75ca301e 2550 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2551 * the configuration information for the specified I2C.
mbed_official 630:825f75ca301e 2552 * @retval I2C Error Code
mbed_official 340:28d1f895c6fe 2553 */
mbed_official 340:28d1f895c6fe 2554 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2555 {
mbed_official 340:28d1f895c6fe 2556 return hi2c->ErrorCode;
mbed_official 340:28d1f895c6fe 2557 }
mbed_official 340:28d1f895c6fe 2558
mbed_official 340:28d1f895c6fe 2559 /**
mbed_official 340:28d1f895c6fe 2560 * @}
mbed_official 340:28d1f895c6fe 2561 */
mbed_official 340:28d1f895c6fe 2562
mbed_official 340:28d1f895c6fe 2563 /**
mbed_official 340:28d1f895c6fe 2564 * @}
mbed_official 340:28d1f895c6fe 2565 */
mbed_official 340:28d1f895c6fe 2566
mbed_official 340:28d1f895c6fe 2567 /** @addtogroup I2C_Private_Functions
mbed_official 340:28d1f895c6fe 2568 * @{
mbed_official 340:28d1f895c6fe 2569 */
mbed_official 340:28d1f895c6fe 2570
mbed_official 340:28d1f895c6fe 2571 /**
mbed_official 340:28d1f895c6fe 2572 * @brief Handle Interrupt Flags Master Transmit Mode
mbed_official 340:28d1f895c6fe 2573 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2574 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2575 * @retval HAL status
mbed_official 340:28d1f895c6fe 2576 */
mbed_official 340:28d1f895c6fe 2577 static HAL_StatusTypeDef I2C_MasterTransmit_ISR(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2578 {
mbed_official 340:28d1f895c6fe 2579 uint16_t DevAddress;
mbed_official 340:28d1f895c6fe 2580
mbed_official 340:28d1f895c6fe 2581 /* Process Locked */
mbed_official 340:28d1f895c6fe 2582 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 2583
mbed_official 340:28d1f895c6fe 2584 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET)
mbed_official 340:28d1f895c6fe 2585 {
mbed_official 340:28d1f895c6fe 2586 /* Write data to TXDR */
mbed_official 340:28d1f895c6fe 2587 hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
mbed_official 340:28d1f895c6fe 2588 hi2c->XferSize--;
mbed_official 340:28d1f895c6fe 2589 hi2c->XferCount--;
mbed_official 340:28d1f895c6fe 2590 }
mbed_official 340:28d1f895c6fe 2591 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET)
mbed_official 340:28d1f895c6fe 2592 {
mbed_official 340:28d1f895c6fe 2593 if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0))
mbed_official 340:28d1f895c6fe 2594 {
mbed_official 340:28d1f895c6fe 2595 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
mbed_official 340:28d1f895c6fe 2596
mbed_official 340:28d1f895c6fe 2597 if(hi2c->XferCount > 255)
mbed_official 340:28d1f895c6fe 2598 {
mbed_official 340:28d1f895c6fe 2599 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 2600 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 2601 }
mbed_official 340:28d1f895c6fe 2602 else
mbed_official 340:28d1f895c6fe 2603 {
mbed_official 340:28d1f895c6fe 2604 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 2605 hi2c->XferSize = hi2c->XferCount;
mbed_official 340:28d1f895c6fe 2606 }
mbed_official 340:28d1f895c6fe 2607 }
mbed_official 340:28d1f895c6fe 2608 else
mbed_official 340:28d1f895c6fe 2609 {
mbed_official 340:28d1f895c6fe 2610 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2611 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2612
mbed_official 340:28d1f895c6fe 2613 /* Wrong size Status regarding TCR flag event */
mbed_official 340:28d1f895c6fe 2614 hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE;
mbed_official 340:28d1f895c6fe 2615 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 2616 }
mbed_official 340:28d1f895c6fe 2617 }
mbed_official 340:28d1f895c6fe 2618 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET)
mbed_official 340:28d1f895c6fe 2619 {
mbed_official 340:28d1f895c6fe 2620 if(hi2c->XferCount == 0)
mbed_official 340:28d1f895c6fe 2621 {
mbed_official 340:28d1f895c6fe 2622 /* Generate Stop */
mbed_official 340:28d1f895c6fe 2623 hi2c->Instance->CR2 |= I2C_CR2_STOP;
mbed_official 340:28d1f895c6fe 2624 }
mbed_official 340:28d1f895c6fe 2625 else
mbed_official 340:28d1f895c6fe 2626 {
mbed_official 340:28d1f895c6fe 2627 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2628 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2629
mbed_official 340:28d1f895c6fe 2630 /* Wrong size Status regarding TCR flag event */
mbed_official 340:28d1f895c6fe 2631 hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE;
mbed_official 340:28d1f895c6fe 2632 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 2633 }
mbed_official 340:28d1f895c6fe 2634 }
mbed_official 340:28d1f895c6fe 2635 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
mbed_official 340:28d1f895c6fe 2636 {
mbed_official 340:28d1f895c6fe 2637 /* Disable ERR, TC, STOP, NACK, TXI interrupt */
mbed_official 340:28d1f895c6fe 2638 __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_TXI );
mbed_official 340:28d1f895c6fe 2639
mbed_official 340:28d1f895c6fe 2640 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 2641 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 2642
mbed_official 340:28d1f895c6fe 2643 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 2644 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 2645
mbed_official 340:28d1f895c6fe 2646 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 2647
mbed_official 340:28d1f895c6fe 2648 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2649 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2650
mbed_official 340:28d1f895c6fe 2651 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
mbed_official 340:28d1f895c6fe 2652 {
mbed_official 340:28d1f895c6fe 2653 HAL_I2C_MemTxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 2654 }
mbed_official 340:28d1f895c6fe 2655 else
mbed_official 340:28d1f895c6fe 2656 {
mbed_official 340:28d1f895c6fe 2657 HAL_I2C_MasterTxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 2658 }
mbed_official 340:28d1f895c6fe 2659 }
mbed_official 340:28d1f895c6fe 2660 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
mbed_official 340:28d1f895c6fe 2661 {
mbed_official 340:28d1f895c6fe 2662 /* Clear NACK Flag */
mbed_official 340:28d1f895c6fe 2663 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official 340:28d1f895c6fe 2664
mbed_official 340:28d1f895c6fe 2665 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2666 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2667
mbed_official 340:28d1f895c6fe 2668 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 2669 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 2670 }
mbed_official 340:28d1f895c6fe 2671
mbed_official 340:28d1f895c6fe 2672 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2673 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2674
mbed_official 340:28d1f895c6fe 2675 return HAL_OK;
mbed_official 340:28d1f895c6fe 2676 }
mbed_official 340:28d1f895c6fe 2677
mbed_official 340:28d1f895c6fe 2678 /**
mbed_official 340:28d1f895c6fe 2679 * @brief Handle Interrupt Flags Master Receive Mode
mbed_official 340:28d1f895c6fe 2680 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2681 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2682 * @retval HAL status
mbed_official 340:28d1f895c6fe 2683 */
mbed_official 340:28d1f895c6fe 2684 static HAL_StatusTypeDef I2C_MasterReceive_ISR(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2685 {
mbed_official 340:28d1f895c6fe 2686 uint16_t DevAddress;
mbed_official 340:28d1f895c6fe 2687
mbed_official 340:28d1f895c6fe 2688 /* Process Locked */
mbed_official 340:28d1f895c6fe 2689 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 2690
mbed_official 340:28d1f895c6fe 2691 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
mbed_official 340:28d1f895c6fe 2692 {
mbed_official 340:28d1f895c6fe 2693 /* Read data from RXDR */
mbed_official 340:28d1f895c6fe 2694 (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
mbed_official 340:28d1f895c6fe 2695 hi2c->XferSize--;
mbed_official 340:28d1f895c6fe 2696 hi2c->XferCount--;
mbed_official 340:28d1f895c6fe 2697 }
mbed_official 340:28d1f895c6fe 2698 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TCR) == SET)
mbed_official 340:28d1f895c6fe 2699 {
mbed_official 340:28d1f895c6fe 2700 if((hi2c->XferSize == 0)&&(hi2c->XferCount!=0))
mbed_official 340:28d1f895c6fe 2701 {
mbed_official 340:28d1f895c6fe 2702 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
mbed_official 340:28d1f895c6fe 2703
mbed_official 340:28d1f895c6fe 2704 if(hi2c->XferCount > 255)
mbed_official 340:28d1f895c6fe 2705 {
mbed_official 340:28d1f895c6fe 2706 I2C_TransferConfig(hi2c,DevAddress,255, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 2707 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 2708 }
mbed_official 340:28d1f895c6fe 2709 else
mbed_official 340:28d1f895c6fe 2710 {
mbed_official 340:28d1f895c6fe 2711 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferCount, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 2712 hi2c->XferSize = hi2c->XferCount;
mbed_official 340:28d1f895c6fe 2713 }
mbed_official 340:28d1f895c6fe 2714 }
mbed_official 340:28d1f895c6fe 2715 else
mbed_official 340:28d1f895c6fe 2716 {
mbed_official 340:28d1f895c6fe 2717 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2718 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2719
mbed_official 340:28d1f895c6fe 2720 /* Wrong size Status regarding TCR flag event */
mbed_official 340:28d1f895c6fe 2721 hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE;
mbed_official 340:28d1f895c6fe 2722 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 2723 }
mbed_official 340:28d1f895c6fe 2724 }
mbed_official 340:28d1f895c6fe 2725 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TC) == SET)
mbed_official 340:28d1f895c6fe 2726 {
mbed_official 340:28d1f895c6fe 2727 if(hi2c->XferCount == 0)
mbed_official 340:28d1f895c6fe 2728 {
mbed_official 340:28d1f895c6fe 2729 /* Generate Stop */
mbed_official 340:28d1f895c6fe 2730 hi2c->Instance->CR2 |= I2C_CR2_STOP;
mbed_official 340:28d1f895c6fe 2731 }
mbed_official 340:28d1f895c6fe 2732 else
mbed_official 340:28d1f895c6fe 2733 {
mbed_official 340:28d1f895c6fe 2734 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2735 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2736
mbed_official 340:28d1f895c6fe 2737 /* Wrong size Status regarding TCR flag event */
mbed_official 340:28d1f895c6fe 2738 hi2c->ErrorCode |= HAL_I2C_ERROR_SIZE;
mbed_official 340:28d1f895c6fe 2739 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 2740 }
mbed_official 340:28d1f895c6fe 2741 }
mbed_official 340:28d1f895c6fe 2742 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
mbed_official 340:28d1f895c6fe 2743 {
mbed_official 340:28d1f895c6fe 2744 /* Disable ERR, TC, STOP, NACK, TXI interrupt */
mbed_official 340:28d1f895c6fe 2745 __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_RXI );
mbed_official 340:28d1f895c6fe 2746
mbed_official 340:28d1f895c6fe 2747 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 2748 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 2749
mbed_official 340:28d1f895c6fe 2750 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 2751 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 2752
mbed_official 340:28d1f895c6fe 2753 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 2754
mbed_official 340:28d1f895c6fe 2755 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2756 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2757
mbed_official 340:28d1f895c6fe 2758 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
mbed_official 340:28d1f895c6fe 2759 {
mbed_official 340:28d1f895c6fe 2760 HAL_I2C_MemRxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 2761 }
mbed_official 340:28d1f895c6fe 2762 else
mbed_official 340:28d1f895c6fe 2763 {
mbed_official 340:28d1f895c6fe 2764 HAL_I2C_MasterRxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 2765 }
mbed_official 340:28d1f895c6fe 2766 }
mbed_official 340:28d1f895c6fe 2767 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
mbed_official 340:28d1f895c6fe 2768 {
mbed_official 340:28d1f895c6fe 2769 /* Clear NACK Flag */
mbed_official 340:28d1f895c6fe 2770 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official 340:28d1f895c6fe 2771
mbed_official 340:28d1f895c6fe 2772 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2773 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2774
mbed_official 340:28d1f895c6fe 2775 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 2776 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 2777 }
mbed_official 340:28d1f895c6fe 2778
mbed_official 340:28d1f895c6fe 2779 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2780 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2781
mbed_official 340:28d1f895c6fe 2782 return HAL_OK;
mbed_official 340:28d1f895c6fe 2783
mbed_official 340:28d1f895c6fe 2784 }
mbed_official 340:28d1f895c6fe 2785
mbed_official 340:28d1f895c6fe 2786 /**
mbed_official 340:28d1f895c6fe 2787 * @brief Handle Interrupt Flags Slave Transmit Mode
mbed_official 340:28d1f895c6fe 2788 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2789 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2790 * @retval HAL status
mbed_official 340:28d1f895c6fe 2791 */
mbed_official 340:28d1f895c6fe 2792 static HAL_StatusTypeDef I2C_SlaveTransmit_ISR(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2793 {
mbed_official 340:28d1f895c6fe 2794 /* Process locked */
mbed_official 340:28d1f895c6fe 2795 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 2796
mbed_official 340:28d1f895c6fe 2797 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET)
mbed_official 340:28d1f895c6fe 2798 {
mbed_official 340:28d1f895c6fe 2799 /* Check that I2C transfer finished */
mbed_official 340:28d1f895c6fe 2800 /* if yes, normal usecase, a NACK is sent by the MASTER when Transfer is finished */
mbed_official 340:28d1f895c6fe 2801 /* Mean XferCount == 0*/
mbed_official 340:28d1f895c6fe 2802 /* So clear Flag NACKF only */
mbed_official 340:28d1f895c6fe 2803 if(hi2c->XferCount == 0)
mbed_official 340:28d1f895c6fe 2804 {
mbed_official 340:28d1f895c6fe 2805 /* Clear NACK Flag */
mbed_official 340:28d1f895c6fe 2806 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official 340:28d1f895c6fe 2807
mbed_official 340:28d1f895c6fe 2808 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2809 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2810 }
mbed_official 340:28d1f895c6fe 2811 else
mbed_official 340:28d1f895c6fe 2812 {
mbed_official 340:28d1f895c6fe 2813 /* if no, error usecase, a Non-Acknowledge of last Data is generated by the MASTER*/
mbed_official 340:28d1f895c6fe 2814 /* Clear NACK Flag */
mbed_official 340:28d1f895c6fe 2815 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official 340:28d1f895c6fe 2816
mbed_official 340:28d1f895c6fe 2817 /* Set ErrorCode corresponding to a Non-Acknowledge */
mbed_official 340:28d1f895c6fe 2818 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 2819
mbed_official 340:28d1f895c6fe 2820 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2821 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2822
mbed_official 340:28d1f895c6fe 2823 /* Call the Error callback to prevent upper layer */
mbed_official 340:28d1f895c6fe 2824 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 2825 }
mbed_official 340:28d1f895c6fe 2826 }
mbed_official 340:28d1f895c6fe 2827 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
mbed_official 340:28d1f895c6fe 2828 {
mbed_official 340:28d1f895c6fe 2829 /* Clear ADDR flag */
mbed_official 340:28d1f895c6fe 2830 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
mbed_official 340:28d1f895c6fe 2831 }
mbed_official 340:28d1f895c6fe 2832 /* Check first if STOPF is set */
mbed_official 340:28d1f895c6fe 2833 /* to prevent a Write Data in TX buffer */
mbed_official 340:28d1f895c6fe 2834 /* which is stuck in TXDR until next */
mbed_official 340:28d1f895c6fe 2835 /* communication with Master */
mbed_official 340:28d1f895c6fe 2836 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
mbed_official 340:28d1f895c6fe 2837 {
mbed_official 340:28d1f895c6fe 2838 /* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */
mbed_official 340:28d1f895c6fe 2839 __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI );
mbed_official 340:28d1f895c6fe 2840
mbed_official 340:28d1f895c6fe 2841 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 2842 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 2843
mbed_official 340:28d1f895c6fe 2844 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 2845 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 2846
mbed_official 340:28d1f895c6fe 2847 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 2848
mbed_official 340:28d1f895c6fe 2849 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2850 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2851
mbed_official 340:28d1f895c6fe 2852 HAL_I2C_SlaveTxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 2853 }
mbed_official 340:28d1f895c6fe 2854 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == SET)
mbed_official 340:28d1f895c6fe 2855 {
mbed_official 340:28d1f895c6fe 2856 /* Write data to TXDR only if XferCount not reach "0" */
mbed_official 340:28d1f895c6fe 2857 /* A TXIS flag can be set, during STOP treatment */
mbed_official 340:28d1f895c6fe 2858 if(hi2c->XferCount > 0)
mbed_official 340:28d1f895c6fe 2859 {
mbed_official 340:28d1f895c6fe 2860 /* Write data to TXDR */
mbed_official 340:28d1f895c6fe 2861 hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
mbed_official 340:28d1f895c6fe 2862 hi2c->XferCount--;
mbed_official 340:28d1f895c6fe 2863 }
mbed_official 340:28d1f895c6fe 2864 }
mbed_official 340:28d1f895c6fe 2865
mbed_official 340:28d1f895c6fe 2866 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2867 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2868
mbed_official 340:28d1f895c6fe 2869 return HAL_OK;
mbed_official 340:28d1f895c6fe 2870 }
mbed_official 340:28d1f895c6fe 2871
mbed_official 340:28d1f895c6fe 2872 /**
mbed_official 340:28d1f895c6fe 2873 * @brief Handle Interrupt Flags Slave Receive Mode
mbed_official 340:28d1f895c6fe 2874 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2875 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2876 * @retval HAL status
mbed_official 340:28d1f895c6fe 2877 */
mbed_official 340:28d1f895c6fe 2878 static HAL_StatusTypeDef I2C_SlaveReceive_ISR(I2C_HandleTypeDef *hi2c)
mbed_official 340:28d1f895c6fe 2879 {
mbed_official 340:28d1f895c6fe 2880 /* Process Locked */
mbed_official 340:28d1f895c6fe 2881 __HAL_LOCK(hi2c);
mbed_official 340:28d1f895c6fe 2882
mbed_official 340:28d1f895c6fe 2883 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) != RESET)
mbed_official 340:28d1f895c6fe 2884 {
mbed_official 340:28d1f895c6fe 2885 /* Clear NACK Flag */
mbed_official 340:28d1f895c6fe 2886 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official 340:28d1f895c6fe 2887
mbed_official 340:28d1f895c6fe 2888 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2889 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2890
mbed_official 340:28d1f895c6fe 2891 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 2892 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 2893 }
mbed_official 340:28d1f895c6fe 2894 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
mbed_official 340:28d1f895c6fe 2895 {
mbed_official 340:28d1f895c6fe 2896 /* Clear ADDR flag */
mbed_official 340:28d1f895c6fe 2897 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
mbed_official 340:28d1f895c6fe 2898 }
mbed_official 340:28d1f895c6fe 2899 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
mbed_official 340:28d1f895c6fe 2900 {
mbed_official 340:28d1f895c6fe 2901 /* Read data from RXDR */
mbed_official 340:28d1f895c6fe 2902 (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
mbed_official 340:28d1f895c6fe 2903 hi2c->XferSize--;
mbed_official 340:28d1f895c6fe 2904 hi2c->XferCount--;
mbed_official 340:28d1f895c6fe 2905 }
mbed_official 340:28d1f895c6fe 2906 else if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
mbed_official 340:28d1f895c6fe 2907 {
mbed_official 340:28d1f895c6fe 2908 /* Disable ERRI, TCI, STOPI, NACKI, ADDRI, RXI, TXI interrupt */
mbed_official 340:28d1f895c6fe 2909 __HAL_I2C_DISABLE_IT(hi2c,I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_RXI );
mbed_official 340:28d1f895c6fe 2910
mbed_official 340:28d1f895c6fe 2911 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 2912 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 2913
mbed_official 340:28d1f895c6fe 2914 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 2915 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 2916
mbed_official 340:28d1f895c6fe 2917 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 2918
mbed_official 340:28d1f895c6fe 2919 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2920 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2921
mbed_official 340:28d1f895c6fe 2922 HAL_I2C_SlaveRxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 2923 }
mbed_official 340:28d1f895c6fe 2924
mbed_official 340:28d1f895c6fe 2925 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 2926 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 2927
mbed_official 340:28d1f895c6fe 2928 return HAL_OK;
mbed_official 340:28d1f895c6fe 2929 }
mbed_official 340:28d1f895c6fe 2930
mbed_official 340:28d1f895c6fe 2931 /**
mbed_official 340:28d1f895c6fe 2932 * @brief Master sends target device address followed by internal memory address for write request.
mbed_official 340:28d1f895c6fe 2933 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2934 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 2935 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 2936 * @param MemAddress: Internal memory address
mbed_official 340:28d1f895c6fe 2937 * @param MemAddSize: Size of internal memory address
mbed_official 340:28d1f895c6fe 2938 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 2939 * @retval HAL status
mbed_official 340:28d1f895c6fe 2940 */
mbed_official 340:28d1f895c6fe 2941 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 2942 {
mbed_official 340:28d1f895c6fe 2943 I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
mbed_official 340:28d1f895c6fe 2944
mbed_official 340:28d1f895c6fe 2945 /* Wait until TXIS flag is set */
mbed_official 340:28d1f895c6fe 2946 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 2947 {
mbed_official 340:28d1f895c6fe 2948 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 2949 {
mbed_official 340:28d1f895c6fe 2950 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 2951 }
mbed_official 340:28d1f895c6fe 2952 else
mbed_official 340:28d1f895c6fe 2953 {
mbed_official 340:28d1f895c6fe 2954 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2955 }
mbed_official 340:28d1f895c6fe 2956 }
mbed_official 340:28d1f895c6fe 2957
mbed_official 340:28d1f895c6fe 2958 /* If Memory address size is 8Bit */
mbed_official 340:28d1f895c6fe 2959 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
mbed_official 340:28d1f895c6fe 2960 {
mbed_official 340:28d1f895c6fe 2961 /* Send Memory Address */
mbed_official 630:825f75ca301e 2962 hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
mbed_official 340:28d1f895c6fe 2963 }
mbed_official 340:28d1f895c6fe 2964 /* If Memory address size is 16Bit */
mbed_official 340:28d1f895c6fe 2965 else
mbed_official 340:28d1f895c6fe 2966 {
mbed_official 340:28d1f895c6fe 2967 /* Send MSB of Memory Address */
mbed_official 630:825f75ca301e 2968 hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
mbed_official 340:28d1f895c6fe 2969
mbed_official 340:28d1f895c6fe 2970 /* Wait until TXIS flag is set */
mbed_official 340:28d1f895c6fe 2971 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 2972 {
mbed_official 340:28d1f895c6fe 2973 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 2974 {
mbed_official 340:28d1f895c6fe 2975 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 2976 }
mbed_official 340:28d1f895c6fe 2977 else
mbed_official 340:28d1f895c6fe 2978 {
mbed_official 340:28d1f895c6fe 2979 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2980 }
mbed_official 340:28d1f895c6fe 2981 }
mbed_official 340:28d1f895c6fe 2982
mbed_official 340:28d1f895c6fe 2983 /* Send LSB of Memory Address */
mbed_official 630:825f75ca301e 2984 hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
mbed_official 340:28d1f895c6fe 2985 }
mbed_official 340:28d1f895c6fe 2986
mbed_official 340:28d1f895c6fe 2987 /* Wait until TCR flag is set */
mbed_official 340:28d1f895c6fe 2988 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 2989 {
mbed_official 340:28d1f895c6fe 2990 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 2991 }
mbed_official 340:28d1f895c6fe 2992
mbed_official 340:28d1f895c6fe 2993 return HAL_OK;
mbed_official 340:28d1f895c6fe 2994 }
mbed_official 340:28d1f895c6fe 2995
mbed_official 340:28d1f895c6fe 2996 /**
mbed_official 340:28d1f895c6fe 2997 * @brief Master sends target device address followed by internal memory address for read request.
mbed_official 340:28d1f895c6fe 2998 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 2999 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 3000 * @param DevAddress: Target device address
mbed_official 340:28d1f895c6fe 3001 * @param MemAddress: Internal memory address
mbed_official 340:28d1f895c6fe 3002 * @param MemAddSize: Size of internal memory address
mbed_official 340:28d1f895c6fe 3003 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 3004 * @retval HAL status
mbed_official 340:28d1f895c6fe 3005 */
mbed_official 340:28d1f895c6fe 3006 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 3007 {
mbed_official 340:28d1f895c6fe 3008 I2C_TransferConfig(hi2c,DevAddress,MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
mbed_official 340:28d1f895c6fe 3009
mbed_official 340:28d1f895c6fe 3010 /* Wait until TXIS flag is set */
mbed_official 340:28d1f895c6fe 3011 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 3012 {
mbed_official 340:28d1f895c6fe 3013 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3014 {
mbed_official 340:28d1f895c6fe 3015 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 3016 }
mbed_official 340:28d1f895c6fe 3017 else
mbed_official 340:28d1f895c6fe 3018 {
mbed_official 340:28d1f895c6fe 3019 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 3020 }
mbed_official 340:28d1f895c6fe 3021 }
mbed_official 340:28d1f895c6fe 3022
mbed_official 340:28d1f895c6fe 3023 /* If Memory address size is 8Bit */
mbed_official 340:28d1f895c6fe 3024 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
mbed_official 340:28d1f895c6fe 3025 {
mbed_official 340:28d1f895c6fe 3026 /* Send Memory Address */
mbed_official 630:825f75ca301e 3027 hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
mbed_official 340:28d1f895c6fe 3028 }
mbed_official 630:825f75ca301e 3029 /* If Memory address size is 16Bit */
mbed_official 340:28d1f895c6fe 3030 else
mbed_official 340:28d1f895c6fe 3031 {
mbed_official 340:28d1f895c6fe 3032 /* Send MSB of Memory Address */
mbed_official 630:825f75ca301e 3033 hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
mbed_official 340:28d1f895c6fe 3034
mbed_official 340:28d1f895c6fe 3035 /* Wait until TXIS flag is set */
mbed_official 340:28d1f895c6fe 3036 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 3037 {
mbed_official 340:28d1f895c6fe 3038 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3039 {
mbed_official 340:28d1f895c6fe 3040 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 3041 }
mbed_official 340:28d1f895c6fe 3042 else
mbed_official 340:28d1f895c6fe 3043 {
mbed_official 340:28d1f895c6fe 3044 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 3045 }
mbed_official 340:28d1f895c6fe 3046 }
mbed_official 340:28d1f895c6fe 3047
mbed_official 340:28d1f895c6fe 3048 /* Send LSB of Memory Address */
mbed_official 630:825f75ca301e 3049 hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
mbed_official 340:28d1f895c6fe 3050 }
mbed_official 340:28d1f895c6fe 3051
mbed_official 340:28d1f895c6fe 3052 /* Wait until TC flag is set */
mbed_official 340:28d1f895c6fe 3053 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 3054 {
mbed_official 340:28d1f895c6fe 3055 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 3056 }
mbed_official 340:28d1f895c6fe 3057
mbed_official 340:28d1f895c6fe 3058 return HAL_OK;
mbed_official 340:28d1f895c6fe 3059 }
mbed_official 340:28d1f895c6fe 3060
mbed_official 340:28d1f895c6fe 3061 /**
mbed_official 340:28d1f895c6fe 3062 * @brief DMA I2C master transmit process complete callback.
mbed_official 340:28d1f895c6fe 3063 * @param hdma: DMA handle
mbed_official 340:28d1f895c6fe 3064 * @retval None
mbed_official 340:28d1f895c6fe 3065 */
mbed_official 340:28d1f895c6fe 3066 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 3067 {
mbed_official 340:28d1f895c6fe 3068 uint16_t DevAddress;
mbed_official 340:28d1f895c6fe 3069 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 340:28d1f895c6fe 3070
mbed_official 340:28d1f895c6fe 3071 /* Check if last DMA request was done with RELOAD */
mbed_official 340:28d1f895c6fe 3072 /* Set NBYTES to write and reload if size > 255 */
mbed_official 340:28d1f895c6fe 3073 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 3074 {
mbed_official 340:28d1f895c6fe 3075 /* Wait until TCR flag is set */
mbed_official 340:28d1f895c6fe 3076 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
mbed_official 340:28d1f895c6fe 3077 {
mbed_official 340:28d1f895c6fe 3078 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3079 }
mbed_official 340:28d1f895c6fe 3080
mbed_official 340:28d1f895c6fe 3081 /* Disable DMA Request */
mbed_official 340:28d1f895c6fe 3082 hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
mbed_official 340:28d1f895c6fe 3083
mbed_official 340:28d1f895c6fe 3084 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3085 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3086 {
mbed_official 340:28d1f895c6fe 3087 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3088 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3089 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3090 {
mbed_official 340:28d1f895c6fe 3091 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3092 {
mbed_official 340:28d1f895c6fe 3093 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3094 }
mbed_official 340:28d1f895c6fe 3095 else
mbed_official 340:28d1f895c6fe 3096 {
mbed_official 340:28d1f895c6fe 3097 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3098 }
mbed_official 340:28d1f895c6fe 3099 }
mbed_official 340:28d1f895c6fe 3100
mbed_official 340:28d1f895c6fe 3101 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3102 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3103
mbed_official 340:28d1f895c6fe 3104 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3105 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3106
mbed_official 340:28d1f895c6fe 3107 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3108
mbed_official 340:28d1f895c6fe 3109 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3110 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3111 }
mbed_official 340:28d1f895c6fe 3112 else
mbed_official 340:28d1f895c6fe 3113 {
mbed_official 340:28d1f895c6fe 3114 hi2c->pBuffPtr += hi2c->XferSize;
mbed_official 340:28d1f895c6fe 3115 hi2c->XferCount -= hi2c->XferSize;
mbed_official 340:28d1f895c6fe 3116 if(hi2c->XferCount > 255)
mbed_official 340:28d1f895c6fe 3117 {
mbed_official 340:28d1f895c6fe 3118 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 3119 }
mbed_official 340:28d1f895c6fe 3120 else
mbed_official 340:28d1f895c6fe 3121 {
mbed_official 340:28d1f895c6fe 3122 hi2c->XferSize = hi2c->XferCount;
mbed_official 340:28d1f895c6fe 3123 }
mbed_official 340:28d1f895c6fe 3124
mbed_official 340:28d1f895c6fe 3125 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
mbed_official 340:28d1f895c6fe 3126
mbed_official 340:28d1f895c6fe 3127 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 3128 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
mbed_official 340:28d1f895c6fe 3129
mbed_official 340:28d1f895c6fe 3130 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 3131 /* Set NBYTES to write and reload if size > 255 */
mbed_official 340:28d1f895c6fe 3132 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 3133 {
mbed_official 340:28d1f895c6fe 3134 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 3135 }
mbed_official 340:28d1f895c6fe 3136 else
mbed_official 340:28d1f895c6fe 3137 {
mbed_official 340:28d1f895c6fe 3138 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 3139 }
mbed_official 340:28d1f895c6fe 3140
mbed_official 340:28d1f895c6fe 3141 /* Wait until TXIS flag is set */
mbed_official 340:28d1f895c6fe 3142 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
mbed_official 340:28d1f895c6fe 3143 {
mbed_official 340:28d1f895c6fe 3144 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3145 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3146 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3147 {
mbed_official 340:28d1f895c6fe 3148 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3149 {
mbed_official 340:28d1f895c6fe 3150 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3151 }
mbed_official 340:28d1f895c6fe 3152 else
mbed_official 340:28d1f895c6fe 3153 {
mbed_official 340:28d1f895c6fe 3154 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3155 }
mbed_official 340:28d1f895c6fe 3156 }
mbed_official 340:28d1f895c6fe 3157
mbed_official 340:28d1f895c6fe 3158 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3159 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3160
mbed_official 340:28d1f895c6fe 3161 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3162 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3163
mbed_official 340:28d1f895c6fe 3164 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3165
mbed_official 340:28d1f895c6fe 3166 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3167 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3168 }
mbed_official 340:28d1f895c6fe 3169 else
mbed_official 340:28d1f895c6fe 3170 {
mbed_official 340:28d1f895c6fe 3171 /* Enable DMA Request */
mbed_official 340:28d1f895c6fe 3172 hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
mbed_official 340:28d1f895c6fe 3173 }
mbed_official 340:28d1f895c6fe 3174 }
mbed_official 340:28d1f895c6fe 3175 }
mbed_official 340:28d1f895c6fe 3176 else
mbed_official 340:28d1f895c6fe 3177 {
mbed_official 340:28d1f895c6fe 3178 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3179 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3180 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3181 {
mbed_official 340:28d1f895c6fe 3182 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3183 {
mbed_official 340:28d1f895c6fe 3184 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3185 }
mbed_official 340:28d1f895c6fe 3186 else
mbed_official 340:28d1f895c6fe 3187 {
mbed_official 340:28d1f895c6fe 3188 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3189 }
mbed_official 340:28d1f895c6fe 3190 }
mbed_official 340:28d1f895c6fe 3191
mbed_official 340:28d1f895c6fe 3192 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3193 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3194
mbed_official 340:28d1f895c6fe 3195 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3196 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3197
mbed_official 340:28d1f895c6fe 3198 /* Disable DMA Request */
mbed_official 340:28d1f895c6fe 3199 hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
mbed_official 340:28d1f895c6fe 3200
mbed_official 340:28d1f895c6fe 3201 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3202
mbed_official 340:28d1f895c6fe 3203 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3204
mbed_official 340:28d1f895c6fe 3205 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3206 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3207 {
mbed_official 340:28d1f895c6fe 3208 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3209 }
mbed_official 340:28d1f895c6fe 3210 else
mbed_official 340:28d1f895c6fe 3211 {
mbed_official 340:28d1f895c6fe 3212 HAL_I2C_MasterTxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 3213 }
mbed_official 340:28d1f895c6fe 3214 }
mbed_official 340:28d1f895c6fe 3215 }
mbed_official 340:28d1f895c6fe 3216
mbed_official 340:28d1f895c6fe 3217 /**
mbed_official 340:28d1f895c6fe 3218 * @brief DMA I2C slave transmit process complete callback.
mbed_official 340:28d1f895c6fe 3219 * @param hdma: DMA handle
mbed_official 340:28d1f895c6fe 3220 * @retval None
mbed_official 340:28d1f895c6fe 3221 */
mbed_official 340:28d1f895c6fe 3222 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 3223 {
mbed_official 340:28d1f895c6fe 3224 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 340:28d1f895c6fe 3225
mbed_official 340:28d1f895c6fe 3226 /* Wait until STOP flag is set */
mbed_official 340:28d1f895c6fe 3227 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3228 {
mbed_official 340:28d1f895c6fe 3229 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3230 {
mbed_official 340:28d1f895c6fe 3231 /* Normal Use case, a AF is generated by master */
mbed_official 340:28d1f895c6fe 3232 /* to inform slave the end of transfer */
mbed_official 340:28d1f895c6fe 3233 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 3234 }
mbed_official 340:28d1f895c6fe 3235 else
mbed_official 340:28d1f895c6fe 3236 {
mbed_official 340:28d1f895c6fe 3237 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3238 }
mbed_official 340:28d1f895c6fe 3239 }
mbed_official 340:28d1f895c6fe 3240
mbed_official 340:28d1f895c6fe 3241 /* Clear STOP flag */
mbed_official 340:28d1f895c6fe 3242 __HAL_I2C_CLEAR_FLAG(hi2c,I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3243
mbed_official 340:28d1f895c6fe 3244 /* Wait until BUSY flag is reset */
mbed_official 340:28d1f895c6fe 3245 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK)
mbed_official 340:28d1f895c6fe 3246 {
mbed_official 340:28d1f895c6fe 3247 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3248 }
mbed_official 340:28d1f895c6fe 3249
mbed_official 340:28d1f895c6fe 3250 /* Disable DMA Request */
mbed_official 340:28d1f895c6fe 3251 hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
mbed_official 340:28d1f895c6fe 3252
mbed_official 340:28d1f895c6fe 3253 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3254
mbed_official 340:28d1f895c6fe 3255 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3256
mbed_official 340:28d1f895c6fe 3257 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3258 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3259 {
mbed_official 340:28d1f895c6fe 3260 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3261 }
mbed_official 340:28d1f895c6fe 3262 else
mbed_official 340:28d1f895c6fe 3263 {
mbed_official 340:28d1f895c6fe 3264 HAL_I2C_SlaveTxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 3265 }
mbed_official 340:28d1f895c6fe 3266 }
mbed_official 340:28d1f895c6fe 3267
mbed_official 340:28d1f895c6fe 3268 /**
mbed_official 340:28d1f895c6fe 3269 * @brief DMA I2C master receive process complete callback
mbed_official 340:28d1f895c6fe 3270 * @param hdma: DMA handle
mbed_official 340:28d1f895c6fe 3271 * @retval None
mbed_official 340:28d1f895c6fe 3272 */
mbed_official 340:28d1f895c6fe 3273 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 3274 {
mbed_official 340:28d1f895c6fe 3275 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 340:28d1f895c6fe 3276 uint16_t DevAddress;
mbed_official 340:28d1f895c6fe 3277
mbed_official 340:28d1f895c6fe 3278 /* Check if last DMA request was done with RELOAD */
mbed_official 340:28d1f895c6fe 3279 /* Set NBYTES to write and reload if size > 255 */
mbed_official 340:28d1f895c6fe 3280 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 3281 {
mbed_official 340:28d1f895c6fe 3282 /* Wait until TCR flag is set */
mbed_official 340:28d1f895c6fe 3283 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
mbed_official 340:28d1f895c6fe 3284 {
mbed_official 340:28d1f895c6fe 3285 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3286 }
mbed_official 340:28d1f895c6fe 3287
mbed_official 340:28d1f895c6fe 3288 /* Disable DMA Request */
mbed_official 340:28d1f895c6fe 3289 hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
mbed_official 340:28d1f895c6fe 3290
mbed_official 340:28d1f895c6fe 3291 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3292 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3293 {
mbed_official 340:28d1f895c6fe 3294 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3295 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3296 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3297 {
mbed_official 340:28d1f895c6fe 3298 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3299 {
mbed_official 340:28d1f895c6fe 3300 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3301 }
mbed_official 340:28d1f895c6fe 3302 else
mbed_official 340:28d1f895c6fe 3303 {
mbed_official 340:28d1f895c6fe 3304 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3305 }
mbed_official 340:28d1f895c6fe 3306 }
mbed_official 340:28d1f895c6fe 3307
mbed_official 340:28d1f895c6fe 3308 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3309 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3310
mbed_official 340:28d1f895c6fe 3311 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3312 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3313
mbed_official 340:28d1f895c6fe 3314 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3315
mbed_official 340:28d1f895c6fe 3316 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3317 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3318 }
mbed_official 340:28d1f895c6fe 3319 else
mbed_official 340:28d1f895c6fe 3320 {
mbed_official 340:28d1f895c6fe 3321 hi2c->pBuffPtr += hi2c->XferSize;
mbed_official 340:28d1f895c6fe 3322 hi2c->XferCount -= hi2c->XferSize;
mbed_official 340:28d1f895c6fe 3323 if(hi2c->XferCount > 255)
mbed_official 340:28d1f895c6fe 3324 {
mbed_official 340:28d1f895c6fe 3325 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 3326 }
mbed_official 340:28d1f895c6fe 3327 else
mbed_official 340:28d1f895c6fe 3328 {
mbed_official 340:28d1f895c6fe 3329 hi2c->XferSize = hi2c->XferCount;
mbed_official 340:28d1f895c6fe 3330 }
mbed_official 340:28d1f895c6fe 3331
mbed_official 340:28d1f895c6fe 3332 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
mbed_official 340:28d1f895c6fe 3333
mbed_official 340:28d1f895c6fe 3334 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 3335 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
mbed_official 340:28d1f895c6fe 3336
mbed_official 340:28d1f895c6fe 3337 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 3338 /* Set NBYTES to write and reload if size > 255 */
mbed_official 340:28d1f895c6fe 3339 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 3340 {
mbed_official 340:28d1f895c6fe 3341 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 3342 }
mbed_official 340:28d1f895c6fe 3343 else
mbed_official 340:28d1f895c6fe 3344 {
mbed_official 340:28d1f895c6fe 3345 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 3346 }
mbed_official 340:28d1f895c6fe 3347
mbed_official 340:28d1f895c6fe 3348 /* Wait until RXNE flag is set */
mbed_official 340:28d1f895c6fe 3349 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
mbed_official 340:28d1f895c6fe 3350 {
mbed_official 340:28d1f895c6fe 3351 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3352 }
mbed_official 340:28d1f895c6fe 3353
mbed_official 340:28d1f895c6fe 3354 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3355 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3356 {
mbed_official 340:28d1f895c6fe 3357 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3358 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3359 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3360 {
mbed_official 340:28d1f895c6fe 3361 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3362 {
mbed_official 340:28d1f895c6fe 3363 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3364 }
mbed_official 340:28d1f895c6fe 3365 else
mbed_official 340:28d1f895c6fe 3366 {
mbed_official 340:28d1f895c6fe 3367 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3368 }
mbed_official 340:28d1f895c6fe 3369 }
mbed_official 340:28d1f895c6fe 3370
mbed_official 340:28d1f895c6fe 3371 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3372 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3373
mbed_official 340:28d1f895c6fe 3374 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3375 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3376
mbed_official 340:28d1f895c6fe 3377 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3378
mbed_official 340:28d1f895c6fe 3379 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3380
mbed_official 340:28d1f895c6fe 3381 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3382 }
mbed_official 340:28d1f895c6fe 3383 else
mbed_official 340:28d1f895c6fe 3384 {
mbed_official 340:28d1f895c6fe 3385 /* Enable DMA Request */
mbed_official 340:28d1f895c6fe 3386 hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
mbed_official 340:28d1f895c6fe 3387 }
mbed_official 340:28d1f895c6fe 3388 }
mbed_official 340:28d1f895c6fe 3389 }
mbed_official 340:28d1f895c6fe 3390 else
mbed_official 340:28d1f895c6fe 3391 {
mbed_official 340:28d1f895c6fe 3392 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3393 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3394 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3395 {
mbed_official 340:28d1f895c6fe 3396 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3397 {
mbed_official 340:28d1f895c6fe 3398 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3399 }
mbed_official 340:28d1f895c6fe 3400 else
mbed_official 340:28d1f895c6fe 3401 {
mbed_official 340:28d1f895c6fe 3402 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3403 }
mbed_official 340:28d1f895c6fe 3404 }
mbed_official 340:28d1f895c6fe 3405
mbed_official 340:28d1f895c6fe 3406 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3407 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3408
mbed_official 340:28d1f895c6fe 3409 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3410 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3411
mbed_official 340:28d1f895c6fe 3412 /* Disable DMA Request */
mbed_official 340:28d1f895c6fe 3413 hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
mbed_official 340:28d1f895c6fe 3414
mbed_official 340:28d1f895c6fe 3415 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3416
mbed_official 340:28d1f895c6fe 3417 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3418
mbed_official 340:28d1f895c6fe 3419 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3420 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3421 {
mbed_official 340:28d1f895c6fe 3422 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3423 }
mbed_official 340:28d1f895c6fe 3424 else
mbed_official 340:28d1f895c6fe 3425 {
mbed_official 340:28d1f895c6fe 3426 HAL_I2C_MasterRxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 3427 }
mbed_official 340:28d1f895c6fe 3428 }
mbed_official 340:28d1f895c6fe 3429 }
mbed_official 340:28d1f895c6fe 3430
mbed_official 340:28d1f895c6fe 3431 /**
mbed_official 340:28d1f895c6fe 3432 * @brief DMA I2C slave receive process complete callback.
mbed_official 340:28d1f895c6fe 3433 * @param hdma: DMA handle
mbed_official 340:28d1f895c6fe 3434 * @retval None
mbed_official 340:28d1f895c6fe 3435 */
mbed_official 340:28d1f895c6fe 3436 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 3437 {
mbed_official 340:28d1f895c6fe 3438 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 340:28d1f895c6fe 3439
mbed_official 340:28d1f895c6fe 3440 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3441 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3442 {
mbed_official 340:28d1f895c6fe 3443 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3444 {
mbed_official 340:28d1f895c6fe 3445 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3446 }
mbed_official 340:28d1f895c6fe 3447 else
mbed_official 340:28d1f895c6fe 3448 {
mbed_official 340:28d1f895c6fe 3449 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3450 }
mbed_official 340:28d1f895c6fe 3451 }
mbed_official 340:28d1f895c6fe 3452
mbed_official 340:28d1f895c6fe 3453 /* Clear STOPF flag */
mbed_official 340:28d1f895c6fe 3454 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3455
mbed_official 340:28d1f895c6fe 3456 /* Wait until BUSY flag is reset */
mbed_official 340:28d1f895c6fe 3457 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY) != HAL_OK)
mbed_official 340:28d1f895c6fe 3458 {
mbed_official 340:28d1f895c6fe 3459 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3460 }
mbed_official 340:28d1f895c6fe 3461
mbed_official 340:28d1f895c6fe 3462 /* Disable DMA Request */
mbed_official 340:28d1f895c6fe 3463 hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
mbed_official 340:28d1f895c6fe 3464
mbed_official 340:28d1f895c6fe 3465 /* Disable Address Acknowledge */
mbed_official 340:28d1f895c6fe 3466 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 3467
mbed_official 340:28d1f895c6fe 3468 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3469
mbed_official 340:28d1f895c6fe 3470 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3471
mbed_official 340:28d1f895c6fe 3472 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3473 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3474 {
mbed_official 340:28d1f895c6fe 3475 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3476 }
mbed_official 340:28d1f895c6fe 3477 else
mbed_official 340:28d1f895c6fe 3478 {
mbed_official 340:28d1f895c6fe 3479 HAL_I2C_SlaveRxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 3480 }
mbed_official 340:28d1f895c6fe 3481 }
mbed_official 340:28d1f895c6fe 3482
mbed_official 340:28d1f895c6fe 3483 /**
mbed_official 340:28d1f895c6fe 3484 * @brief DMA I2C Memory Write process complete callback
mbed_official 340:28d1f895c6fe 3485 * @param hdma : DMA handle
mbed_official 340:28d1f895c6fe 3486 * @retval None
mbed_official 340:28d1f895c6fe 3487 */
mbed_official 340:28d1f895c6fe 3488 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 3489 {
mbed_official 340:28d1f895c6fe 3490 uint16_t DevAddress;
mbed_official 340:28d1f895c6fe 3491 I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 3492
mbed_official 340:28d1f895c6fe 3493 /* Check if last DMA request was done with RELOAD */
mbed_official 340:28d1f895c6fe 3494 /* Set NBYTES to write and reload if size > 255 */
mbed_official 340:28d1f895c6fe 3495 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 3496 {
mbed_official 340:28d1f895c6fe 3497 /* Wait until TCR flag is set */
mbed_official 340:28d1f895c6fe 3498 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
mbed_official 340:28d1f895c6fe 3499 {
mbed_official 340:28d1f895c6fe 3500 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3501 }
mbed_official 340:28d1f895c6fe 3502
mbed_official 340:28d1f895c6fe 3503 /* Disable DMA Request */
mbed_official 340:28d1f895c6fe 3504 hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
mbed_official 340:28d1f895c6fe 3505
mbed_official 340:28d1f895c6fe 3506 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3507 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3508 {
mbed_official 340:28d1f895c6fe 3509 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3510 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3511 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3512 {
mbed_official 340:28d1f895c6fe 3513 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3514 {
mbed_official 340:28d1f895c6fe 3515 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3516 }
mbed_official 340:28d1f895c6fe 3517 else
mbed_official 340:28d1f895c6fe 3518 {
mbed_official 340:28d1f895c6fe 3519 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3520 }
mbed_official 340:28d1f895c6fe 3521 }
mbed_official 340:28d1f895c6fe 3522
mbed_official 340:28d1f895c6fe 3523 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3524 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3525
mbed_official 340:28d1f895c6fe 3526 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3527 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3528
mbed_official 340:28d1f895c6fe 3529 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3530
mbed_official 340:28d1f895c6fe 3531 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3532 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3533 }
mbed_official 340:28d1f895c6fe 3534 else
mbed_official 340:28d1f895c6fe 3535 {
mbed_official 340:28d1f895c6fe 3536 hi2c->pBuffPtr += hi2c->XferSize;
mbed_official 340:28d1f895c6fe 3537 hi2c->XferCount -= hi2c->XferSize;
mbed_official 340:28d1f895c6fe 3538 if(hi2c->XferCount > 255)
mbed_official 340:28d1f895c6fe 3539 {
mbed_official 340:28d1f895c6fe 3540 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 3541 }
mbed_official 340:28d1f895c6fe 3542 else
mbed_official 340:28d1f895c6fe 3543 {
mbed_official 340:28d1f895c6fe 3544 hi2c->XferSize = hi2c->XferCount;
mbed_official 340:28d1f895c6fe 3545 }
mbed_official 340:28d1f895c6fe 3546
mbed_official 340:28d1f895c6fe 3547 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
mbed_official 340:28d1f895c6fe 3548
mbed_official 340:28d1f895c6fe 3549 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 3550 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
mbed_official 340:28d1f895c6fe 3551
mbed_official 340:28d1f895c6fe 3552 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 3553 /* Set NBYTES to write and reload if size > 255 */
mbed_official 340:28d1f895c6fe 3554 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 3555 {
mbed_official 340:28d1f895c6fe 3556 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 3557 }
mbed_official 340:28d1f895c6fe 3558 else
mbed_official 340:28d1f895c6fe 3559 {
mbed_official 340:28d1f895c6fe 3560 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 3561 }
mbed_official 340:28d1f895c6fe 3562
mbed_official 340:28d1f895c6fe 3563 /* Wait until TXIS flag is set */
mbed_official 340:28d1f895c6fe 3564 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c, I2C_TIMEOUT_TXIS) != HAL_OK)
mbed_official 340:28d1f895c6fe 3565 {
mbed_official 340:28d1f895c6fe 3566 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3567 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3568 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3569 {
mbed_official 340:28d1f895c6fe 3570 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3571 {
mbed_official 340:28d1f895c6fe 3572 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3573 }
mbed_official 340:28d1f895c6fe 3574 else
mbed_official 340:28d1f895c6fe 3575 {
mbed_official 340:28d1f895c6fe 3576 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3577 }
mbed_official 340:28d1f895c6fe 3578 }
mbed_official 340:28d1f895c6fe 3579
mbed_official 340:28d1f895c6fe 3580 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3581 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3582
mbed_official 340:28d1f895c6fe 3583 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3584 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3585
mbed_official 340:28d1f895c6fe 3586 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3587
mbed_official 340:28d1f895c6fe 3588 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3589 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3590 }
mbed_official 340:28d1f895c6fe 3591 else
mbed_official 340:28d1f895c6fe 3592 {
mbed_official 340:28d1f895c6fe 3593 /* Enable DMA Request */
mbed_official 340:28d1f895c6fe 3594 hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
mbed_official 340:28d1f895c6fe 3595 }
mbed_official 340:28d1f895c6fe 3596 }
mbed_official 340:28d1f895c6fe 3597 }
mbed_official 340:28d1f895c6fe 3598 else
mbed_official 340:28d1f895c6fe 3599 {
mbed_official 340:28d1f895c6fe 3600 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3601 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3602 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3603 {
mbed_official 340:28d1f895c6fe 3604 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3605 {
mbed_official 340:28d1f895c6fe 3606 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3607 }
mbed_official 340:28d1f895c6fe 3608 else
mbed_official 340:28d1f895c6fe 3609 {
mbed_official 340:28d1f895c6fe 3610 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3611 }
mbed_official 340:28d1f895c6fe 3612 }
mbed_official 340:28d1f895c6fe 3613
mbed_official 340:28d1f895c6fe 3614 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3615 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3616
mbed_official 340:28d1f895c6fe 3617 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3618 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3619
mbed_official 340:28d1f895c6fe 3620 /* Disable DMA Request */
mbed_official 340:28d1f895c6fe 3621 hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
mbed_official 340:28d1f895c6fe 3622
mbed_official 340:28d1f895c6fe 3623 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3624
mbed_official 340:28d1f895c6fe 3625 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3626
mbed_official 340:28d1f895c6fe 3627 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3628 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3629 {
mbed_official 340:28d1f895c6fe 3630 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3631 }
mbed_official 340:28d1f895c6fe 3632 else
mbed_official 340:28d1f895c6fe 3633 {
mbed_official 340:28d1f895c6fe 3634 HAL_I2C_MemTxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 3635 }
mbed_official 340:28d1f895c6fe 3636 }
mbed_official 340:28d1f895c6fe 3637 }
mbed_official 340:28d1f895c6fe 3638
mbed_official 340:28d1f895c6fe 3639 /**
mbed_official 340:28d1f895c6fe 3640 * @brief DMA I2C Memory Read process complete callback
mbed_official 340:28d1f895c6fe 3641 * @param hdma: DMA handle
mbed_official 340:28d1f895c6fe 3642 * @retval None
mbed_official 340:28d1f895c6fe 3643 */
mbed_official 340:28d1f895c6fe 3644 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 3645 {
mbed_official 340:28d1f895c6fe 3646 I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 3647 uint16_t DevAddress;
mbed_official 340:28d1f895c6fe 3648
mbed_official 340:28d1f895c6fe 3649 /* Check if last DMA request was done with RELOAD */
mbed_official 340:28d1f895c6fe 3650 /* Set NBYTES to write and reload if size > 255 */
mbed_official 340:28d1f895c6fe 3651 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 3652 {
mbed_official 340:28d1f895c6fe 3653 /* Wait until TCR flag is set */
mbed_official 340:28d1f895c6fe 3654 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, I2C_TIMEOUT_TCR) != HAL_OK)
mbed_official 340:28d1f895c6fe 3655 {
mbed_official 340:28d1f895c6fe 3656 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3657 }
mbed_official 340:28d1f895c6fe 3658
mbed_official 340:28d1f895c6fe 3659 /* Disable DMA Request */
mbed_official 340:28d1f895c6fe 3660 hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
mbed_official 340:28d1f895c6fe 3661
mbed_official 340:28d1f895c6fe 3662 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3663 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3664 {
mbed_official 340:28d1f895c6fe 3665 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3666 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3667 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3668 {
mbed_official 340:28d1f895c6fe 3669 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3670 {
mbed_official 340:28d1f895c6fe 3671 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3672 }
mbed_official 340:28d1f895c6fe 3673 else
mbed_official 340:28d1f895c6fe 3674 {
mbed_official 340:28d1f895c6fe 3675 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3676 }
mbed_official 340:28d1f895c6fe 3677 }
mbed_official 340:28d1f895c6fe 3678
mbed_official 340:28d1f895c6fe 3679 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3680 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3681
mbed_official 340:28d1f895c6fe 3682 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3683 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3684
mbed_official 340:28d1f895c6fe 3685 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3686
mbed_official 340:28d1f895c6fe 3687 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3688 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3689 }
mbed_official 340:28d1f895c6fe 3690 else
mbed_official 340:28d1f895c6fe 3691 {
mbed_official 340:28d1f895c6fe 3692 hi2c->pBuffPtr += hi2c->XferSize;
mbed_official 340:28d1f895c6fe 3693 hi2c->XferCount -= hi2c->XferSize;
mbed_official 340:28d1f895c6fe 3694 if(hi2c->XferCount > 255)
mbed_official 340:28d1f895c6fe 3695 {
mbed_official 340:28d1f895c6fe 3696 hi2c->XferSize = 255;
mbed_official 340:28d1f895c6fe 3697 }
mbed_official 340:28d1f895c6fe 3698 else
mbed_official 340:28d1f895c6fe 3699 {
mbed_official 340:28d1f895c6fe 3700 hi2c->XferSize = hi2c->XferCount;
mbed_official 340:28d1f895c6fe 3701 }
mbed_official 340:28d1f895c6fe 3702
mbed_official 340:28d1f895c6fe 3703 DevAddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
mbed_official 340:28d1f895c6fe 3704
mbed_official 340:28d1f895c6fe 3705 /* Enable the DMA channel */
mbed_official 340:28d1f895c6fe 3706 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
mbed_official 340:28d1f895c6fe 3707
mbed_official 340:28d1f895c6fe 3708 /* Send Slave Address */
mbed_official 340:28d1f895c6fe 3709 /* Set NBYTES to write and reload if size > 255 */
mbed_official 340:28d1f895c6fe 3710 if( (hi2c->XferSize == 255) && (hi2c->XferSize < hi2c->XferCount) )
mbed_official 340:28d1f895c6fe 3711 {
mbed_official 340:28d1f895c6fe 3712 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 3713 }
mbed_official 340:28d1f895c6fe 3714 else
mbed_official 340:28d1f895c6fe 3715 {
mbed_official 340:28d1f895c6fe 3716 I2C_TransferConfig(hi2c,DevAddress,hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
mbed_official 340:28d1f895c6fe 3717 }
mbed_official 340:28d1f895c6fe 3718
mbed_official 340:28d1f895c6fe 3719 /* Wait until RXNE flag is set */
mbed_official 340:28d1f895c6fe 3720 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, I2C_TIMEOUT_RXNE) != HAL_OK)
mbed_official 340:28d1f895c6fe 3721 {
mbed_official 340:28d1f895c6fe 3722 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3723 }
mbed_official 340:28d1f895c6fe 3724
mbed_official 340:28d1f895c6fe 3725 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3726 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3727 {
mbed_official 340:28d1f895c6fe 3728 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3729 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3730 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3731 {
mbed_official 340:28d1f895c6fe 3732 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3733 {
mbed_official 340:28d1f895c6fe 3734 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3735 }
mbed_official 340:28d1f895c6fe 3736 else
mbed_official 340:28d1f895c6fe 3737 {
mbed_official 340:28d1f895c6fe 3738 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3739 }
mbed_official 340:28d1f895c6fe 3740 }
mbed_official 340:28d1f895c6fe 3741
mbed_official 340:28d1f895c6fe 3742 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3743 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3744
mbed_official 340:28d1f895c6fe 3745 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3746 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3747
mbed_official 340:28d1f895c6fe 3748 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3749
mbed_official 340:28d1f895c6fe 3750 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3751 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3752 }
mbed_official 340:28d1f895c6fe 3753 else
mbed_official 340:28d1f895c6fe 3754 {
mbed_official 340:28d1f895c6fe 3755 /* Enable DMA Request */
mbed_official 340:28d1f895c6fe 3756 hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
mbed_official 340:28d1f895c6fe 3757 }
mbed_official 340:28d1f895c6fe 3758 }
mbed_official 340:28d1f895c6fe 3759 }
mbed_official 340:28d1f895c6fe 3760 else
mbed_official 340:28d1f895c6fe 3761 {
mbed_official 340:28d1f895c6fe 3762 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
mbed_official 340:28d1f895c6fe 3763 /* Wait until STOPF flag is reset */
mbed_official 340:28d1f895c6fe 3764 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_STOPF) != HAL_OK)
mbed_official 340:28d1f895c6fe 3765 {
mbed_official 340:28d1f895c6fe 3766 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
mbed_official 340:28d1f895c6fe 3767 {
mbed_official 340:28d1f895c6fe 3768 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 3769 }
mbed_official 340:28d1f895c6fe 3770 else
mbed_official 340:28d1f895c6fe 3771 {
mbed_official 340:28d1f895c6fe 3772 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3773 }
mbed_official 340:28d1f895c6fe 3774 }
mbed_official 340:28d1f895c6fe 3775
mbed_official 340:28d1f895c6fe 3776 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3777 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3778
mbed_official 340:28d1f895c6fe 3779 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3780 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3781
mbed_official 340:28d1f895c6fe 3782 /* Disable DMA Request */
mbed_official 340:28d1f895c6fe 3783 hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
mbed_official 340:28d1f895c6fe 3784
mbed_official 340:28d1f895c6fe 3785 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3786
mbed_official 340:28d1f895c6fe 3787 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3788
mbed_official 340:28d1f895c6fe 3789 /* Check if Errors has been detected during transfer */
mbed_official 340:28d1f895c6fe 3790 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
mbed_official 340:28d1f895c6fe 3791 {
mbed_official 340:28d1f895c6fe 3792 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3793 }
mbed_official 340:28d1f895c6fe 3794 else
mbed_official 340:28d1f895c6fe 3795 {
mbed_official 340:28d1f895c6fe 3796 HAL_I2C_MemRxCpltCallback(hi2c);
mbed_official 340:28d1f895c6fe 3797 }
mbed_official 340:28d1f895c6fe 3798 }
mbed_official 340:28d1f895c6fe 3799 }
mbed_official 340:28d1f895c6fe 3800
mbed_official 340:28d1f895c6fe 3801 /**
mbed_official 340:28d1f895c6fe 3802 * @brief DMA I2C communication error callback.
mbed_official 340:28d1f895c6fe 3803 * @param hdma : DMA handle
mbed_official 340:28d1f895c6fe 3804 * @retval None
mbed_official 340:28d1f895c6fe 3805 */
mbed_official 340:28d1f895c6fe 3806 static void I2C_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 3807 {
mbed_official 340:28d1f895c6fe 3808 I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 3809
mbed_official 340:28d1f895c6fe 3810 /* Disable Acknowledge */
mbed_official 340:28d1f895c6fe 3811 hi2c->Instance->CR2 |= I2C_CR2_NACK;
mbed_official 340:28d1f895c6fe 3812
mbed_official 340:28d1f895c6fe 3813 hi2c->XferCount = 0;
mbed_official 340:28d1f895c6fe 3814
mbed_official 340:28d1f895c6fe 3815 hi2c->State = HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3816
mbed_official 340:28d1f895c6fe 3817 hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
mbed_official 340:28d1f895c6fe 3818
mbed_official 340:28d1f895c6fe 3819 HAL_I2C_ErrorCallback(hi2c);
mbed_official 340:28d1f895c6fe 3820 }
mbed_official 340:28d1f895c6fe 3821
mbed_official 340:28d1f895c6fe 3822 /**
mbed_official 340:28d1f895c6fe 3823 * @brief This function handles I2C Communication Timeout.
mbed_official 340:28d1f895c6fe 3824 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 3825 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 3826 * @param Flag: specifies the I2C flag to check.
mbed_official 340:28d1f895c6fe 3827 * @param Status: The new Flag status (SET or RESET).
mbed_official 340:28d1f895c6fe 3828 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 3829 * @retval HAL status
mbed_official 340:28d1f895c6fe 3830 */
mbed_official 340:28d1f895c6fe 3831 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 3832 {
mbed_official 340:28d1f895c6fe 3833 uint32_t tickstart = HAL_GetTick();
mbed_official 340:28d1f895c6fe 3834
mbed_official 340:28d1f895c6fe 3835 /* Wait until flag is set */
mbed_official 340:28d1f895c6fe 3836 if(Status == RESET)
mbed_official 340:28d1f895c6fe 3837 {
mbed_official 340:28d1f895c6fe 3838 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
mbed_official 340:28d1f895c6fe 3839 {
mbed_official 340:28d1f895c6fe 3840 /* Check for the Timeout */
mbed_official 340:28d1f895c6fe 3841 if(Timeout != HAL_MAX_DELAY)
mbed_official 340:28d1f895c6fe 3842 {
mbed_official 340:28d1f895c6fe 3843 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 3844 {
mbed_official 340:28d1f895c6fe 3845 hi2c->State= HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3846 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 3847 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 3848 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 3849 }
mbed_official 340:28d1f895c6fe 3850 }
mbed_official 340:28d1f895c6fe 3851 }
mbed_official 340:28d1f895c6fe 3852 }
mbed_official 340:28d1f895c6fe 3853 else
mbed_official 340:28d1f895c6fe 3854 {
mbed_official 340:28d1f895c6fe 3855 while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
mbed_official 340:28d1f895c6fe 3856 {
mbed_official 340:28d1f895c6fe 3857 /* Check for the Timeout */
mbed_official 340:28d1f895c6fe 3858 if(Timeout != HAL_MAX_DELAY)
mbed_official 340:28d1f895c6fe 3859 {
mbed_official 340:28d1f895c6fe 3860 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 3861 {
mbed_official 340:28d1f895c6fe 3862 hi2c->State= HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3863 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 3864 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 3865 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 3866 }
mbed_official 340:28d1f895c6fe 3867 }
mbed_official 340:28d1f895c6fe 3868 }
mbed_official 340:28d1f895c6fe 3869 }
mbed_official 340:28d1f895c6fe 3870 return HAL_OK;
mbed_official 340:28d1f895c6fe 3871 }
mbed_official 340:28d1f895c6fe 3872
mbed_official 340:28d1f895c6fe 3873 /**
mbed_official 340:28d1f895c6fe 3874 * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag.
mbed_official 340:28d1f895c6fe 3875 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 3876 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 3877 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 3878 * @retval HAL status
mbed_official 340:28d1f895c6fe 3879 */
mbed_official 340:28d1f895c6fe 3880 static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 3881 {
mbed_official 340:28d1f895c6fe 3882 uint32_t tickstart = HAL_GetTick();
mbed_official 340:28d1f895c6fe 3883
mbed_official 340:28d1f895c6fe 3884 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
mbed_official 340:28d1f895c6fe 3885 {
mbed_official 340:28d1f895c6fe 3886 /* Check if a NACK is detected */
mbed_official 340:28d1f895c6fe 3887 if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 3888 {
mbed_official 340:28d1f895c6fe 3889 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 3890 }
mbed_official 340:28d1f895c6fe 3891
mbed_official 340:28d1f895c6fe 3892 /* Check for the Timeout */
mbed_official 340:28d1f895c6fe 3893 if(Timeout != HAL_MAX_DELAY)
mbed_official 340:28d1f895c6fe 3894 {
mbed_official 340:28d1f895c6fe 3895 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 3896 {
mbed_official 340:28d1f895c6fe 3897 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3898 hi2c->State= HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3899
mbed_official 340:28d1f895c6fe 3900 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 3901 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 3902
mbed_official 340:28d1f895c6fe 3903 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 3904 }
mbed_official 340:28d1f895c6fe 3905 }
mbed_official 340:28d1f895c6fe 3906 }
mbed_official 340:28d1f895c6fe 3907 return HAL_OK;
mbed_official 340:28d1f895c6fe 3908 }
mbed_official 340:28d1f895c6fe 3909
mbed_official 340:28d1f895c6fe 3910 /**
mbed_official 340:28d1f895c6fe 3911 * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
mbed_official 340:28d1f895c6fe 3912 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 3913 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 3914 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 3915 * @retval HAL status
mbed_official 340:28d1f895c6fe 3916 */
mbed_official 340:28d1f895c6fe 3917 static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 3918 {
mbed_official 340:28d1f895c6fe 3919 uint32_t tickstart = 0x00;
mbed_official 340:28d1f895c6fe 3920 tickstart = HAL_GetTick();
mbed_official 340:28d1f895c6fe 3921
mbed_official 340:28d1f895c6fe 3922 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
mbed_official 340:28d1f895c6fe 3923 {
mbed_official 340:28d1f895c6fe 3924 /* Check if a NACK is detected */
mbed_official 340:28d1f895c6fe 3925 if(I2C_IsAcknowledgeFailed(hi2c, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 3926 {
mbed_official 340:28d1f895c6fe 3927 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 3928 }
mbed_official 340:28d1f895c6fe 3929
mbed_official 340:28d1f895c6fe 3930 /* Check for the Timeout */
mbed_official 340:28d1f895c6fe 3931 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 3932 {
mbed_official 340:28d1f895c6fe 3933 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3934 hi2c->State= HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3935
mbed_official 340:28d1f895c6fe 3936 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 3937 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 3938
mbed_official 340:28d1f895c6fe 3939 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 3940 }
mbed_official 340:28d1f895c6fe 3941 }
mbed_official 340:28d1f895c6fe 3942 return HAL_OK;
mbed_official 340:28d1f895c6fe 3943 }
mbed_official 340:28d1f895c6fe 3944
mbed_official 340:28d1f895c6fe 3945 /**
mbed_official 340:28d1f895c6fe 3946 * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
mbed_official 340:28d1f895c6fe 3947 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 3948 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 3949 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 3950 * @retval HAL status
mbed_official 340:28d1f895c6fe 3951 */
mbed_official 340:28d1f895c6fe 3952 static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 3953 {
mbed_official 340:28d1f895c6fe 3954 uint32_t tickstart = 0x00;
mbed_official 340:28d1f895c6fe 3955 tickstart = HAL_GetTick();
mbed_official 340:28d1f895c6fe 3956
mbed_official 340:28d1f895c6fe 3957 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
mbed_official 340:28d1f895c6fe 3958 {
mbed_official 340:28d1f895c6fe 3959 /* Check if a STOPF is detected */
mbed_official 340:28d1f895c6fe 3960 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
mbed_official 340:28d1f895c6fe 3961 {
mbed_official 340:28d1f895c6fe 3962 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 3963 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 3964
mbed_official 340:28d1f895c6fe 3965 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 3966 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 3967
mbed_official 340:28d1f895c6fe 3968 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
mbed_official 340:28d1f895c6fe 3969 hi2c->State= HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3970
mbed_official 340:28d1f895c6fe 3971 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 3972 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 3973
mbed_official 340:28d1f895c6fe 3974 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 3975 }
mbed_official 340:28d1f895c6fe 3976
mbed_official 340:28d1f895c6fe 3977 /* Check for the Timeout */
mbed_official 340:28d1f895c6fe 3978 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 3979 {
mbed_official 340:28d1f895c6fe 3980 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
mbed_official 340:28d1f895c6fe 3981 hi2c->State= HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 3982
mbed_official 340:28d1f895c6fe 3983 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 3984 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 3985
mbed_official 340:28d1f895c6fe 3986 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 3987 }
mbed_official 340:28d1f895c6fe 3988 }
mbed_official 340:28d1f895c6fe 3989 return HAL_OK;
mbed_official 340:28d1f895c6fe 3990 }
mbed_official 340:28d1f895c6fe 3991
mbed_official 340:28d1f895c6fe 3992 /**
mbed_official 340:28d1f895c6fe 3993 * @brief This function handles Acknowledge failed detection during an I2C Communication.
mbed_official 340:28d1f895c6fe 3994 * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 3995 * the configuration information for the specified I2C.
mbed_official 340:28d1f895c6fe 3996 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 3997 * @retval HAL status
mbed_official 340:28d1f895c6fe 3998 */
mbed_official 340:28d1f895c6fe 3999 static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 4000 {
mbed_official 340:28d1f895c6fe 4001 uint32_t tickstart = 0x00;
mbed_official 340:28d1f895c6fe 4002 tickstart = HAL_GetTick();
mbed_official 340:28d1f895c6fe 4003
mbed_official 340:28d1f895c6fe 4004 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
mbed_official 340:28d1f895c6fe 4005 {
mbed_official 340:28d1f895c6fe 4006 /* Generate stop if necessary only in case of I2C peripheral in MASTER mode */
mbed_official 340:28d1f895c6fe 4007 if((hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
mbed_official 340:28d1f895c6fe 4008 || (hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX))
mbed_official 340:28d1f895c6fe 4009 {
mbed_official 340:28d1f895c6fe 4010 /* No need to generate the STOP condition if AUTOEND mode is enabled */
mbed_official 340:28d1f895c6fe 4011 /* Generate the STOP condition only in case of SOFTEND mode is enabled */
mbed_official 340:28d1f895c6fe 4012 if((hi2c->Instance->CR2 & I2C_AUTOEND_MODE) != I2C_AUTOEND_MODE)
mbed_official 340:28d1f895c6fe 4013 {
mbed_official 340:28d1f895c6fe 4014 /* Generate Stop */
mbed_official 340:28d1f895c6fe 4015 hi2c->Instance->CR2 |= I2C_CR2_STOP;
mbed_official 340:28d1f895c6fe 4016 }
mbed_official 340:28d1f895c6fe 4017 }
mbed_official 340:28d1f895c6fe 4018
mbed_official 340:28d1f895c6fe 4019 /* Wait until STOP Flag is reset */
mbed_official 340:28d1f895c6fe 4020 /* AutoEnd should be initiate after AF */
mbed_official 340:28d1f895c6fe 4021 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
mbed_official 340:28d1f895c6fe 4022 {
mbed_official 340:28d1f895c6fe 4023 /* Check for the Timeout */
mbed_official 340:28d1f895c6fe 4024 if(Timeout != HAL_MAX_DELAY)
mbed_official 340:28d1f895c6fe 4025 {
mbed_official 340:28d1f895c6fe 4026 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 4027 {
mbed_official 340:28d1f895c6fe 4028 hi2c->State= HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 4029 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 4030 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 4031 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 4032 }
mbed_official 340:28d1f895c6fe 4033 }
mbed_official 340:28d1f895c6fe 4034 }
mbed_official 340:28d1f895c6fe 4035
mbed_official 340:28d1f895c6fe 4036 /* Clear NACKF Flag */
mbed_official 340:28d1f895c6fe 4037 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
mbed_official 340:28d1f895c6fe 4038
mbed_official 340:28d1f895c6fe 4039 /* Clear STOP Flag */
mbed_official 340:28d1f895c6fe 4040 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
mbed_official 340:28d1f895c6fe 4041
mbed_official 340:28d1f895c6fe 4042 /* Clear Configuration Register 2 */
mbed_official 630:825f75ca301e 4043 I2C_RESET_CR2(hi2c);
mbed_official 340:28d1f895c6fe 4044
mbed_official 340:28d1f895c6fe 4045 hi2c->ErrorCode = HAL_I2C_ERROR_AF;
mbed_official 340:28d1f895c6fe 4046 hi2c->State= HAL_I2C_STATE_READY;
mbed_official 340:28d1f895c6fe 4047
mbed_official 340:28d1f895c6fe 4048 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 4049 __HAL_UNLOCK(hi2c);
mbed_official 340:28d1f895c6fe 4050
mbed_official 340:28d1f895c6fe 4051 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 4052 }
mbed_official 340:28d1f895c6fe 4053 return HAL_OK;
mbed_official 340:28d1f895c6fe 4054 }
mbed_official 340:28d1f895c6fe 4055
mbed_official 340:28d1f895c6fe 4056 /**
mbed_official 340:28d1f895c6fe 4057 * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
mbed_official 340:28d1f895c6fe 4058 * @param hi2c: I2C handle.
mbed_official 340:28d1f895c6fe 4059 * @param DevAddress: specifies the slave address to be programmed.
mbed_official 340:28d1f895c6fe 4060 * @param Size: specifies the number of bytes to be programmed.
mbed_official 340:28d1f895c6fe 4061 * This parameter must be a value between 0 and 255.
mbed_official 340:28d1f895c6fe 4062 * @param Mode: new state of the I2C START condition generation.
mbed_official 340:28d1f895c6fe 4063 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 4064 * @arg I2C_RELOAD_MODE: Enable Reload mode .
mbed_official 340:28d1f895c6fe 4065 * @arg I2C_AUTOEND_MODE: Enable Automatic end mode.
mbed_official 340:28d1f895c6fe 4066 * @arg I2C_SOFTEND_MODE: Enable Software end mode.
mbed_official 340:28d1f895c6fe 4067 * @param Request: new state of the I2C START condition generation.
mbed_official 340:28d1f895c6fe 4068 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 4069 * @arg I2C_NO_STARTSTOP: Don't Generate stop and start condition.
mbed_official 340:28d1f895c6fe 4070 * @arg I2C_GENERATE_STOP: Generate stop condition (Size should be set to 0).
mbed_official 340:28d1f895c6fe 4071 * @arg I2C_GENERATE_START_READ: Generate Restart for read request.
mbed_official 340:28d1f895c6fe 4072 * @arg I2C_GENERATE_START_WRITE: Generate Restart for write request.
mbed_official 340:28d1f895c6fe 4073 * @retval None
mbed_official 340:28d1f895c6fe 4074 */
mbed_official 340:28d1f895c6fe 4075 static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
mbed_official 340:28d1f895c6fe 4076 {
mbed_official 340:28d1f895c6fe 4077 uint32_t tmpreg = 0;
mbed_official 340:28d1f895c6fe 4078
mbed_official 340:28d1f895c6fe 4079 /* Check the parameters */
mbed_official 340:28d1f895c6fe 4080 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
mbed_official 340:28d1f895c6fe 4081 assert_param(IS_TRANSFER_MODE(Mode));
mbed_official 340:28d1f895c6fe 4082 assert_param(IS_TRANSFER_REQUEST(Request));
mbed_official 340:28d1f895c6fe 4083
mbed_official 340:28d1f895c6fe 4084 /* Get the CR2 register value */
mbed_official 340:28d1f895c6fe 4085 tmpreg = hi2c->Instance->CR2;
mbed_official 340:28d1f895c6fe 4086
mbed_official 340:28d1f895c6fe 4087 /* clear tmpreg specific bits */
mbed_official 340:28d1f895c6fe 4088 tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP));
mbed_official 340:28d1f895c6fe 4089
mbed_official 340:28d1f895c6fe 4090 /* update tmpreg */
mbed_official 340:28d1f895c6fe 4091 tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \
mbed_official 340:28d1f895c6fe 4092 (uint32_t)Mode | (uint32_t)Request);
mbed_official 340:28d1f895c6fe 4093
mbed_official 340:28d1f895c6fe 4094 /* update CR2 register */
mbed_official 340:28d1f895c6fe 4095 hi2c->Instance->CR2 = tmpreg;
mbed_official 340:28d1f895c6fe 4096 }
mbed_official 340:28d1f895c6fe 4097
mbed_official 340:28d1f895c6fe 4098 /**
mbed_official 340:28d1f895c6fe 4099 * @}
mbed_official 340:28d1f895c6fe 4100 */
mbed_official 340:28d1f895c6fe 4101
mbed_official 340:28d1f895c6fe 4102 #endif /* HAL_I2C_MODULE_ENABLED */
mbed_official 340:28d1f895c6fe 4103 /**
mbed_official 340:28d1f895c6fe 4104 * @}
mbed_official 340:28d1f895c6fe 4105 */
mbed_official 340:28d1f895c6fe 4106
mbed_official 340:28d1f895c6fe 4107 /**
mbed_official 340:28d1f895c6fe 4108 * @}
mbed_official 340:28d1f895c6fe 4109 */
mbed_official 340:28d1f895c6fe 4110
mbed_official 340:28d1f895c6fe 4111 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/