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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_tim_ex.c@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 610:813dcc80987e 1 /**
mbed_official 610:813dcc80987e 2 ******************************************************************************
mbed_official 610:813dcc80987e 3 * @file stm32l4xx_hal_tim_ex.c
mbed_official 610:813dcc80987e 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.0
mbed_official 610:813dcc80987e 6 * @date 26-June-2015
mbed_official 610:813dcc80987e 7 * @brief TIM HAL module driver.
mbed_official 610:813dcc80987e 8 * This file provides firmware functions to manage the following
mbed_official 610:813dcc80987e 9 * functionalities of the Timer Extended peripheral:
mbed_official 610:813dcc80987e 10 * + Time Hall Sensor Interface Initialization
mbed_official 610:813dcc80987e 11 * + Time Hall Sensor Interface Start
mbed_official 610:813dcc80987e 12 * + Time Complementary signal break and dead time configuration
mbed_official 610:813dcc80987e 13 * + Time Master and Slave synchronization configuration
mbed_official 610:813dcc80987e 14 * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
mbed_official 610:813dcc80987e 15 * + Time OCRef clear configuration
mbed_official 610:813dcc80987e 16 * + Timer remapping capabilities configuration
mbed_official 610:813dcc80987e 17 @verbatim
mbed_official 610:813dcc80987e 18 ==============================================================================
mbed_official 610:813dcc80987e 19 ##### TIMER Extended features #####
mbed_official 610:813dcc80987e 20 ==============================================================================
mbed_official 610:813dcc80987e 21 [..]
mbed_official 610:813dcc80987e 22 The Timer Extended features include:
mbed_official 610:813dcc80987e 23 (#) Complementary outputs with programmable dead-time for :
mbed_official 610:813dcc80987e 24 (++) Output Compare
mbed_official 610:813dcc80987e 25 (++) PWM generation (Edge and Center-aligned Mode)
mbed_official 610:813dcc80987e 26 (++) One-pulse mode output
mbed_official 610:813dcc80987e 27 (#) Synchronization circuit to control the timer with external signals and to
mbed_official 610:813dcc80987e 28 interconnect several timers together.
mbed_official 610:813dcc80987e 29 (#) Break input to put the timer output signals in reset state or in a known state.
mbed_official 610:813dcc80987e 30 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
mbed_official 610:813dcc80987e 31 positioning purposes
mbed_official 610:813dcc80987e 32
mbed_official 610:813dcc80987e 33 ##### How to use this driver #####
mbed_official 610:813dcc80987e 34 ==============================================================================
mbed_official 610:813dcc80987e 35 [..]
mbed_official 610:813dcc80987e 36 (#) Initialize the TIM low level resources by implementing the following functions
mbed_official 610:813dcc80987e 37 depending on the selected feature:
mbed_official 610:813dcc80987e 38 (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
mbed_official 610:813dcc80987e 39
mbed_official 610:813dcc80987e 40 (#) Initialize the TIM low level resources :
mbed_official 610:813dcc80987e 41 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
mbed_official 610:813dcc80987e 42 (##) TIM pins configuration
mbed_official 610:813dcc80987e 43 (+++) Enable the clock for the TIM GPIOs using the following function:
mbed_official 610:813dcc80987e 44 __HAL_RCC_GPIOx_CLK_ENABLE();
mbed_official 610:813dcc80987e 45 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
mbed_official 610:813dcc80987e 46
mbed_official 610:813dcc80987e 47 (#) The external Clock can be configured, if needed (the default clock is the
mbed_official 610:813dcc80987e 48 internal clock from the APBx), using the following function:
mbed_official 610:813dcc80987e 49 HAL_TIM_ConfigClockSource, the clock configuration should be done before
mbed_official 610:813dcc80987e 50 any start function.
mbed_official 610:813dcc80987e 51
mbed_official 610:813dcc80987e 52 (#) Configure the TIM in the desired functioning mode using one of the
mbed_official 610:813dcc80987e 53 initialization function of this driver:
mbed_official 610:813dcc80987e 54 (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutationEvent(): to use the
mbed_official 610:813dcc80987e 55 Timer Hall Sensor Interface and the commutation event with the corresponding
mbed_official 610:813dcc80987e 56 Interrupt and DMA request if needed (Note that One Timer is used to interface
mbed_official 610:813dcc80987e 57 with the Hall sensor Interface and another Timer should be used to use
mbed_official 610:813dcc80987e 58 the commutation event).
mbed_official 610:813dcc80987e 59
mbed_official 610:813dcc80987e 60 (#) Activate the TIM peripheral using one of the start functions:
mbed_official 610:813dcc80987e 61 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT()
mbed_official 610:813dcc80987e 62 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
mbed_official 610:813dcc80987e 63 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
mbed_official 610:813dcc80987e 64 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
mbed_official 610:813dcc80987e 65
mbed_official 610:813dcc80987e 66
mbed_official 610:813dcc80987e 67 @endverbatim
mbed_official 610:813dcc80987e 68 ******************************************************************************
mbed_official 610:813dcc80987e 69 * @attention
mbed_official 610:813dcc80987e 70 *
mbed_official 610:813dcc80987e 71 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 610:813dcc80987e 72 *
mbed_official 610:813dcc80987e 73 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 610:813dcc80987e 74 * are permitted provided that the following conditions are met:
mbed_official 610:813dcc80987e 75 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 610:813dcc80987e 76 * this list of conditions and the following disclaimer.
mbed_official 610:813dcc80987e 77 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 610:813dcc80987e 78 * this list of conditions and the following disclaimer in the documentation
mbed_official 610:813dcc80987e 79 * and/or other materials provided with the distribution.
mbed_official 610:813dcc80987e 80 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 610:813dcc80987e 81 * may be used to endorse or promote products derived from this software
mbed_official 610:813dcc80987e 82 * without specific prior written permission.
mbed_official 610:813dcc80987e 83 *
mbed_official 610:813dcc80987e 84 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 610:813dcc80987e 85 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 610:813dcc80987e 86 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 610:813dcc80987e 87 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 610:813dcc80987e 88 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 610:813dcc80987e 89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 610:813dcc80987e 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 610:813dcc80987e 91 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 610:813dcc80987e 92 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 610:813dcc80987e 93 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 610:813dcc80987e 94 *
mbed_official 610:813dcc80987e 95 ******************************************************************************
mbed_official 610:813dcc80987e 96 */
mbed_official 610:813dcc80987e 97
mbed_official 610:813dcc80987e 98 /* Includes ------------------------------------------------------------------*/
mbed_official 610:813dcc80987e 99 #include "stm32l4xx_hal.h"
mbed_official 610:813dcc80987e 100
mbed_official 610:813dcc80987e 101 /** @addtogroup STM32L4xx_HAL_Driver
mbed_official 610:813dcc80987e 102 * @{
mbed_official 610:813dcc80987e 103 */
mbed_official 610:813dcc80987e 104
mbed_official 610:813dcc80987e 105 /** @defgroup TIMEx TIMEx
mbed_official 610:813dcc80987e 106 * @brief TIM Extended HAL module driver
mbed_official 610:813dcc80987e 107 * @{
mbed_official 610:813dcc80987e 108 */
mbed_official 610:813dcc80987e 109
mbed_official 610:813dcc80987e 110 #ifdef HAL_TIM_MODULE_ENABLED
mbed_official 610:813dcc80987e 111
mbed_official 610:813dcc80987e 112 /* Private typedef -----------------------------------------------------------*/
mbed_official 610:813dcc80987e 113 /* Private define ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 114 #define BDTR_BKF_SHIFT (16)
mbed_official 610:813dcc80987e 115 #define BDTR_BK2F_SHIFT (20)
mbed_official 610:813dcc80987e 116 #define TIMx_ETRSEL_MASK ((uint32_t)0x0001C000)
mbed_official 610:813dcc80987e 117
mbed_official 610:813dcc80987e 118 /* Private macro -------------------------------------------------------------*/
mbed_official 610:813dcc80987e 119 /* Private variables ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 120 /* Private function prototypes -----------------------------------------------*/
mbed_official 610:813dcc80987e 121 static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx,
mbed_official 610:813dcc80987e 122 TIM_OC_InitTypeDef *OC_Config);
mbed_official 610:813dcc80987e 123
mbed_official 610:813dcc80987e 124 static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx,
mbed_official 610:813dcc80987e 125 TIM_OC_InitTypeDef *OC_Config);
mbed_official 610:813dcc80987e 126
mbed_official 610:813dcc80987e 127 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState);
mbed_official 610:813dcc80987e 128
mbed_official 610:813dcc80987e 129 /* Private functions ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 130 /**
mbed_official 610:813dcc80987e 131 * @brief Timer Ouput Compare 5 configuration
mbed_official 610:813dcc80987e 132 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 133 * @param OC_Config: The ouput configuration structure
mbed_official 610:813dcc80987e 134 * @retval None
mbed_official 610:813dcc80987e 135 */
mbed_official 610:813dcc80987e 136 static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx,
mbed_official 610:813dcc80987e 137 TIM_OC_InitTypeDef *OC_Config)
mbed_official 610:813dcc80987e 138 {
mbed_official 610:813dcc80987e 139 uint32_t tmpccmrx = 0;
mbed_official 610:813dcc80987e 140 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 141 uint32_t tmpcr2 = 0;
mbed_official 610:813dcc80987e 142
mbed_official 610:813dcc80987e 143 /* Disable the output: Reset the CCxE Bit */
mbed_official 610:813dcc80987e 144 TIMx->CCER &= ~TIM_CCER_CC5E;
mbed_official 610:813dcc80987e 145
mbed_official 610:813dcc80987e 146 /* Get the TIMx CCER register value */
mbed_official 610:813dcc80987e 147 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 148 /* Get the TIMx CR2 register value */
mbed_official 610:813dcc80987e 149 tmpcr2 = TIMx->CR2;
mbed_official 610:813dcc80987e 150 /* Get the TIMx CCMR1 register value */
mbed_official 610:813dcc80987e 151 tmpccmrx = TIMx->CCMR3;
mbed_official 610:813dcc80987e 152
mbed_official 610:813dcc80987e 153 /* Reset the Output Compare Mode Bits */
mbed_official 610:813dcc80987e 154 tmpccmrx &= ~(TIM_CCMR3_OC5M);
mbed_official 610:813dcc80987e 155 /* Select the Output Compare Mode */
mbed_official 610:813dcc80987e 156 tmpccmrx |= OC_Config->OCMode;
mbed_official 610:813dcc80987e 157
mbed_official 610:813dcc80987e 158 /* Reset the Output Polarity level */
mbed_official 610:813dcc80987e 159 tmpccer &= ~TIM_CCER_CC5P;
mbed_official 610:813dcc80987e 160 /* Set the Output Compare Polarity */
mbed_official 610:813dcc80987e 161 tmpccer |= (OC_Config->OCPolarity << 16);
mbed_official 610:813dcc80987e 162
mbed_official 610:813dcc80987e 163 if(IS_TIM_BREAK_INSTANCE(TIMx))
mbed_official 610:813dcc80987e 164 {
mbed_official 610:813dcc80987e 165 /* Reset the Output Compare IDLE State */
mbed_official 610:813dcc80987e 166 tmpcr2 &= ~TIM_CR2_OIS5;
mbed_official 610:813dcc80987e 167 /* Set the Output Idle state */
mbed_official 610:813dcc80987e 168 tmpcr2 |= (OC_Config->OCIdleState << 8);
mbed_official 610:813dcc80987e 169 }
mbed_official 610:813dcc80987e 170 /* Write to TIMx CR2 */
mbed_official 610:813dcc80987e 171 TIMx->CR2 = tmpcr2;
mbed_official 610:813dcc80987e 172
mbed_official 610:813dcc80987e 173 /* Write to TIMx CCMR3 */
mbed_official 610:813dcc80987e 174 TIMx->CCMR3 = tmpccmrx;
mbed_official 610:813dcc80987e 175
mbed_official 610:813dcc80987e 176 /* Set the Capture Compare Register value */
mbed_official 610:813dcc80987e 177 TIMx->CCR5 = OC_Config->Pulse;
mbed_official 610:813dcc80987e 178
mbed_official 610:813dcc80987e 179 /* Write to TIMx CCER */
mbed_official 610:813dcc80987e 180 TIMx->CCER = tmpccer;
mbed_official 610:813dcc80987e 181 }
mbed_official 610:813dcc80987e 182
mbed_official 610:813dcc80987e 183 /**
mbed_official 610:813dcc80987e 184 * @brief Timer Ouput Compare 6 configuration
mbed_official 610:813dcc80987e 185 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 186 * @param OC_Config: The ouput configuration structure
mbed_official 610:813dcc80987e 187 * @retval None
mbed_official 610:813dcc80987e 188 */
mbed_official 610:813dcc80987e 189 static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx,
mbed_official 610:813dcc80987e 190 TIM_OC_InitTypeDef *OC_Config)
mbed_official 610:813dcc80987e 191 {
mbed_official 610:813dcc80987e 192 uint32_t tmpccmrx = 0;
mbed_official 610:813dcc80987e 193 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 194 uint32_t tmpcr2 = 0;
mbed_official 610:813dcc80987e 195
mbed_official 610:813dcc80987e 196 /* Disable the output: Reset the CCxE Bit */
mbed_official 610:813dcc80987e 197 TIMx->CCER &= ~TIM_CCER_CC6E;
mbed_official 610:813dcc80987e 198
mbed_official 610:813dcc80987e 199 /* Get the TIMx CCER register value */
mbed_official 610:813dcc80987e 200 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 201 /* Get the TIMx CR2 register value */
mbed_official 610:813dcc80987e 202 tmpcr2 = TIMx->CR2;
mbed_official 610:813dcc80987e 203 /* Get the TIMx CCMR1 register value */
mbed_official 610:813dcc80987e 204 tmpccmrx = TIMx->CCMR3;
mbed_official 610:813dcc80987e 205
mbed_official 610:813dcc80987e 206 /* Reset the Output Compare Mode Bits */
mbed_official 610:813dcc80987e 207 tmpccmrx &= ~(TIM_CCMR3_OC6M);
mbed_official 610:813dcc80987e 208 /* Select the Output Compare Mode */
mbed_official 610:813dcc80987e 209 tmpccmrx |= (OC_Config->OCMode << 8);
mbed_official 610:813dcc80987e 210
mbed_official 610:813dcc80987e 211 /* Reset the Output Polarity level */
mbed_official 610:813dcc80987e 212 tmpccer &= (uint32_t)~TIM_CCER_CC6P;
mbed_official 610:813dcc80987e 213 /* Set the Output Compare Polarity */
mbed_official 610:813dcc80987e 214 tmpccer |= (OC_Config->OCPolarity << 20);
mbed_official 610:813dcc80987e 215
mbed_official 610:813dcc80987e 216 if(IS_TIM_BREAK_INSTANCE(TIMx))
mbed_official 610:813dcc80987e 217 {
mbed_official 610:813dcc80987e 218 /* Reset the Output Compare IDLE State */
mbed_official 610:813dcc80987e 219 tmpcr2 &= ~TIM_CR2_OIS6;
mbed_official 610:813dcc80987e 220 /* Set the Output Idle state */
mbed_official 610:813dcc80987e 221 tmpcr2 |= (OC_Config->OCIdleState << 10);
mbed_official 610:813dcc80987e 222 }
mbed_official 610:813dcc80987e 223
mbed_official 610:813dcc80987e 224 /* Write to TIMx CR2 */
mbed_official 610:813dcc80987e 225 TIMx->CR2 = tmpcr2;
mbed_official 610:813dcc80987e 226
mbed_official 610:813dcc80987e 227 /* Write to TIMx CCMR3 */
mbed_official 610:813dcc80987e 228 TIMx->CCMR3 = tmpccmrx;
mbed_official 610:813dcc80987e 229
mbed_official 610:813dcc80987e 230 /* Set the Capture Compare Register value */
mbed_official 610:813dcc80987e 231 TIMx->CCR6 = OC_Config->Pulse;
mbed_official 610:813dcc80987e 232
mbed_official 610:813dcc80987e 233 /* Write to TIMx CCER */
mbed_official 610:813dcc80987e 234 TIMx->CCER = tmpccer;
mbed_official 610:813dcc80987e 235 }
mbed_official 610:813dcc80987e 236
mbed_official 610:813dcc80987e 237 /* Exported functions --------------------------------------------------------*/
mbed_official 610:813dcc80987e 238 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
mbed_official 610:813dcc80987e 239 * @{
mbed_official 610:813dcc80987e 240 */
mbed_official 610:813dcc80987e 241
mbed_official 610:813dcc80987e 242 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
mbed_official 610:813dcc80987e 243 * @brief Timer Hall Sensor functions
mbed_official 610:813dcc80987e 244 *
mbed_official 610:813dcc80987e 245 @verbatim
mbed_official 610:813dcc80987e 246 ==============================================================================
mbed_official 610:813dcc80987e 247 ##### Timer Hall Sensor functions #####
mbed_official 610:813dcc80987e 248 ==============================================================================
mbed_official 610:813dcc80987e 249 [..]
mbed_official 610:813dcc80987e 250 This section provides functions allowing to:
mbed_official 610:813dcc80987e 251 (+) Initialize and configure TIM HAL Sensor.
mbed_official 610:813dcc80987e 252 (+) De-initialize TIM HAL Sensor.
mbed_official 610:813dcc80987e 253 (+) Start the Hall Sensor Interface.
mbed_official 610:813dcc80987e 254 (+) Stop the Hall Sensor Interface.
mbed_official 610:813dcc80987e 255 (+) Start the Hall Sensor Interface and enable interrupts.
mbed_official 610:813dcc80987e 256 (+) Stop the Hall Sensor Interface and disable interrupts.
mbed_official 610:813dcc80987e 257 (+) Start the Hall Sensor Interface and enable DMA transfers.
mbed_official 610:813dcc80987e 258 (+) Stop the Hall Sensor Interface and disable DMA transfers.
mbed_official 610:813dcc80987e 259
mbed_official 610:813dcc80987e 260 @endverbatim
mbed_official 610:813dcc80987e 261 * @{
mbed_official 610:813dcc80987e 262 */
mbed_official 610:813dcc80987e 263 /**
mbed_official 610:813dcc80987e 264 * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
mbed_official 610:813dcc80987e 265 * @param htim: TIM Encoder Interface handle
mbed_official 610:813dcc80987e 266 * @param sConfig: TIM Hall Sensor configuration structure
mbed_official 610:813dcc80987e 267 * @retval HAL status
mbed_official 610:813dcc80987e 268 */
mbed_official 610:813dcc80987e 269 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig)
mbed_official 610:813dcc80987e 270 {
mbed_official 610:813dcc80987e 271 TIM_OC_InitTypeDef OC_Config;
mbed_official 610:813dcc80987e 272
mbed_official 610:813dcc80987e 273 /* Check the TIM handle allocation */
mbed_official 610:813dcc80987e 274 if(htim == NULL)
mbed_official 610:813dcc80987e 275 {
mbed_official 610:813dcc80987e 276 return HAL_ERROR;
mbed_official 610:813dcc80987e 277 }
mbed_official 610:813dcc80987e 278
mbed_official 610:813dcc80987e 279 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 280 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 610:813dcc80987e 281 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 610:813dcc80987e 282 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
mbed_official 610:813dcc80987e 283 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
mbed_official 610:813dcc80987e 284 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
mbed_official 610:813dcc80987e 285
mbed_official 610:813dcc80987e 286 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 610:813dcc80987e 287 {
mbed_official 610:813dcc80987e 288 /* Allocate lock resource and initialize it */
mbed_official 610:813dcc80987e 289 htim->Lock = HAL_UNLOCKED;
mbed_official 610:813dcc80987e 290
mbed_official 610:813dcc80987e 291 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 610:813dcc80987e 292 HAL_TIMEx_HallSensor_MspInit(htim);
mbed_official 610:813dcc80987e 293 }
mbed_official 610:813dcc80987e 294
mbed_official 610:813dcc80987e 295 /* Set the TIM state */
mbed_official 610:813dcc80987e 296 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 297
mbed_official 610:813dcc80987e 298 /* Configure the Time base in the Encoder Mode */
mbed_official 610:813dcc80987e 299 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 610:813dcc80987e 300
mbed_official 610:813dcc80987e 301 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
mbed_official 610:813dcc80987e 302 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
mbed_official 610:813dcc80987e 303
mbed_official 610:813dcc80987e 304 /* Reset the IC1PSC Bits */
mbed_official 610:813dcc80987e 305 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official 610:813dcc80987e 306 /* Set the IC1PSC value */
mbed_official 610:813dcc80987e 307 htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
mbed_official 610:813dcc80987e 308
mbed_official 610:813dcc80987e 309 /* Enable the Hall sensor interface (XOR function of the three inputs) */
mbed_official 610:813dcc80987e 310 htim->Instance->CR2 |= TIM_CR2_TI1S;
mbed_official 610:813dcc80987e 311
mbed_official 610:813dcc80987e 312 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
mbed_official 610:813dcc80987e 313 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 610:813dcc80987e 314 htim->Instance->SMCR |= TIM_TS_TI1F_ED;
mbed_official 610:813dcc80987e 315
mbed_official 610:813dcc80987e 316 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
mbed_official 610:813dcc80987e 317 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 610:813dcc80987e 318 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
mbed_official 610:813dcc80987e 319
mbed_official 610:813dcc80987e 320 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
mbed_official 610:813dcc80987e 321 OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
mbed_official 610:813dcc80987e 322 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
mbed_official 610:813dcc80987e 323 OC_Config.OCMode = TIM_OCMODE_PWM2;
mbed_official 610:813dcc80987e 324 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
mbed_official 610:813dcc80987e 325 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
mbed_official 610:813dcc80987e 326 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
mbed_official 610:813dcc80987e 327 OC_Config.Pulse = sConfig->Commutation_Delay;
mbed_official 610:813dcc80987e 328
mbed_official 610:813dcc80987e 329 TIM_OC2_SetConfig(htim->Instance, &OC_Config);
mbed_official 610:813dcc80987e 330
mbed_official 610:813dcc80987e 331 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
mbed_official 610:813dcc80987e 332 register to 101 */
mbed_official 610:813dcc80987e 333 htim->Instance->CR2 &= ~TIM_CR2_MMS;
mbed_official 610:813dcc80987e 334 htim->Instance->CR2 |= TIM_TRGO_OC2REF;
mbed_official 610:813dcc80987e 335
mbed_official 610:813dcc80987e 336 /* Initialize the TIM state*/
mbed_official 610:813dcc80987e 337 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 338
mbed_official 610:813dcc80987e 339 return HAL_OK;
mbed_official 610:813dcc80987e 340 }
mbed_official 610:813dcc80987e 341
mbed_official 610:813dcc80987e 342 /**
mbed_official 610:813dcc80987e 343 * @brief DeInitialize the TIM Hall Sensor interface
mbed_official 610:813dcc80987e 344 * @param htim: TIM Hall Sensor handle
mbed_official 610:813dcc80987e 345 * @retval HAL status
mbed_official 610:813dcc80987e 346 */
mbed_official 610:813dcc80987e 347 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 348 {
mbed_official 610:813dcc80987e 349 /* Check the parameters */
mbed_official 610:813dcc80987e 350 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 351
mbed_official 610:813dcc80987e 352 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 353
mbed_official 610:813dcc80987e 354 /* Disable the TIM Peripheral Clock */
mbed_official 610:813dcc80987e 355 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 356
mbed_official 610:813dcc80987e 357 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 610:813dcc80987e 358 HAL_TIMEx_HallSensor_MspDeInit(htim);
mbed_official 610:813dcc80987e 359
mbed_official 610:813dcc80987e 360 /* Change TIM state */
mbed_official 610:813dcc80987e 361 htim->State = HAL_TIM_STATE_RESET;
mbed_official 610:813dcc80987e 362
mbed_official 610:813dcc80987e 363 /* Release Lock */
mbed_official 610:813dcc80987e 364 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 365
mbed_official 610:813dcc80987e 366 return HAL_OK;
mbed_official 610:813dcc80987e 367 }
mbed_official 610:813dcc80987e 368
mbed_official 610:813dcc80987e 369 /**
mbed_official 610:813dcc80987e 370 * @brief Initializes the TIM Hall Sensor MSP.
mbed_official 610:813dcc80987e 371 * @param htim: TIM handle
mbed_official 610:813dcc80987e 372 * @retval None
mbed_official 610:813dcc80987e 373 */
mbed_official 610:813dcc80987e 374 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 375 {
mbed_official 610:813dcc80987e 376 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 377 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
mbed_official 610:813dcc80987e 378 */
mbed_official 610:813dcc80987e 379 }
mbed_official 610:813dcc80987e 380
mbed_official 610:813dcc80987e 381 /**
mbed_official 610:813dcc80987e 382 * @brief DeInitialize TIM Hall Sensor MSP.
mbed_official 610:813dcc80987e 383 * @param htim: TIM handle
mbed_official 610:813dcc80987e 384 * @retval None
mbed_official 610:813dcc80987e 385 */
mbed_official 610:813dcc80987e 386 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 387 {
mbed_official 610:813dcc80987e 388 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 389 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
mbed_official 610:813dcc80987e 390 */
mbed_official 610:813dcc80987e 391 }
mbed_official 610:813dcc80987e 392
mbed_official 610:813dcc80987e 393 /**
mbed_official 610:813dcc80987e 394 * @brief Starts the TIM Hall Sensor Interface.
mbed_official 610:813dcc80987e 395 * @param htim : TIM Hall Sensor handle
mbed_official 610:813dcc80987e 396 * @retval HAL status
mbed_official 610:813dcc80987e 397 */
mbed_official 610:813dcc80987e 398 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 399 {
mbed_official 610:813dcc80987e 400 /* Check the parameters */
mbed_official 610:813dcc80987e 401 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 402
mbed_official 610:813dcc80987e 403 /* Enable the Input Capture channels 1
mbed_official 610:813dcc80987e 404 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 610:813dcc80987e 405 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 406
mbed_official 610:813dcc80987e 407 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 408 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 409
mbed_official 610:813dcc80987e 410 /* Return function status */
mbed_official 610:813dcc80987e 411 return HAL_OK;
mbed_official 610:813dcc80987e 412 }
mbed_official 610:813dcc80987e 413
mbed_official 610:813dcc80987e 414 /**
mbed_official 610:813dcc80987e 415 * @brief Stops the TIM Hall sensor Interface.
mbed_official 610:813dcc80987e 416 * @param htim : TIM Hall Sensor handle
mbed_official 610:813dcc80987e 417 * @retval HAL status
mbed_official 610:813dcc80987e 418 */
mbed_official 610:813dcc80987e 419 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 420 {
mbed_official 610:813dcc80987e 421 /* Check the parameters */
mbed_official 610:813dcc80987e 422 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 423
mbed_official 610:813dcc80987e 424 /* Disable the Input Capture channels 1, 2 and 3
mbed_official 610:813dcc80987e 425 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 610:813dcc80987e 426 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 427
mbed_official 610:813dcc80987e 428 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 429 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 430
mbed_official 610:813dcc80987e 431 /* Return function status */
mbed_official 610:813dcc80987e 432 return HAL_OK;
mbed_official 610:813dcc80987e 433 }
mbed_official 610:813dcc80987e 434
mbed_official 610:813dcc80987e 435 /**
mbed_official 610:813dcc80987e 436 * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
mbed_official 610:813dcc80987e 437 * @param htim : TIM Hall Sensor handle
mbed_official 610:813dcc80987e 438 * @retval HAL status
mbed_official 610:813dcc80987e 439 */
mbed_official 610:813dcc80987e 440 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 441 {
mbed_official 610:813dcc80987e 442 /* Check the parameters */
mbed_official 610:813dcc80987e 443 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 444
mbed_official 610:813dcc80987e 445 /* Enable the capture compare Interrupts 1 event */
mbed_official 610:813dcc80987e 446 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 447
mbed_official 610:813dcc80987e 448 /* Enable the Input Capture channels 1
mbed_official 610:813dcc80987e 449 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 610:813dcc80987e 450 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 451
mbed_official 610:813dcc80987e 452 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 453 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 454
mbed_official 610:813dcc80987e 455 /* Return function status */
mbed_official 610:813dcc80987e 456 return HAL_OK;
mbed_official 610:813dcc80987e 457 }
mbed_official 610:813dcc80987e 458
mbed_official 610:813dcc80987e 459 /**
mbed_official 610:813dcc80987e 460 * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
mbed_official 610:813dcc80987e 461 * @param htim : TIM handle
mbed_official 610:813dcc80987e 462 * @retval HAL status
mbed_official 610:813dcc80987e 463 */
mbed_official 610:813dcc80987e 464 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 465 {
mbed_official 610:813dcc80987e 466 /* Check the parameters */
mbed_official 610:813dcc80987e 467 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 468
mbed_official 610:813dcc80987e 469 /* Disable the Input Capture channels 1
mbed_official 610:813dcc80987e 470 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 610:813dcc80987e 471 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 472
mbed_official 610:813dcc80987e 473 /* Disable the capture compare Interrupts event */
mbed_official 610:813dcc80987e 474 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 475
mbed_official 610:813dcc80987e 476 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 477 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 478
mbed_official 610:813dcc80987e 479 /* Return function status */
mbed_official 610:813dcc80987e 480 return HAL_OK;
mbed_official 610:813dcc80987e 481 }
mbed_official 610:813dcc80987e 482
mbed_official 610:813dcc80987e 483 /**
mbed_official 610:813dcc80987e 484 * @brief Starts the TIM Hall Sensor Interface in DMA mode.
mbed_official 610:813dcc80987e 485 * @param htim : TIM Hall Sensor handle
mbed_official 610:813dcc80987e 486 * @param pData: The destination Buffer address.
mbed_official 610:813dcc80987e 487 * @param Length: The length of data to be transferred from TIM peripheral to memory.
mbed_official 610:813dcc80987e 488 * @retval HAL status
mbed_official 610:813dcc80987e 489 */
mbed_official 610:813dcc80987e 490 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
mbed_official 610:813dcc80987e 491 {
mbed_official 610:813dcc80987e 492 /* Check the parameters */
mbed_official 610:813dcc80987e 493 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 494
mbed_official 610:813dcc80987e 495 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 610:813dcc80987e 496 {
mbed_official 610:813dcc80987e 497 return HAL_BUSY;
mbed_official 610:813dcc80987e 498 }
mbed_official 610:813dcc80987e 499 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 610:813dcc80987e 500 {
mbed_official 610:813dcc80987e 501 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 610:813dcc80987e 502 {
mbed_official 610:813dcc80987e 503 return HAL_ERROR;
mbed_official 610:813dcc80987e 504 }
mbed_official 610:813dcc80987e 505 else
mbed_official 610:813dcc80987e 506 {
mbed_official 610:813dcc80987e 507 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 508 }
mbed_official 610:813dcc80987e 509 }
mbed_official 610:813dcc80987e 510 /* Enable the Input Capture channels 1
mbed_official 610:813dcc80987e 511 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 610:813dcc80987e 512 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 513
mbed_official 610:813dcc80987e 514 /* Set the DMA Input Capture 1 Callback */
mbed_official 610:813dcc80987e 515 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 516 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 517 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 518
mbed_official 610:813dcc80987e 519 /* Enable the DMA channel for Capture 1*/
mbed_official 610:813dcc80987e 520 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
mbed_official 610:813dcc80987e 521
mbed_official 610:813dcc80987e 522 /* Enable the capture compare 1 Interrupt */
mbed_official 610:813dcc80987e 523 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 524
mbed_official 610:813dcc80987e 525 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 526 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 527
mbed_official 610:813dcc80987e 528 /* Return function status */
mbed_official 610:813dcc80987e 529 return HAL_OK;
mbed_official 610:813dcc80987e 530 }
mbed_official 610:813dcc80987e 531
mbed_official 610:813dcc80987e 532 /**
mbed_official 610:813dcc80987e 533 * @brief Stops the TIM Hall Sensor Interface in DMA mode.
mbed_official 610:813dcc80987e 534 * @param htim : TIM handle
mbed_official 610:813dcc80987e 535 * @retval HAL status
mbed_official 610:813dcc80987e 536 */
mbed_official 610:813dcc80987e 537 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 538 {
mbed_official 610:813dcc80987e 539 /* Check the parameters */
mbed_official 610:813dcc80987e 540 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 541
mbed_official 610:813dcc80987e 542 /* Disable the Input Capture channels 1
mbed_official 610:813dcc80987e 543 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
mbed_official 610:813dcc80987e 544 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 545
mbed_official 610:813dcc80987e 546
mbed_official 610:813dcc80987e 547 /* Disable the capture compare Interrupts 1 event */
mbed_official 610:813dcc80987e 548 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 549
mbed_official 610:813dcc80987e 550 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 551 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 552
mbed_official 610:813dcc80987e 553 /* Return function status */
mbed_official 610:813dcc80987e 554 return HAL_OK;
mbed_official 610:813dcc80987e 555 }
mbed_official 610:813dcc80987e 556
mbed_official 610:813dcc80987e 557 /**
mbed_official 610:813dcc80987e 558 * @}
mbed_official 610:813dcc80987e 559 */
mbed_official 610:813dcc80987e 560
mbed_official 610:813dcc80987e 561 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
mbed_official 610:813dcc80987e 562 * @brief Timer Complementary Output Compare functions
mbed_official 610:813dcc80987e 563 *
mbed_official 610:813dcc80987e 564 @verbatim
mbed_official 610:813dcc80987e 565 ==============================================================================
mbed_official 610:813dcc80987e 566 ##### Timer Complementary Output Compare functions #####
mbed_official 610:813dcc80987e 567 ==============================================================================
mbed_official 610:813dcc80987e 568 [..]
mbed_official 610:813dcc80987e 569 This section provides functions allowing to:
mbed_official 610:813dcc80987e 570 (+) Start the Complementary Output Compare/PWM.
mbed_official 610:813dcc80987e 571 (+) Stop the Complementary Output Compare/PWM.
mbed_official 610:813dcc80987e 572 (+) Start the Complementary Output Compare/PWM and enable interrupts.
mbed_official 610:813dcc80987e 573 (+) Stop the Complementary Output Compare/PWM and disable interrupts.
mbed_official 610:813dcc80987e 574 (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
mbed_official 610:813dcc80987e 575 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
mbed_official 610:813dcc80987e 576
mbed_official 610:813dcc80987e 577 @endverbatim
mbed_official 610:813dcc80987e 578 * @{
mbed_official 610:813dcc80987e 579 */
mbed_official 610:813dcc80987e 580
mbed_official 610:813dcc80987e 581 /**
mbed_official 610:813dcc80987e 582 * @brief Starts the TIM Output Compare signal generation on the complementary
mbed_official 610:813dcc80987e 583 * output.
mbed_official 610:813dcc80987e 584 * @param htim : TIM Output Compare handle
mbed_official 610:813dcc80987e 585 * @param Channel : TIM Channel to be enabled
mbed_official 610:813dcc80987e 586 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 587 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 588 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 589 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 590 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 591 * @retval HAL status
mbed_official 610:813dcc80987e 592 */
mbed_official 610:813dcc80987e 593 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 594 {
mbed_official 610:813dcc80987e 595 /* Check the parameters */
mbed_official 610:813dcc80987e 596 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 597
mbed_official 610:813dcc80987e 598 /* Enable the Capture compare channel N */
mbed_official 610:813dcc80987e 599 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 610:813dcc80987e 600
mbed_official 610:813dcc80987e 601 /* Enable the Main Ouput */
mbed_official 610:813dcc80987e 602 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 603
mbed_official 610:813dcc80987e 604 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 605 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 606
mbed_official 610:813dcc80987e 607 /* Return function status */
mbed_official 610:813dcc80987e 608 return HAL_OK;
mbed_official 610:813dcc80987e 609 }
mbed_official 610:813dcc80987e 610
mbed_official 610:813dcc80987e 611 /**
mbed_official 610:813dcc80987e 612 * @brief Stops the TIM Output Compare signal generation on the complementary
mbed_official 610:813dcc80987e 613 * output.
mbed_official 610:813dcc80987e 614 * @param htim : TIM handle
mbed_official 610:813dcc80987e 615 * @param Channel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 616 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 617 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 618 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 619 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 620 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 621 * @retval HAL status
mbed_official 610:813dcc80987e 622 */
mbed_official 610:813dcc80987e 623 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 624 {
mbed_official 610:813dcc80987e 625 /* Check the parameters */
mbed_official 610:813dcc80987e 626 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 627
mbed_official 610:813dcc80987e 628 /* Disable the Capture compare channel N */
mbed_official 610:813dcc80987e 629 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 610:813dcc80987e 630
mbed_official 610:813dcc80987e 631 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 632 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 633
mbed_official 610:813dcc80987e 634 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 635 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 636
mbed_official 610:813dcc80987e 637 /* Return function status */
mbed_official 610:813dcc80987e 638 return HAL_OK;
mbed_official 610:813dcc80987e 639 }
mbed_official 610:813dcc80987e 640
mbed_official 610:813dcc80987e 641 /**
mbed_official 610:813dcc80987e 642 * @brief Starts the TIM Output Compare signal generation in interrupt mode
mbed_official 610:813dcc80987e 643 * on the complementary output.
mbed_official 610:813dcc80987e 644 * @param htim : TIM OC handle
mbed_official 610:813dcc80987e 645 * @param Channel : TIM Channel to be enabled
mbed_official 610:813dcc80987e 646 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 647 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 648 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 649 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 650 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 651 * @retval HAL status
mbed_official 610:813dcc80987e 652 */
mbed_official 610:813dcc80987e 653 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 654 {
mbed_official 610:813dcc80987e 655 /* Check the parameters */
mbed_official 610:813dcc80987e 656 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 657
mbed_official 610:813dcc80987e 658 switch (Channel)
mbed_official 610:813dcc80987e 659 {
mbed_official 610:813dcc80987e 660 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 661 {
mbed_official 610:813dcc80987e 662 /* Enable the TIM Output Compare interrupt */
mbed_official 610:813dcc80987e 663 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 664 }
mbed_official 610:813dcc80987e 665 break;
mbed_official 610:813dcc80987e 666
mbed_official 610:813dcc80987e 667 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 668 {
mbed_official 610:813dcc80987e 669 /* Enable the TIM Output Compare interrupt */
mbed_official 610:813dcc80987e 670 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 671 }
mbed_official 610:813dcc80987e 672 break;
mbed_official 610:813dcc80987e 673
mbed_official 610:813dcc80987e 674 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 675 {
mbed_official 610:813dcc80987e 676 /* Enable the TIM Output Compare interrupt */
mbed_official 610:813dcc80987e 677 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 610:813dcc80987e 678 }
mbed_official 610:813dcc80987e 679 break;
mbed_official 610:813dcc80987e 680
mbed_official 610:813dcc80987e 681 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 682 {
mbed_official 610:813dcc80987e 683 /* Enable the TIM Output Compare interrupt */
mbed_official 610:813dcc80987e 684 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 610:813dcc80987e 685 }
mbed_official 610:813dcc80987e 686 break;
mbed_official 610:813dcc80987e 687
mbed_official 610:813dcc80987e 688 default:
mbed_official 610:813dcc80987e 689 break;
mbed_official 610:813dcc80987e 690 }
mbed_official 610:813dcc80987e 691
mbed_official 610:813dcc80987e 692 /* Enable the TIM Break interrupt */
mbed_official 610:813dcc80987e 693 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
mbed_official 610:813dcc80987e 694
mbed_official 610:813dcc80987e 695 /* Enable the Capture compare channel N */
mbed_official 610:813dcc80987e 696 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 610:813dcc80987e 697
mbed_official 610:813dcc80987e 698 /* Enable the Main Ouput */
mbed_official 610:813dcc80987e 699 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 700
mbed_official 610:813dcc80987e 701 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 702 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 703
mbed_official 610:813dcc80987e 704 /* Return function status */
mbed_official 610:813dcc80987e 705 return HAL_OK;
mbed_official 610:813dcc80987e 706 }
mbed_official 610:813dcc80987e 707
mbed_official 610:813dcc80987e 708 /**
mbed_official 610:813dcc80987e 709 * @brief Stops the TIM Output Compare signal generation in interrupt mode
mbed_official 610:813dcc80987e 710 * on the complementary output.
mbed_official 610:813dcc80987e 711 * @param htim : TIM Output Compare handle
mbed_official 610:813dcc80987e 712 * @param Channel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 713 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 714 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 715 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 716 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 717 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 718 * @retval HAL status
mbed_official 610:813dcc80987e 719 */
mbed_official 610:813dcc80987e 720 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 721 {
mbed_official 610:813dcc80987e 722 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 723
mbed_official 610:813dcc80987e 724 /* Check the parameters */
mbed_official 610:813dcc80987e 725 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 726
mbed_official 610:813dcc80987e 727 switch (Channel)
mbed_official 610:813dcc80987e 728 {
mbed_official 610:813dcc80987e 729 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 730 {
mbed_official 610:813dcc80987e 731 /* Disable the TIM Output Compare interrupt */
mbed_official 610:813dcc80987e 732 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 733 }
mbed_official 610:813dcc80987e 734 break;
mbed_official 610:813dcc80987e 735
mbed_official 610:813dcc80987e 736 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 737 {
mbed_official 610:813dcc80987e 738 /* Disable the TIM Output Compare interrupt */
mbed_official 610:813dcc80987e 739 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 740 }
mbed_official 610:813dcc80987e 741 break;
mbed_official 610:813dcc80987e 742
mbed_official 610:813dcc80987e 743 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 744 {
mbed_official 610:813dcc80987e 745 /* Disable the TIM Output Compare interrupt */
mbed_official 610:813dcc80987e 746 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 610:813dcc80987e 747 }
mbed_official 610:813dcc80987e 748 break;
mbed_official 610:813dcc80987e 749
mbed_official 610:813dcc80987e 750 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 751 {
mbed_official 610:813dcc80987e 752 /* Disable the TIM Output Compare interrupt */
mbed_official 610:813dcc80987e 753 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 610:813dcc80987e 754 }
mbed_official 610:813dcc80987e 755 break;
mbed_official 610:813dcc80987e 756
mbed_official 610:813dcc80987e 757 default:
mbed_official 610:813dcc80987e 758 break;
mbed_official 610:813dcc80987e 759 }
mbed_official 610:813dcc80987e 760
mbed_official 610:813dcc80987e 761 /* Disable the Capture compare channel N */
mbed_official 610:813dcc80987e 762 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 610:813dcc80987e 763
mbed_official 610:813dcc80987e 764 /* Disable the TIM Break interrupt (only if no more channel is active) */
mbed_official 610:813dcc80987e 765 tmpccer = htim->Instance->CCER;
mbed_official 610:813dcc80987e 766 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
mbed_official 610:813dcc80987e 767 {
mbed_official 610:813dcc80987e 768 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
mbed_official 610:813dcc80987e 769 }
mbed_official 610:813dcc80987e 770
mbed_official 610:813dcc80987e 771 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 772 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 773
mbed_official 610:813dcc80987e 774 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 775 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 776
mbed_official 610:813dcc80987e 777 /* Return function status */
mbed_official 610:813dcc80987e 778 return HAL_OK;
mbed_official 610:813dcc80987e 779 }
mbed_official 610:813dcc80987e 780
mbed_official 610:813dcc80987e 781 /**
mbed_official 610:813dcc80987e 782 * @brief Starts the TIM Output Compare signal generation in DMA mode
mbed_official 610:813dcc80987e 783 * on the complementary output.
mbed_official 610:813dcc80987e 784 * @param htim : TIM Output Compare handle
mbed_official 610:813dcc80987e 785 * @param Channel : TIM Channel to be enabled
mbed_official 610:813dcc80987e 786 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 787 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 788 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 789 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 790 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 791 * @param pData: The source Buffer address.
mbed_official 610:813dcc80987e 792 * @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official 610:813dcc80987e 793 * @retval HAL status
mbed_official 610:813dcc80987e 794 */
mbed_official 610:813dcc80987e 795 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 610:813dcc80987e 796 {
mbed_official 610:813dcc80987e 797 /* Check the parameters */
mbed_official 610:813dcc80987e 798 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 799
mbed_official 610:813dcc80987e 800 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 610:813dcc80987e 801 {
mbed_official 610:813dcc80987e 802 return HAL_BUSY;
mbed_official 610:813dcc80987e 803 }
mbed_official 610:813dcc80987e 804 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 610:813dcc80987e 805 {
mbed_official 610:813dcc80987e 806 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 610:813dcc80987e 807 {
mbed_official 610:813dcc80987e 808 return HAL_ERROR;
mbed_official 610:813dcc80987e 809 }
mbed_official 610:813dcc80987e 810 else
mbed_official 610:813dcc80987e 811 {
mbed_official 610:813dcc80987e 812 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 813 }
mbed_official 610:813dcc80987e 814 }
mbed_official 610:813dcc80987e 815 switch (Channel)
mbed_official 610:813dcc80987e 816 {
mbed_official 610:813dcc80987e 817 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 818 {
mbed_official 610:813dcc80987e 819 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 820 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 821
mbed_official 610:813dcc80987e 822 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 823 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 824
mbed_official 610:813dcc80987e 825 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 826 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official 610:813dcc80987e 827
mbed_official 610:813dcc80987e 828 /* Enable the TIM Output Compare DMA request */
mbed_official 610:813dcc80987e 829 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 830 }
mbed_official 610:813dcc80987e 831 break;
mbed_official 610:813dcc80987e 832
mbed_official 610:813dcc80987e 833 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 834 {
mbed_official 610:813dcc80987e 835 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 836 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 837
mbed_official 610:813dcc80987e 838 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 839 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 840
mbed_official 610:813dcc80987e 841 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 842 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official 610:813dcc80987e 843
mbed_official 610:813dcc80987e 844 /* Enable the TIM Output Compare DMA request */
mbed_official 610:813dcc80987e 845 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 846 }
mbed_official 610:813dcc80987e 847 break;
mbed_official 610:813dcc80987e 848
mbed_official 610:813dcc80987e 849 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 850 {
mbed_official 610:813dcc80987e 851 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 852 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 853
mbed_official 610:813dcc80987e 854 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 855 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 856
mbed_official 610:813dcc80987e 857 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 858 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official 610:813dcc80987e 859
mbed_official 610:813dcc80987e 860 /* Enable the TIM Output Compare DMA request */
mbed_official 610:813dcc80987e 861 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 610:813dcc80987e 862 }
mbed_official 610:813dcc80987e 863 break;
mbed_official 610:813dcc80987e 864
mbed_official 610:813dcc80987e 865 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 866 {
mbed_official 610:813dcc80987e 867 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 868 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 869
mbed_official 610:813dcc80987e 870 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 871 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 872
mbed_official 610:813dcc80987e 873 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 874 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official 610:813dcc80987e 875
mbed_official 610:813dcc80987e 876 /* Enable the TIM Output Compare DMA request */
mbed_official 610:813dcc80987e 877 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 610:813dcc80987e 878 }
mbed_official 610:813dcc80987e 879 break;
mbed_official 610:813dcc80987e 880
mbed_official 610:813dcc80987e 881 default:
mbed_official 610:813dcc80987e 882 break;
mbed_official 610:813dcc80987e 883 }
mbed_official 610:813dcc80987e 884
mbed_official 610:813dcc80987e 885 /* Enable the Capture compare channel N */
mbed_official 610:813dcc80987e 886 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 610:813dcc80987e 887
mbed_official 610:813dcc80987e 888 /* Enable the Main Ouput */
mbed_official 610:813dcc80987e 889 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 890
mbed_official 610:813dcc80987e 891 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 892 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 893
mbed_official 610:813dcc80987e 894 /* Return function status */
mbed_official 610:813dcc80987e 895 return HAL_OK;
mbed_official 610:813dcc80987e 896 }
mbed_official 610:813dcc80987e 897
mbed_official 610:813dcc80987e 898 /**
mbed_official 610:813dcc80987e 899 * @brief Stops the TIM Output Compare signal generation in DMA mode
mbed_official 610:813dcc80987e 900 * on the complementary output.
mbed_official 610:813dcc80987e 901 * @param htim : TIM Output Compare handle
mbed_official 610:813dcc80987e 902 * @param Channel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 903 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 904 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 905 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 906 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 907 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 908 * @retval HAL status
mbed_official 610:813dcc80987e 909 */
mbed_official 610:813dcc80987e 910 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 911 {
mbed_official 610:813dcc80987e 912 /* Check the parameters */
mbed_official 610:813dcc80987e 913 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 914
mbed_official 610:813dcc80987e 915 switch (Channel)
mbed_official 610:813dcc80987e 916 {
mbed_official 610:813dcc80987e 917 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 918 {
mbed_official 610:813dcc80987e 919 /* Disable the TIM Output Compare DMA request */
mbed_official 610:813dcc80987e 920 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 921 }
mbed_official 610:813dcc80987e 922 break;
mbed_official 610:813dcc80987e 923
mbed_official 610:813dcc80987e 924 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 925 {
mbed_official 610:813dcc80987e 926 /* Disable the TIM Output Compare DMA request */
mbed_official 610:813dcc80987e 927 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 928 }
mbed_official 610:813dcc80987e 929 break;
mbed_official 610:813dcc80987e 930
mbed_official 610:813dcc80987e 931 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 932 {
mbed_official 610:813dcc80987e 933 /* Disable the TIM Output Compare DMA request */
mbed_official 610:813dcc80987e 934 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 610:813dcc80987e 935 }
mbed_official 610:813dcc80987e 936 break;
mbed_official 610:813dcc80987e 937
mbed_official 610:813dcc80987e 938 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 939 {
mbed_official 610:813dcc80987e 940 /* Disable the TIM Output Compare interrupt */
mbed_official 610:813dcc80987e 941 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 610:813dcc80987e 942 }
mbed_official 610:813dcc80987e 943 break;
mbed_official 610:813dcc80987e 944
mbed_official 610:813dcc80987e 945 default:
mbed_official 610:813dcc80987e 946 break;
mbed_official 610:813dcc80987e 947 }
mbed_official 610:813dcc80987e 948
mbed_official 610:813dcc80987e 949 /* Disable the Capture compare channel N */
mbed_official 610:813dcc80987e 950 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 610:813dcc80987e 951
mbed_official 610:813dcc80987e 952 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 953 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 954
mbed_official 610:813dcc80987e 955 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 956 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 957
mbed_official 610:813dcc80987e 958 /* Change the htim state */
mbed_official 610:813dcc80987e 959 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 960
mbed_official 610:813dcc80987e 961 /* Return function status */
mbed_official 610:813dcc80987e 962 return HAL_OK;
mbed_official 610:813dcc80987e 963 }
mbed_official 610:813dcc80987e 964
mbed_official 610:813dcc80987e 965 /**
mbed_official 610:813dcc80987e 966 * @}
mbed_official 610:813dcc80987e 967 */
mbed_official 610:813dcc80987e 968
mbed_official 610:813dcc80987e 969 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
mbed_official 610:813dcc80987e 970 * @brief Timer Complementary PWM functions
mbed_official 610:813dcc80987e 971 *
mbed_official 610:813dcc80987e 972 @verbatim
mbed_official 610:813dcc80987e 973 ==============================================================================
mbed_official 610:813dcc80987e 974 ##### Timer Complementary PWM functions #####
mbed_official 610:813dcc80987e 975 ==============================================================================
mbed_official 610:813dcc80987e 976 [..]
mbed_official 610:813dcc80987e 977 This section provides functions allowing to:
mbed_official 610:813dcc80987e 978 (+) Start the Complementary PWM.
mbed_official 610:813dcc80987e 979 (+) Stop the Complementary PWM.
mbed_official 610:813dcc80987e 980 (+) Start the Complementary PWM and enable interrupts.
mbed_official 610:813dcc80987e 981 (+) Stop the Complementary PWM and disable interrupts.
mbed_official 610:813dcc80987e 982 (+) Start the Complementary PWM and enable DMA transfers.
mbed_official 610:813dcc80987e 983 (+) Stop the Complementary PWM and disable DMA transfers.
mbed_official 610:813dcc80987e 984 (+) Start the Complementary Input Capture measurement.
mbed_official 610:813dcc80987e 985 (+) Stop the Complementary Input Capture.
mbed_official 610:813dcc80987e 986 (+) Start the Complementary Input Capture and enable interrupts.
mbed_official 610:813dcc80987e 987 (+) Stop the Complementary Input Capture and disable interrupts.
mbed_official 610:813dcc80987e 988 (+) Start the Complementary Input Capture and enable DMA transfers.
mbed_official 610:813dcc80987e 989 (+) Stop the Complementary Input Capture and disable DMA transfers.
mbed_official 610:813dcc80987e 990 (+) Start the Complementary One Pulse generation.
mbed_official 610:813dcc80987e 991 (+) Stop the Complementary One Pulse.
mbed_official 610:813dcc80987e 992 (+) Start the Complementary One Pulse and enable interrupts.
mbed_official 610:813dcc80987e 993 (+) Stop the Complementary One Pulse and disable interrupts.
mbed_official 610:813dcc80987e 994
mbed_official 610:813dcc80987e 995 @endverbatim
mbed_official 610:813dcc80987e 996 * @{
mbed_official 610:813dcc80987e 997 */
mbed_official 610:813dcc80987e 998
mbed_official 610:813dcc80987e 999 /**
mbed_official 610:813dcc80987e 1000 * @brief Starts the PWM signal generation on the complementary output.
mbed_official 610:813dcc80987e 1001 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1002 * @param Channel : TIM Channel to be enabled
mbed_official 610:813dcc80987e 1003 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1004 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1005 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1006 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1007 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1008 * @retval HAL status
mbed_official 610:813dcc80987e 1009 */
mbed_official 610:813dcc80987e 1010 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1011 {
mbed_official 610:813dcc80987e 1012 /* Check the parameters */
mbed_official 610:813dcc80987e 1013 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1014
mbed_official 610:813dcc80987e 1015 /* Enable the complementary PWM output */
mbed_official 610:813dcc80987e 1016 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 610:813dcc80987e 1017
mbed_official 610:813dcc80987e 1018 /* Enable the Main Ouput */
mbed_official 610:813dcc80987e 1019 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 1020
mbed_official 610:813dcc80987e 1021 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 1022 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 1023
mbed_official 610:813dcc80987e 1024 /* Return function status */
mbed_official 610:813dcc80987e 1025 return HAL_OK;
mbed_official 610:813dcc80987e 1026 }
mbed_official 610:813dcc80987e 1027
mbed_official 610:813dcc80987e 1028 /**
mbed_official 610:813dcc80987e 1029 * @brief Stops the PWM signal generation on the complementary output.
mbed_official 610:813dcc80987e 1030 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1031 * @param Channel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 1032 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1033 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1034 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1035 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1036 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1037 * @retval HAL status
mbed_official 610:813dcc80987e 1038 */
mbed_official 610:813dcc80987e 1039 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1040 {
mbed_official 610:813dcc80987e 1041 /* Check the parameters */
mbed_official 610:813dcc80987e 1042 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1043
mbed_official 610:813dcc80987e 1044 /* Disable the complementary PWM output */
mbed_official 610:813dcc80987e 1045 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 610:813dcc80987e 1046
mbed_official 610:813dcc80987e 1047 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 1048 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 1049
mbed_official 610:813dcc80987e 1050 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 1051 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1052
mbed_official 610:813dcc80987e 1053 /* Return function status */
mbed_official 610:813dcc80987e 1054 return HAL_OK;
mbed_official 610:813dcc80987e 1055 }
mbed_official 610:813dcc80987e 1056
mbed_official 610:813dcc80987e 1057 /**
mbed_official 610:813dcc80987e 1058 * @brief Starts the PWM signal generation in interrupt mode on the
mbed_official 610:813dcc80987e 1059 * complementary output.
mbed_official 610:813dcc80987e 1060 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1061 * @param Channel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 1062 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1063 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1064 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1065 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1066 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1067 * @retval HAL status
mbed_official 610:813dcc80987e 1068 */
mbed_official 610:813dcc80987e 1069 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1070 {
mbed_official 610:813dcc80987e 1071 /* Check the parameters */
mbed_official 610:813dcc80987e 1072 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1073
mbed_official 610:813dcc80987e 1074 switch (Channel)
mbed_official 610:813dcc80987e 1075 {
mbed_official 610:813dcc80987e 1076 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1077 {
mbed_official 610:813dcc80987e 1078 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 1079 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 1080 }
mbed_official 610:813dcc80987e 1081 break;
mbed_official 610:813dcc80987e 1082
mbed_official 610:813dcc80987e 1083 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1084 {
mbed_official 610:813dcc80987e 1085 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 1086 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 1087 }
mbed_official 610:813dcc80987e 1088 break;
mbed_official 610:813dcc80987e 1089
mbed_official 610:813dcc80987e 1090 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1091 {
mbed_official 610:813dcc80987e 1092 /* Enable the TIM Capture/Compare 3 interrupt */
mbed_official 610:813dcc80987e 1093 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 610:813dcc80987e 1094 }
mbed_official 610:813dcc80987e 1095 break;
mbed_official 610:813dcc80987e 1096
mbed_official 610:813dcc80987e 1097 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1098 {
mbed_official 610:813dcc80987e 1099 /* Enable the TIM Capture/Compare 4 interrupt */
mbed_official 610:813dcc80987e 1100 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 610:813dcc80987e 1101 }
mbed_official 610:813dcc80987e 1102 break;
mbed_official 610:813dcc80987e 1103
mbed_official 610:813dcc80987e 1104 default:
mbed_official 610:813dcc80987e 1105 break;
mbed_official 610:813dcc80987e 1106 }
mbed_official 610:813dcc80987e 1107
mbed_official 610:813dcc80987e 1108 /* Enable the TIM Break interrupt */
mbed_official 610:813dcc80987e 1109 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
mbed_official 610:813dcc80987e 1110
mbed_official 610:813dcc80987e 1111 /* Enable the complementary PWM output */
mbed_official 610:813dcc80987e 1112 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 610:813dcc80987e 1113
mbed_official 610:813dcc80987e 1114 /* Enable the Main Ouput */
mbed_official 610:813dcc80987e 1115 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 1116
mbed_official 610:813dcc80987e 1117 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 1118 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 1119
mbed_official 610:813dcc80987e 1120 /* Return function status */
mbed_official 610:813dcc80987e 1121 return HAL_OK;
mbed_official 610:813dcc80987e 1122 }
mbed_official 610:813dcc80987e 1123
mbed_official 610:813dcc80987e 1124 /**
mbed_official 610:813dcc80987e 1125 * @brief Stops the PWM signal generation in interrupt mode on the
mbed_official 610:813dcc80987e 1126 * complementary output.
mbed_official 610:813dcc80987e 1127 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1128 * @param Channel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 1129 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1130 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1131 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1132 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1133 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1134 * @retval HAL status
mbed_official 610:813dcc80987e 1135 */
mbed_official 610:813dcc80987e 1136 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1137 {
mbed_official 610:813dcc80987e 1138 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 1139
mbed_official 610:813dcc80987e 1140 /* Check the parameters */
mbed_official 610:813dcc80987e 1141 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1142
mbed_official 610:813dcc80987e 1143 switch (Channel)
mbed_official 610:813dcc80987e 1144 {
mbed_official 610:813dcc80987e 1145 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1146 {
mbed_official 610:813dcc80987e 1147 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 1148 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 1149 }
mbed_official 610:813dcc80987e 1150 break;
mbed_official 610:813dcc80987e 1151
mbed_official 610:813dcc80987e 1152 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1153 {
mbed_official 610:813dcc80987e 1154 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 1155 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 1156 }
mbed_official 610:813dcc80987e 1157 break;
mbed_official 610:813dcc80987e 1158
mbed_official 610:813dcc80987e 1159 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1160 {
mbed_official 610:813dcc80987e 1161 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 610:813dcc80987e 1162 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 610:813dcc80987e 1163 }
mbed_official 610:813dcc80987e 1164 break;
mbed_official 610:813dcc80987e 1165
mbed_official 610:813dcc80987e 1166 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1167 {
mbed_official 610:813dcc80987e 1168 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 610:813dcc80987e 1169 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 610:813dcc80987e 1170 }
mbed_official 610:813dcc80987e 1171 break;
mbed_official 610:813dcc80987e 1172
mbed_official 610:813dcc80987e 1173 default:
mbed_official 610:813dcc80987e 1174 break;
mbed_official 610:813dcc80987e 1175 }
mbed_official 610:813dcc80987e 1176
mbed_official 610:813dcc80987e 1177 /* Disable the complementary PWM output */
mbed_official 610:813dcc80987e 1178 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 610:813dcc80987e 1179
mbed_official 610:813dcc80987e 1180
mbed_official 610:813dcc80987e 1181 /* Disable the TIM Break interrupt (only if no more channel is active) */
mbed_official 610:813dcc80987e 1182 tmpccer = htim->Instance->CCER;
mbed_official 610:813dcc80987e 1183 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
mbed_official 610:813dcc80987e 1184 {
mbed_official 610:813dcc80987e 1185 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
mbed_official 610:813dcc80987e 1186 }
mbed_official 610:813dcc80987e 1187
mbed_official 610:813dcc80987e 1188 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 1189 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 1190
mbed_official 610:813dcc80987e 1191 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 1192 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1193
mbed_official 610:813dcc80987e 1194 /* Return function status */
mbed_official 610:813dcc80987e 1195 return HAL_OK;
mbed_official 610:813dcc80987e 1196 }
mbed_official 610:813dcc80987e 1197
mbed_official 610:813dcc80987e 1198 /**
mbed_official 610:813dcc80987e 1199 * @brief Starts the TIM PWM signal generation in DMA mode on the
mbed_official 610:813dcc80987e 1200 * complementary output
mbed_official 610:813dcc80987e 1201 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1202 * @param Channel : TIM Channel to be enabled
mbed_official 610:813dcc80987e 1203 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1204 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1205 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1206 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1207 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1208 * @param pData: The source Buffer address.
mbed_official 610:813dcc80987e 1209 * @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official 610:813dcc80987e 1210 * @retval HAL status
mbed_official 610:813dcc80987e 1211 */
mbed_official 610:813dcc80987e 1212 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 610:813dcc80987e 1213 {
mbed_official 610:813dcc80987e 1214 /* Check the parameters */
mbed_official 610:813dcc80987e 1215 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1216
mbed_official 610:813dcc80987e 1217 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 610:813dcc80987e 1218 {
mbed_official 610:813dcc80987e 1219 return HAL_BUSY;
mbed_official 610:813dcc80987e 1220 }
mbed_official 610:813dcc80987e 1221 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 610:813dcc80987e 1222 {
mbed_official 610:813dcc80987e 1223 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 610:813dcc80987e 1224 {
mbed_official 610:813dcc80987e 1225 return HAL_ERROR;
mbed_official 610:813dcc80987e 1226 }
mbed_official 610:813dcc80987e 1227 else
mbed_official 610:813dcc80987e 1228 {
mbed_official 610:813dcc80987e 1229 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 1230 }
mbed_official 610:813dcc80987e 1231 }
mbed_official 610:813dcc80987e 1232 switch (Channel)
mbed_official 610:813dcc80987e 1233 {
mbed_official 610:813dcc80987e 1234 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1235 {
mbed_official 610:813dcc80987e 1236 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1237 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 1238
mbed_official 610:813dcc80987e 1239 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1240 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1241
mbed_official 610:813dcc80987e 1242 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1243 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official 610:813dcc80987e 1244
mbed_official 610:813dcc80987e 1245 /* Enable the TIM Capture/Compare 1 DMA request */
mbed_official 610:813dcc80987e 1246 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 1247 }
mbed_official 610:813dcc80987e 1248 break;
mbed_official 610:813dcc80987e 1249
mbed_official 610:813dcc80987e 1250 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1251 {
mbed_official 610:813dcc80987e 1252 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1253 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 1254
mbed_official 610:813dcc80987e 1255 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1256 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1257
mbed_official 610:813dcc80987e 1258 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1259 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official 610:813dcc80987e 1260
mbed_official 610:813dcc80987e 1261 /* Enable the TIM Capture/Compare 2 DMA request */
mbed_official 610:813dcc80987e 1262 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 1263 }
mbed_official 610:813dcc80987e 1264 break;
mbed_official 610:813dcc80987e 1265
mbed_official 610:813dcc80987e 1266 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1267 {
mbed_official 610:813dcc80987e 1268 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1269 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 1270
mbed_official 610:813dcc80987e 1271 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1272 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1273
mbed_official 610:813dcc80987e 1274 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1275 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official 610:813dcc80987e 1276
mbed_official 610:813dcc80987e 1277 /* Enable the TIM Capture/Compare 3 DMA request */
mbed_official 610:813dcc80987e 1278 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 610:813dcc80987e 1279 }
mbed_official 610:813dcc80987e 1280 break;
mbed_official 610:813dcc80987e 1281
mbed_official 610:813dcc80987e 1282 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1283 {
mbed_official 610:813dcc80987e 1284 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1285 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 1286
mbed_official 610:813dcc80987e 1287 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1288 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1289
mbed_official 610:813dcc80987e 1290 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1291 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official 610:813dcc80987e 1292
mbed_official 610:813dcc80987e 1293 /* Enable the TIM Capture/Compare 4 DMA request */
mbed_official 610:813dcc80987e 1294 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 610:813dcc80987e 1295 }
mbed_official 610:813dcc80987e 1296 break;
mbed_official 610:813dcc80987e 1297
mbed_official 610:813dcc80987e 1298 default:
mbed_official 610:813dcc80987e 1299 break;
mbed_official 610:813dcc80987e 1300 }
mbed_official 610:813dcc80987e 1301
mbed_official 610:813dcc80987e 1302 /* Enable the complementary PWM output */
mbed_official 610:813dcc80987e 1303 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
mbed_official 610:813dcc80987e 1304
mbed_official 610:813dcc80987e 1305 /* Enable the Main Ouput */
mbed_official 610:813dcc80987e 1306 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 1307
mbed_official 610:813dcc80987e 1308 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 1309 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 1310
mbed_official 610:813dcc80987e 1311 /* Return function status */
mbed_official 610:813dcc80987e 1312 return HAL_OK;
mbed_official 610:813dcc80987e 1313 }
mbed_official 610:813dcc80987e 1314
mbed_official 610:813dcc80987e 1315 /**
mbed_official 610:813dcc80987e 1316 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
mbed_official 610:813dcc80987e 1317 * output
mbed_official 610:813dcc80987e 1318 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1319 * @param Channel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 1320 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1321 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1322 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1323 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1324 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1325 * @retval HAL status
mbed_official 610:813dcc80987e 1326 */
mbed_official 610:813dcc80987e 1327 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1328 {
mbed_official 610:813dcc80987e 1329 /* Check the parameters */
mbed_official 610:813dcc80987e 1330 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1331
mbed_official 610:813dcc80987e 1332 switch (Channel)
mbed_official 610:813dcc80987e 1333 {
mbed_official 610:813dcc80987e 1334 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1335 {
mbed_official 610:813dcc80987e 1336 /* Disable the TIM Capture/Compare 1 DMA request */
mbed_official 610:813dcc80987e 1337 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 1338 }
mbed_official 610:813dcc80987e 1339 break;
mbed_official 610:813dcc80987e 1340
mbed_official 610:813dcc80987e 1341 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1342 {
mbed_official 610:813dcc80987e 1343 /* Disable the TIM Capture/Compare 2 DMA request */
mbed_official 610:813dcc80987e 1344 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 1345 }
mbed_official 610:813dcc80987e 1346 break;
mbed_official 610:813dcc80987e 1347
mbed_official 610:813dcc80987e 1348 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1349 {
mbed_official 610:813dcc80987e 1350 /* Disable the TIM Capture/Compare 3 DMA request */
mbed_official 610:813dcc80987e 1351 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 610:813dcc80987e 1352 }
mbed_official 610:813dcc80987e 1353 break;
mbed_official 610:813dcc80987e 1354
mbed_official 610:813dcc80987e 1355 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1356 {
mbed_official 610:813dcc80987e 1357 /* Disable the TIM Capture/Compare 4 DMA request */
mbed_official 610:813dcc80987e 1358 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 610:813dcc80987e 1359 }
mbed_official 610:813dcc80987e 1360 break;
mbed_official 610:813dcc80987e 1361
mbed_official 610:813dcc80987e 1362 default:
mbed_official 610:813dcc80987e 1363 break;
mbed_official 610:813dcc80987e 1364 }
mbed_official 610:813dcc80987e 1365
mbed_official 610:813dcc80987e 1366 /* Disable the complementary PWM output */
mbed_official 610:813dcc80987e 1367 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
mbed_official 610:813dcc80987e 1368
mbed_official 610:813dcc80987e 1369 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 1370 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 1371
mbed_official 610:813dcc80987e 1372 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 1373 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1374
mbed_official 610:813dcc80987e 1375 /* Change the htim state */
mbed_official 610:813dcc80987e 1376 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 1377
mbed_official 610:813dcc80987e 1378 /* Return function status */
mbed_official 610:813dcc80987e 1379 return HAL_OK;
mbed_official 610:813dcc80987e 1380 }
mbed_official 610:813dcc80987e 1381
mbed_official 610:813dcc80987e 1382 /**
mbed_official 610:813dcc80987e 1383 * @}
mbed_official 610:813dcc80987e 1384 */
mbed_official 610:813dcc80987e 1385
mbed_official 610:813dcc80987e 1386 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
mbed_official 610:813dcc80987e 1387 * @brief Timer Complementary One Pulse functions
mbed_official 610:813dcc80987e 1388 *
mbed_official 610:813dcc80987e 1389 @verbatim
mbed_official 610:813dcc80987e 1390 ==============================================================================
mbed_official 610:813dcc80987e 1391 ##### Timer Complementary One Pulse functions #####
mbed_official 610:813dcc80987e 1392 ==============================================================================
mbed_official 610:813dcc80987e 1393 [..]
mbed_official 610:813dcc80987e 1394 This section provides functions allowing to:
mbed_official 610:813dcc80987e 1395 (+) Start the Complementary One Pulse generation.
mbed_official 610:813dcc80987e 1396 (+) Stop the Complementary One Pulse.
mbed_official 610:813dcc80987e 1397 (+) Start the Complementary One Pulse and enable interrupts.
mbed_official 610:813dcc80987e 1398 (+) Stop the Complementary One Pulse and disable interrupts.
mbed_official 610:813dcc80987e 1399
mbed_official 610:813dcc80987e 1400 @endverbatim
mbed_official 610:813dcc80987e 1401 * @{
mbed_official 610:813dcc80987e 1402 */
mbed_official 610:813dcc80987e 1403
mbed_official 610:813dcc80987e 1404 /**
mbed_official 610:813dcc80987e 1405 * @brief Starts the TIM One Pulse signal generation on the complementary
mbed_official 610:813dcc80987e 1406 * output.
mbed_official 610:813dcc80987e 1407 * @param htim : TIM One Pulse handle
mbed_official 610:813dcc80987e 1408 * @param OutputChannel : TIM Channel to be enabled
mbed_official 610:813dcc80987e 1409 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1410 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1411 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1412 * @retval HAL status
mbed_official 610:813dcc80987e 1413 */
mbed_official 610:813dcc80987e 1414 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 610:813dcc80987e 1415 {
mbed_official 610:813dcc80987e 1416 /* Check the parameters */
mbed_official 610:813dcc80987e 1417 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
mbed_official 610:813dcc80987e 1418
mbed_official 610:813dcc80987e 1419 /* Enable the complementary One Pulse output */
mbed_official 610:813dcc80987e 1420 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
mbed_official 610:813dcc80987e 1421
mbed_official 610:813dcc80987e 1422 /* Enable the Main Ouput */
mbed_official 610:813dcc80987e 1423 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 1424
mbed_official 610:813dcc80987e 1425 /* Return function status */
mbed_official 610:813dcc80987e 1426 return HAL_OK;
mbed_official 610:813dcc80987e 1427 }
mbed_official 610:813dcc80987e 1428
mbed_official 610:813dcc80987e 1429 /**
mbed_official 610:813dcc80987e 1430 * @brief Stops the TIM One Pulse signal generation on the complementary
mbed_official 610:813dcc80987e 1431 * output.
mbed_official 610:813dcc80987e 1432 * @param htim : TIM One Pulse handle
mbed_official 610:813dcc80987e 1433 * @param OutputChannel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 1434 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1435 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1436 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1437 * @retval HAL status
mbed_official 610:813dcc80987e 1438 */
mbed_official 610:813dcc80987e 1439 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 610:813dcc80987e 1440 {
mbed_official 610:813dcc80987e 1441
mbed_official 610:813dcc80987e 1442 /* Check the parameters */
mbed_official 610:813dcc80987e 1443 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
mbed_official 610:813dcc80987e 1444
mbed_official 610:813dcc80987e 1445 /* Disable the complementary One Pulse output */
mbed_official 610:813dcc80987e 1446 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
mbed_official 610:813dcc80987e 1447
mbed_official 610:813dcc80987e 1448 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 1449 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 1450
mbed_official 610:813dcc80987e 1451 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 1452 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1453
mbed_official 610:813dcc80987e 1454 /* Return function status */
mbed_official 610:813dcc80987e 1455 return HAL_OK;
mbed_official 610:813dcc80987e 1456 }
mbed_official 610:813dcc80987e 1457
mbed_official 610:813dcc80987e 1458 /**
mbed_official 610:813dcc80987e 1459 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
mbed_official 610:813dcc80987e 1460 * complementary channel.
mbed_official 610:813dcc80987e 1461 * @param htim : TIM One Pulse handle
mbed_official 610:813dcc80987e 1462 * @param OutputChannel : TIM Channel to be enabled
mbed_official 610:813dcc80987e 1463 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1464 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1465 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1466 * @retval HAL status
mbed_official 610:813dcc80987e 1467 */
mbed_official 610:813dcc80987e 1468 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 610:813dcc80987e 1469 {
mbed_official 610:813dcc80987e 1470 /* Check the parameters */
mbed_official 610:813dcc80987e 1471 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
mbed_official 610:813dcc80987e 1472
mbed_official 610:813dcc80987e 1473 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 1474 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 1475
mbed_official 610:813dcc80987e 1476 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 1477 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 1478
mbed_official 610:813dcc80987e 1479 /* Enable the complementary One Pulse output */
mbed_official 610:813dcc80987e 1480 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
mbed_official 610:813dcc80987e 1481
mbed_official 610:813dcc80987e 1482 /* Enable the Main Ouput */
mbed_official 610:813dcc80987e 1483 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 1484
mbed_official 610:813dcc80987e 1485 /* Return function status */
mbed_official 610:813dcc80987e 1486 return HAL_OK;
mbed_official 610:813dcc80987e 1487 }
mbed_official 610:813dcc80987e 1488
mbed_official 610:813dcc80987e 1489 /**
mbed_official 610:813dcc80987e 1490 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
mbed_official 610:813dcc80987e 1491 * complementary channel.
mbed_official 610:813dcc80987e 1492 * @param htim : TIM One Pulse handle
mbed_official 610:813dcc80987e 1493 * @param OutputChannel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 1494 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1495 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1496 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1497 * @retval HAL status
mbed_official 610:813dcc80987e 1498 */
mbed_official 610:813dcc80987e 1499 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 610:813dcc80987e 1500 {
mbed_official 610:813dcc80987e 1501 /* Check the parameters */
mbed_official 610:813dcc80987e 1502 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
mbed_official 610:813dcc80987e 1503
mbed_official 610:813dcc80987e 1504 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 1505 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 1506
mbed_official 610:813dcc80987e 1507 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 1508 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 1509
mbed_official 610:813dcc80987e 1510 /* Disable the complementary One Pulse output */
mbed_official 610:813dcc80987e 1511 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
mbed_official 610:813dcc80987e 1512
mbed_official 610:813dcc80987e 1513 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 1514 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 1515
mbed_official 610:813dcc80987e 1516 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 1517 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1518
mbed_official 610:813dcc80987e 1519 /* Return function status */
mbed_official 610:813dcc80987e 1520 return HAL_OK;
mbed_official 610:813dcc80987e 1521 }
mbed_official 610:813dcc80987e 1522
mbed_official 610:813dcc80987e 1523 /**
mbed_official 610:813dcc80987e 1524 * @}
mbed_official 610:813dcc80987e 1525 */
mbed_official 610:813dcc80987e 1526
mbed_official 610:813dcc80987e 1527 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
mbed_official 610:813dcc80987e 1528 * @brief Peripheral Control functions
mbed_official 610:813dcc80987e 1529 *
mbed_official 610:813dcc80987e 1530 @verbatim
mbed_official 610:813dcc80987e 1531 ==============================================================================
mbed_official 610:813dcc80987e 1532 ##### Peripheral Control functions #####
mbed_official 610:813dcc80987e 1533 ==============================================================================
mbed_official 610:813dcc80987e 1534 [..]
mbed_official 610:813dcc80987e 1535 This section provides functions allowing to:
mbed_official 610:813dcc80987e 1536 (+) Configure the commutation event in case of use of the Hall sensor interface.
mbed_official 610:813dcc80987e 1537 (+) Configure Output channels for OC and PWM mode.
mbed_official 610:813dcc80987e 1538
mbed_official 610:813dcc80987e 1539 (+) Configure Complementary channels, break features and dead time.
mbed_official 610:813dcc80987e 1540 (+) Configure Master synchronization.
mbed_official 610:813dcc80987e 1541 (+) Configure timer remapping capabilities.
mbed_official 610:813dcc80987e 1542 (+) Enable or disable channel grouping
mbed_official 610:813dcc80987e 1543
mbed_official 610:813dcc80987e 1544 @endverbatim
mbed_official 610:813dcc80987e 1545 * @{
mbed_official 610:813dcc80987e 1546 */
mbed_official 610:813dcc80987e 1547
mbed_official 610:813dcc80987e 1548 /**
mbed_official 610:813dcc80987e 1549 * @brief Configure the TIM commutation event sequence.
mbed_official 610:813dcc80987e 1550 * @note This function is mandatory to use the commutation event in order to
mbed_official 610:813dcc80987e 1551 * update the configuration at each commutation detection on the TRGI input of the Timer,
mbed_official 610:813dcc80987e 1552 * the typical use of this feature is with the use of another Timer(interface Timer)
mbed_official 610:813dcc80987e 1553 * configured in Hall sensor interface, this interface Timer will generate the
mbed_official 610:813dcc80987e 1554 * commutation at its TRGO output (connected to Timer used in this function) each time
mbed_official 610:813dcc80987e 1555 * the TI1 of the Interface Timer detect a commutation at its input TI1.
mbed_official 610:813dcc80987e 1556 * @param htim: TIM handle
mbed_official 610:813dcc80987e 1557 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
mbed_official 610:813dcc80987e 1558 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1559 * @arg TIM_TS_ITR0: Internal trigger 0 selected
mbed_official 610:813dcc80987e 1560 * @arg TIM_TS_ITR1: Internal trigger 1 selected
mbed_official 610:813dcc80987e 1561 * @arg TIM_TS_ITR2: Internal trigger 2 selected
mbed_official 610:813dcc80987e 1562 * @arg TIM_TS_ITR3: Internal trigger 3 selected
mbed_official 610:813dcc80987e 1563 * @arg TIM_TS_NONE: No trigger is needed
mbed_official 610:813dcc80987e 1564 * @param CommutationSource : the Commutation Event source
mbed_official 610:813dcc80987e 1565 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1566 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
mbed_official 610:813dcc80987e 1567 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
mbed_official 610:813dcc80987e 1568 * @retval HAL status
mbed_official 610:813dcc80987e 1569 */
mbed_official 610:813dcc80987e 1570 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
mbed_official 610:813dcc80987e 1571 {
mbed_official 610:813dcc80987e 1572 /* Check the parameters */
mbed_official 610:813dcc80987e 1573 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1574 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
mbed_official 610:813dcc80987e 1575
mbed_official 610:813dcc80987e 1576 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 1577
mbed_official 610:813dcc80987e 1578 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
mbed_official 610:813dcc80987e 1579 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
mbed_official 610:813dcc80987e 1580 {
mbed_official 610:813dcc80987e 1581 /* Select the Input trigger */
mbed_official 610:813dcc80987e 1582 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 610:813dcc80987e 1583 htim->Instance->SMCR |= InputTrigger;
mbed_official 610:813dcc80987e 1584 }
mbed_official 610:813dcc80987e 1585
mbed_official 610:813dcc80987e 1586 /* Select the Capture Compare preload feature */
mbed_official 610:813dcc80987e 1587 htim->Instance->CR2 |= TIM_CR2_CCPC;
mbed_official 610:813dcc80987e 1588 /* Select the Commutation event source */
mbed_official 610:813dcc80987e 1589 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
mbed_official 610:813dcc80987e 1590 htim->Instance->CR2 |= CommutationSource;
mbed_official 610:813dcc80987e 1591
mbed_official 610:813dcc80987e 1592 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 1593
mbed_official 610:813dcc80987e 1594 return HAL_OK;
mbed_official 610:813dcc80987e 1595 }
mbed_official 610:813dcc80987e 1596
mbed_official 610:813dcc80987e 1597 /**
mbed_official 610:813dcc80987e 1598 * @brief Configure the TIM commutation event sequence with interrupt.
mbed_official 610:813dcc80987e 1599 * @note This function is mandatory to use the commutation event in order to
mbed_official 610:813dcc80987e 1600 * update the configuration at each commutation detection on the TRGI input of the Timer,
mbed_official 610:813dcc80987e 1601 * the typical use of this feature is with the use of another Timer(interface Timer)
mbed_official 610:813dcc80987e 1602 * configured in Hall sensor interface, this interface Timer will generate the
mbed_official 610:813dcc80987e 1603 * commutation at its TRGO output (connected to Timer used in this function) each time
mbed_official 610:813dcc80987e 1604 * the TI1 of the Interface Timer detect a commutation at its input TI1.
mbed_official 610:813dcc80987e 1605 * @param htim: TIM handle
mbed_official 610:813dcc80987e 1606 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
mbed_official 610:813dcc80987e 1607 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1608 * @arg TIM_TS_ITR0: Internal trigger 0 selected
mbed_official 610:813dcc80987e 1609 * @arg TIM_TS_ITR1: Internal trigger 1 selected
mbed_official 610:813dcc80987e 1610 * @arg TIM_TS_ITR2: Internal trigger 2 selected
mbed_official 610:813dcc80987e 1611 * @arg TIM_TS_ITR3: Internal trigger 3 selected
mbed_official 610:813dcc80987e 1612 * @arg TIM_TS_NONE: No trigger is needed
mbed_official 610:813dcc80987e 1613 * @param CommutationSource : the Commutation Event source
mbed_official 610:813dcc80987e 1614 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1615 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
mbed_official 610:813dcc80987e 1616 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
mbed_official 610:813dcc80987e 1617 * @retval HAL status
mbed_official 610:813dcc80987e 1618 */
mbed_official 610:813dcc80987e 1619 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
mbed_official 610:813dcc80987e 1620 {
mbed_official 610:813dcc80987e 1621 /* Check the parameters */
mbed_official 610:813dcc80987e 1622 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1623 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
mbed_official 610:813dcc80987e 1624
mbed_official 610:813dcc80987e 1625 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 1626
mbed_official 610:813dcc80987e 1627 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
mbed_official 610:813dcc80987e 1628 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
mbed_official 610:813dcc80987e 1629 {
mbed_official 610:813dcc80987e 1630 /* Select the Input trigger */
mbed_official 610:813dcc80987e 1631 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 610:813dcc80987e 1632 htim->Instance->SMCR |= InputTrigger;
mbed_official 610:813dcc80987e 1633 }
mbed_official 610:813dcc80987e 1634
mbed_official 610:813dcc80987e 1635 /* Select the Capture Compare preload feature */
mbed_official 610:813dcc80987e 1636 htim->Instance->CR2 |= TIM_CR2_CCPC;
mbed_official 610:813dcc80987e 1637 /* Select the Commutation event source */
mbed_official 610:813dcc80987e 1638 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
mbed_official 610:813dcc80987e 1639 htim->Instance->CR2 |= CommutationSource;
mbed_official 610:813dcc80987e 1640
mbed_official 610:813dcc80987e 1641 /* Enable the Commutation Interrupt Request */
mbed_official 610:813dcc80987e 1642 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
mbed_official 610:813dcc80987e 1643
mbed_official 610:813dcc80987e 1644 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 1645
mbed_official 610:813dcc80987e 1646 return HAL_OK;
mbed_official 610:813dcc80987e 1647 }
mbed_official 610:813dcc80987e 1648
mbed_official 610:813dcc80987e 1649 /**
mbed_official 610:813dcc80987e 1650 * @brief Configure the TIM commutation event sequence with DMA.
mbed_official 610:813dcc80987e 1651 * @note This function is mandatory to use the commutation event in order to
mbed_official 610:813dcc80987e 1652 * update the configuration at each commutation detection on the TRGI input of the Timer,
mbed_official 610:813dcc80987e 1653 * the typical use of this feature is with the use of another Timer(interface Timer)
mbed_official 610:813dcc80987e 1654 * configured in Hall sensor interface, this interface Timer will generate the
mbed_official 610:813dcc80987e 1655 * commutation at its TRGO output (connected to Timer used in this function) each time
mbed_official 610:813dcc80987e 1656 * the TI1 of the Interface Timer detect a commutation at its input TI1.
mbed_official 610:813dcc80987e 1657 * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
mbed_official 610:813dcc80987e 1658 * @param htim: TIM handle
mbed_official 610:813dcc80987e 1659 * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
mbed_official 610:813dcc80987e 1660 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1661 * @arg TIM_TS_ITR0: Internal trigger 0 selected
mbed_official 610:813dcc80987e 1662 * @arg TIM_TS_ITR1: Internal trigger 1 selected
mbed_official 610:813dcc80987e 1663 * @arg TIM_TS_ITR2: Internal trigger 2 selected
mbed_official 610:813dcc80987e 1664 * @arg TIM_TS_ITR3: Internal trigger 3 selected
mbed_official 610:813dcc80987e 1665 * @arg TIM_TS_NONE: No trigger is needed
mbed_official 610:813dcc80987e 1666 * @param CommutationSource : the Commutation Event source
mbed_official 610:813dcc80987e 1667 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1668 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
mbed_official 610:813dcc80987e 1669 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
mbed_official 610:813dcc80987e 1670 * @retval HAL status
mbed_official 610:813dcc80987e 1671 */
mbed_official 610:813dcc80987e 1672 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
mbed_official 610:813dcc80987e 1673 {
mbed_official 610:813dcc80987e 1674 /* Check the parameters */
mbed_official 610:813dcc80987e 1675 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1676 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
mbed_official 610:813dcc80987e 1677
mbed_official 610:813dcc80987e 1678 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 1679
mbed_official 610:813dcc80987e 1680 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
mbed_official 610:813dcc80987e 1681 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
mbed_official 610:813dcc80987e 1682 {
mbed_official 610:813dcc80987e 1683 /* Select the Input trigger */
mbed_official 610:813dcc80987e 1684 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 610:813dcc80987e 1685 htim->Instance->SMCR |= InputTrigger;
mbed_official 610:813dcc80987e 1686 }
mbed_official 610:813dcc80987e 1687
mbed_official 610:813dcc80987e 1688 /* Select the Capture Compare preload feature */
mbed_official 610:813dcc80987e 1689 htim->Instance->CR2 |= TIM_CR2_CCPC;
mbed_official 610:813dcc80987e 1690 /* Select the Commutation event source */
mbed_official 610:813dcc80987e 1691 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
mbed_official 610:813dcc80987e 1692 htim->Instance->CR2 |= CommutationSource;
mbed_official 610:813dcc80987e 1693
mbed_official 610:813dcc80987e 1694 /* Enable the Commutation DMA Request */
mbed_official 610:813dcc80987e 1695 /* Set the DMA Commutation Callback */
mbed_official 610:813dcc80987e 1696 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
mbed_official 610:813dcc80987e 1697 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1698 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
mbed_official 610:813dcc80987e 1699
mbed_official 610:813dcc80987e 1700 /* Enable the Commutation DMA Request */
mbed_official 610:813dcc80987e 1701 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
mbed_official 610:813dcc80987e 1702
mbed_official 610:813dcc80987e 1703 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 1704
mbed_official 610:813dcc80987e 1705 return HAL_OK;
mbed_official 610:813dcc80987e 1706 }
mbed_official 610:813dcc80987e 1707
mbed_official 610:813dcc80987e 1708 /**
mbed_official 610:813dcc80987e 1709 * @brief Initializes the TIM Output Compare Channels according to the specified
mbed_official 610:813dcc80987e 1710 * parameters in the TIM_OC_InitTypeDef.
mbed_official 610:813dcc80987e 1711 * @param htim: TIM Output Compare handle
mbed_official 610:813dcc80987e 1712 * @param sConfig: TIM Output Compare configuration structure
mbed_official 610:813dcc80987e 1713 * @param Channel : TIM Channels to configure
mbed_official 610:813dcc80987e 1714 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1715 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1716 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1717 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1718 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1719 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official 610:813dcc80987e 1720 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official 610:813dcc80987e 1721 * @arg TIM_CHANNEL_ALL: all output channels supported by the timer instance selected
mbed_official 610:813dcc80987e 1722 * @retval HAL status
mbed_official 610:813dcc80987e 1723 */
mbed_official 610:813dcc80987e 1724 HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim,
mbed_official 610:813dcc80987e 1725 TIM_OC_InitTypeDef* sConfig,
mbed_official 610:813dcc80987e 1726 uint32_t Channel)
mbed_official 610:813dcc80987e 1727 {
mbed_official 610:813dcc80987e 1728 /* Check the parameters */
mbed_official 610:813dcc80987e 1729 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 610:813dcc80987e 1730 assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
mbed_official 610:813dcc80987e 1731 assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official 610:813dcc80987e 1732 assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
mbed_official 610:813dcc80987e 1733 assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
mbed_official 610:813dcc80987e 1734 assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
mbed_official 610:813dcc80987e 1735
mbed_official 610:813dcc80987e 1736 /* Check input state */
mbed_official 610:813dcc80987e 1737 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 1738
mbed_official 610:813dcc80987e 1739 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 1740
mbed_official 610:813dcc80987e 1741 switch (Channel)
mbed_official 610:813dcc80987e 1742 {
mbed_official 610:813dcc80987e 1743 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1744 {
mbed_official 610:813dcc80987e 1745 /* Check the parameters */
mbed_official 610:813dcc80987e 1746 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1747
mbed_official 610:813dcc80987e 1748 /* Configure the TIM Channel 1 in Output Compare */
mbed_official 610:813dcc80987e 1749 TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1750 }
mbed_official 610:813dcc80987e 1751 break;
mbed_official 610:813dcc80987e 1752
mbed_official 610:813dcc80987e 1753 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1754 {
mbed_official 610:813dcc80987e 1755 /* Check the parameters */
mbed_official 610:813dcc80987e 1756 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1757
mbed_official 610:813dcc80987e 1758 /* Configure the TIM Channel 2 in Output Compare */
mbed_official 610:813dcc80987e 1759 TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1760 }
mbed_official 610:813dcc80987e 1761 break;
mbed_official 610:813dcc80987e 1762
mbed_official 610:813dcc80987e 1763 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1764 {
mbed_official 610:813dcc80987e 1765 /* Check the parameters */
mbed_official 610:813dcc80987e 1766 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1767
mbed_official 610:813dcc80987e 1768 /* Configure the TIM Channel 3 in Output Compare */
mbed_official 610:813dcc80987e 1769 TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1770 }
mbed_official 610:813dcc80987e 1771 break;
mbed_official 610:813dcc80987e 1772
mbed_official 610:813dcc80987e 1773 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1774 {
mbed_official 610:813dcc80987e 1775 /* Check the parameters */
mbed_official 610:813dcc80987e 1776 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1777
mbed_official 610:813dcc80987e 1778 /* Configure the TIM Channel 4 in Output Compare */
mbed_official 610:813dcc80987e 1779 TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1780 }
mbed_official 610:813dcc80987e 1781 break;
mbed_official 610:813dcc80987e 1782
mbed_official 610:813dcc80987e 1783 case TIM_CHANNEL_5:
mbed_official 610:813dcc80987e 1784 {
mbed_official 610:813dcc80987e 1785 /* Check the parameters */
mbed_official 610:813dcc80987e 1786 assert_param(IS_TIM_CC5_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1787
mbed_official 610:813dcc80987e 1788 /* Configure the TIM Channel 5 in Output Compare */
mbed_official 610:813dcc80987e 1789 TIM_OC5_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1790 }
mbed_official 610:813dcc80987e 1791 break;
mbed_official 610:813dcc80987e 1792
mbed_official 610:813dcc80987e 1793 case TIM_CHANNEL_6:
mbed_official 610:813dcc80987e 1794 {
mbed_official 610:813dcc80987e 1795 /* Check the parameters */
mbed_official 610:813dcc80987e 1796 assert_param(IS_TIM_CC6_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1797
mbed_official 610:813dcc80987e 1798 /* Configure the TIM Channel 6 in Output Compare */
mbed_official 610:813dcc80987e 1799 TIM_OC6_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1800 }
mbed_official 610:813dcc80987e 1801 break;
mbed_official 610:813dcc80987e 1802
mbed_official 610:813dcc80987e 1803 default:
mbed_official 610:813dcc80987e 1804 break;
mbed_official 610:813dcc80987e 1805 }
mbed_official 610:813dcc80987e 1806
mbed_official 610:813dcc80987e 1807 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 1808
mbed_official 610:813dcc80987e 1809 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 1810
mbed_official 610:813dcc80987e 1811 return HAL_OK;
mbed_official 610:813dcc80987e 1812 }
mbed_official 610:813dcc80987e 1813
mbed_official 610:813dcc80987e 1814 /**
mbed_official 610:813dcc80987e 1815 * @brief Initializes the TIM PWM channels according to the specified
mbed_official 610:813dcc80987e 1816 * parameters in the TIM_OC_InitTypeDef.
mbed_official 610:813dcc80987e 1817 * @param htim: TIM PWM handle
mbed_official 610:813dcc80987e 1818 * @param sConfig: TIM PWM configuration structure
mbed_official 610:813dcc80987e 1819 * @param Channel : TIM Channels to be configured
mbed_official 610:813dcc80987e 1820 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1821 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1822 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1823 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1824 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1825 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official 610:813dcc80987e 1826 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official 610:813dcc80987e 1827 * @arg TIM_CHANNEL_ALL: all PWM channels supported by the timer instance selected
mbed_official 610:813dcc80987e 1828 * @retval HAL status
mbed_official 610:813dcc80987e 1829 */
mbed_official 610:813dcc80987e 1830 HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
mbed_official 610:813dcc80987e 1831 TIM_OC_InitTypeDef* sConfig,
mbed_official 610:813dcc80987e 1832 uint32_t Channel)
mbed_official 610:813dcc80987e 1833 {
mbed_official 610:813dcc80987e 1834 /* Check the parameters */
mbed_official 610:813dcc80987e 1835 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 610:813dcc80987e 1836 assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
mbed_official 610:813dcc80987e 1837 assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official 610:813dcc80987e 1838 assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
mbed_official 610:813dcc80987e 1839 assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
mbed_official 610:813dcc80987e 1840 assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
mbed_official 610:813dcc80987e 1841 assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
mbed_official 610:813dcc80987e 1842
mbed_official 610:813dcc80987e 1843 /* Check input state */
mbed_official 610:813dcc80987e 1844 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 1845
mbed_official 610:813dcc80987e 1846 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 1847
mbed_official 610:813dcc80987e 1848 switch (Channel)
mbed_official 610:813dcc80987e 1849 {
mbed_official 610:813dcc80987e 1850 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1851 {
mbed_official 610:813dcc80987e 1852 /* Check the parameters */
mbed_official 610:813dcc80987e 1853 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1854
mbed_official 610:813dcc80987e 1855 /* Configure the Channel 1 in PWM mode */
mbed_official 610:813dcc80987e 1856 TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1857
mbed_official 610:813dcc80987e 1858 /* Set the Preload enable bit for channel1 */
mbed_official 610:813dcc80987e 1859 htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
mbed_official 610:813dcc80987e 1860
mbed_official 610:813dcc80987e 1861 /* Configure the Output Fast mode */
mbed_official 610:813dcc80987e 1862 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
mbed_official 610:813dcc80987e 1863 htim->Instance->CCMR1 |= sConfig->OCFastMode;
mbed_official 610:813dcc80987e 1864 }
mbed_official 610:813dcc80987e 1865 break;
mbed_official 610:813dcc80987e 1866
mbed_official 610:813dcc80987e 1867 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1868 {
mbed_official 610:813dcc80987e 1869 /* Check the parameters */
mbed_official 610:813dcc80987e 1870 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1871
mbed_official 610:813dcc80987e 1872 /* Configure the Channel 2 in PWM mode */
mbed_official 610:813dcc80987e 1873 TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1874
mbed_official 610:813dcc80987e 1875 /* Set the Preload enable bit for channel2 */
mbed_official 610:813dcc80987e 1876 htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
mbed_official 610:813dcc80987e 1877
mbed_official 610:813dcc80987e 1878 /* Configure the Output Fast mode */
mbed_official 610:813dcc80987e 1879 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
mbed_official 610:813dcc80987e 1880 htim->Instance->CCMR1 |= sConfig->OCFastMode << 8;
mbed_official 610:813dcc80987e 1881 }
mbed_official 610:813dcc80987e 1882 break;
mbed_official 610:813dcc80987e 1883
mbed_official 610:813dcc80987e 1884 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1885 {
mbed_official 610:813dcc80987e 1886 /* Check the parameters */
mbed_official 610:813dcc80987e 1887 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1888
mbed_official 610:813dcc80987e 1889 /* Configure the Channel 3 in PWM mode */
mbed_official 610:813dcc80987e 1890 TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1891
mbed_official 610:813dcc80987e 1892 /* Set the Preload enable bit for channel3 */
mbed_official 610:813dcc80987e 1893 htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
mbed_official 610:813dcc80987e 1894
mbed_official 610:813dcc80987e 1895 /* Configure the Output Fast mode */
mbed_official 610:813dcc80987e 1896 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
mbed_official 610:813dcc80987e 1897 htim->Instance->CCMR2 |= sConfig->OCFastMode;
mbed_official 610:813dcc80987e 1898 }
mbed_official 610:813dcc80987e 1899 break;
mbed_official 610:813dcc80987e 1900
mbed_official 610:813dcc80987e 1901 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1902 {
mbed_official 610:813dcc80987e 1903 /* Check the parameters */
mbed_official 610:813dcc80987e 1904 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1905
mbed_official 610:813dcc80987e 1906 /* Configure the Channel 4 in PWM mode */
mbed_official 610:813dcc80987e 1907 TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1908
mbed_official 610:813dcc80987e 1909 /* Set the Preload enable bit for channel4 */
mbed_official 610:813dcc80987e 1910 htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
mbed_official 610:813dcc80987e 1911
mbed_official 610:813dcc80987e 1912 /* Configure the Output Fast mode */
mbed_official 610:813dcc80987e 1913 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
mbed_official 610:813dcc80987e 1914 htim->Instance->CCMR2 |= sConfig->OCFastMode << 8;
mbed_official 610:813dcc80987e 1915 }
mbed_official 610:813dcc80987e 1916 break;
mbed_official 610:813dcc80987e 1917
mbed_official 610:813dcc80987e 1918 case TIM_CHANNEL_5:
mbed_official 610:813dcc80987e 1919 {
mbed_official 610:813dcc80987e 1920 /* Check the parameters */
mbed_official 610:813dcc80987e 1921 assert_param(IS_TIM_CC5_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1922
mbed_official 610:813dcc80987e 1923 /* Configure the Channel 5 in PWM mode */
mbed_official 610:813dcc80987e 1924 TIM_OC5_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1925
mbed_official 610:813dcc80987e 1926 /* Set the Preload enable bit for channel5*/
mbed_official 610:813dcc80987e 1927 htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE;
mbed_official 610:813dcc80987e 1928
mbed_official 610:813dcc80987e 1929 /* Configure the Output Fast mode */
mbed_official 610:813dcc80987e 1930 htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE;
mbed_official 610:813dcc80987e 1931 htim->Instance->CCMR3 |= sConfig->OCFastMode;
mbed_official 610:813dcc80987e 1932 }
mbed_official 610:813dcc80987e 1933 break;
mbed_official 610:813dcc80987e 1934
mbed_official 610:813dcc80987e 1935 case TIM_CHANNEL_6:
mbed_official 610:813dcc80987e 1936 {
mbed_official 610:813dcc80987e 1937 /* Check the parameters */
mbed_official 610:813dcc80987e 1938 assert_param(IS_TIM_CC6_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1939
mbed_official 610:813dcc80987e 1940 /* Configure the Channel 5 in PWM mode */
mbed_official 610:813dcc80987e 1941 TIM_OC6_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 1942
mbed_official 610:813dcc80987e 1943 /* Set the Preload enable bit for channel6 */
mbed_official 610:813dcc80987e 1944 htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE;
mbed_official 610:813dcc80987e 1945
mbed_official 610:813dcc80987e 1946 /* Configure the Output Fast mode */
mbed_official 610:813dcc80987e 1947 htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE;
mbed_official 610:813dcc80987e 1948 htim->Instance->CCMR3 |= sConfig->OCFastMode << 8;
mbed_official 610:813dcc80987e 1949 }
mbed_official 610:813dcc80987e 1950 break;
mbed_official 610:813dcc80987e 1951
mbed_official 610:813dcc80987e 1952 default:
mbed_official 610:813dcc80987e 1953 break;
mbed_official 610:813dcc80987e 1954 }
mbed_official 610:813dcc80987e 1955
mbed_official 610:813dcc80987e 1956 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 1957
mbed_official 610:813dcc80987e 1958 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 1959
mbed_official 610:813dcc80987e 1960 return HAL_OK;
mbed_official 610:813dcc80987e 1961 }
mbed_official 610:813dcc80987e 1962
mbed_official 610:813dcc80987e 1963 /**
mbed_official 610:813dcc80987e 1964 * @brief Configures the OCRef clear feature
mbed_official 610:813dcc80987e 1965 * @param htim: TIM handle
mbed_official 610:813dcc80987e 1966 * @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that
mbed_official 610:813dcc80987e 1967 * contains the OCREF clear feature and parameters for the TIM peripheral.
mbed_official 610:813dcc80987e 1968 * @param Channel: specifies the TIM Channel
mbed_official 610:813dcc80987e 1969 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1970 * @arg TIM_Channel_1: TIM Channel 1
mbed_official 610:813dcc80987e 1971 * @arg TIM_Channel_2: TIM Channel 2
mbed_official 610:813dcc80987e 1972 * @arg TIM_Channel_3: TIM Channel 3
mbed_official 610:813dcc80987e 1973 * @arg TIM_Channel_4: TIM Channel 4
mbed_official 610:813dcc80987e 1974 * @arg TIM_Channel_5: TIM Channel 5
mbed_official 610:813dcc80987e 1975 * @arg TIM_Channel_6: TIM Channel 6
mbed_official 610:813dcc80987e 1976 * @retval None
mbed_official 610:813dcc80987e 1977 */
mbed_official 610:813dcc80987e 1978 HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
mbed_official 610:813dcc80987e 1979 TIM_ClearInputConfigTypeDef *sClearInputConfig,
mbed_official 610:813dcc80987e 1980 uint32_t Channel)
mbed_official 610:813dcc80987e 1981 {
mbed_official 610:813dcc80987e 1982 uint32_t tmpsmcr = 0;
mbed_official 610:813dcc80987e 1983
mbed_official 610:813dcc80987e 1984 /* Check the parameters */
mbed_official 610:813dcc80987e 1985 assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1986 assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
mbed_official 610:813dcc80987e 1987
mbed_official 610:813dcc80987e 1988 /* Check input state */
mbed_official 610:813dcc80987e 1989 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 1990
mbed_official 610:813dcc80987e 1991 switch (sClearInputConfig->ClearInputSource)
mbed_official 610:813dcc80987e 1992 {
mbed_official 610:813dcc80987e 1993 case TIM_CLEARINPUTSOURCE_NONE:
mbed_official 610:813dcc80987e 1994 {
mbed_official 610:813dcc80987e 1995 /* Get the TIMx SMCR register value */
mbed_official 610:813dcc80987e 1996 tmpsmcr = htim->Instance->SMCR;
mbed_official 610:813dcc80987e 1997
mbed_official 610:813dcc80987e 1998 /* Clear the OCREF clear selection bit */
mbed_official 610:813dcc80987e 1999 tmpsmcr &= ~TIM_SMCR_OCCS;
mbed_official 610:813dcc80987e 2000
mbed_official 610:813dcc80987e 2001 /* Clear the ETR Bits */
mbed_official 610:813dcc80987e 2002 tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
mbed_official 610:813dcc80987e 2003
mbed_official 610:813dcc80987e 2004 /* Set TIMx_SMCR */
mbed_official 610:813dcc80987e 2005 htim->Instance->SMCR = tmpsmcr;
mbed_official 610:813dcc80987e 2006 }
mbed_official 610:813dcc80987e 2007 break;
mbed_official 610:813dcc80987e 2008
mbed_official 610:813dcc80987e 2009 case TIM_CLEARINPUTSOURCE_OCREFCLR:
mbed_official 610:813dcc80987e 2010 {
mbed_official 610:813dcc80987e 2011 /* Clear the OCREF clear selection bit */
mbed_official 610:813dcc80987e 2012 htim->Instance->SMCR &= ~TIM_SMCR_OCCS;
mbed_official 610:813dcc80987e 2013 }
mbed_official 610:813dcc80987e 2014 break;
mbed_official 610:813dcc80987e 2015
mbed_official 610:813dcc80987e 2016 case TIM_CLEARINPUTSOURCE_ETR:
mbed_official 610:813dcc80987e 2017 {
mbed_official 610:813dcc80987e 2018 /* Check the parameters */
mbed_official 610:813dcc80987e 2019 assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
mbed_official 610:813dcc80987e 2020 assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
mbed_official 610:813dcc80987e 2021 assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
mbed_official 610:813dcc80987e 2022
mbed_official 610:813dcc80987e 2023 TIM_ETR_SetConfig(htim->Instance,
mbed_official 610:813dcc80987e 2024 sClearInputConfig->ClearInputPrescaler,
mbed_official 610:813dcc80987e 2025 sClearInputConfig->ClearInputPolarity,
mbed_official 610:813dcc80987e 2026 sClearInputConfig->ClearInputFilter);
mbed_official 610:813dcc80987e 2027
mbed_official 610:813dcc80987e 2028 /* Set the OCREF clear selection bit */
mbed_official 610:813dcc80987e 2029 htim->Instance->SMCR |= TIM_SMCR_OCCS;
mbed_official 610:813dcc80987e 2030 }
mbed_official 610:813dcc80987e 2031 break;
mbed_official 610:813dcc80987e 2032
mbed_official 610:813dcc80987e 2033 default:
mbed_official 610:813dcc80987e 2034 break;
mbed_official 610:813dcc80987e 2035 }
mbed_official 610:813dcc80987e 2036
mbed_official 610:813dcc80987e 2037 switch (Channel)
mbed_official 610:813dcc80987e 2038 {
mbed_official 610:813dcc80987e 2039 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 2040 {
mbed_official 610:813dcc80987e 2041 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 610:813dcc80987e 2042 {
mbed_official 610:813dcc80987e 2043 /* Enable the OCREF clear feature for Channel 1 */
mbed_official 610:813dcc80987e 2044 htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE;
mbed_official 610:813dcc80987e 2045 }
mbed_official 610:813dcc80987e 2046 else
mbed_official 610:813dcc80987e 2047 {
mbed_official 610:813dcc80987e 2048 /* Disable the OCREF clear feature for Channel 1 */
mbed_official 610:813dcc80987e 2049 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;
mbed_official 610:813dcc80987e 2050 }
mbed_official 610:813dcc80987e 2051 }
mbed_official 610:813dcc80987e 2052 break;
mbed_official 610:813dcc80987e 2053 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 2054 {
mbed_official 610:813dcc80987e 2055 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 610:813dcc80987e 2056 {
mbed_official 610:813dcc80987e 2057 /* Enable the OCREF clear feature for Channel 2 */
mbed_official 610:813dcc80987e 2058 htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE;
mbed_official 610:813dcc80987e 2059 }
mbed_official 610:813dcc80987e 2060 else
mbed_official 610:813dcc80987e 2061 {
mbed_official 610:813dcc80987e 2062 /* Disable the OCREF clear feature for Channel 2 */
mbed_official 610:813dcc80987e 2063 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;
mbed_official 610:813dcc80987e 2064 }
mbed_official 610:813dcc80987e 2065 }
mbed_official 610:813dcc80987e 2066 break;
mbed_official 610:813dcc80987e 2067 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 2068 {
mbed_official 610:813dcc80987e 2069 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 610:813dcc80987e 2070 {
mbed_official 610:813dcc80987e 2071 /* Enable the OCREF clear feature for Channel 3 */
mbed_official 610:813dcc80987e 2072 htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE;
mbed_official 610:813dcc80987e 2073 }
mbed_official 610:813dcc80987e 2074 else
mbed_official 610:813dcc80987e 2075 {
mbed_official 610:813dcc80987e 2076 /* Disable the OCREF clear feature for Channel 3 */
mbed_official 610:813dcc80987e 2077 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;
mbed_official 610:813dcc80987e 2078 }
mbed_official 610:813dcc80987e 2079 }
mbed_official 610:813dcc80987e 2080 break;
mbed_official 610:813dcc80987e 2081 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 2082 {
mbed_official 610:813dcc80987e 2083 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 610:813dcc80987e 2084 {
mbed_official 610:813dcc80987e 2085 /* Enable the OCREF clear feature for Channel 4 */
mbed_official 610:813dcc80987e 2086 htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE;
mbed_official 610:813dcc80987e 2087 }
mbed_official 610:813dcc80987e 2088 else
mbed_official 610:813dcc80987e 2089 {
mbed_official 610:813dcc80987e 2090 /* Disable the OCREF clear feature for Channel 4 */
mbed_official 610:813dcc80987e 2091 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;
mbed_official 610:813dcc80987e 2092 }
mbed_official 610:813dcc80987e 2093 }
mbed_official 610:813dcc80987e 2094 break;
mbed_official 610:813dcc80987e 2095 case TIM_CHANNEL_5:
mbed_official 610:813dcc80987e 2096 {
mbed_official 610:813dcc80987e 2097 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 610:813dcc80987e 2098 {
mbed_official 610:813dcc80987e 2099 /* Enable the OCREF clear feature for Channel 1 */
mbed_official 610:813dcc80987e 2100 htim->Instance->CCMR3 |= TIM_CCMR3_OC5CE;
mbed_official 610:813dcc80987e 2101 }
mbed_official 610:813dcc80987e 2102 else
mbed_official 610:813dcc80987e 2103 {
mbed_official 610:813dcc80987e 2104 /* Disable the OCREF clear feature for Channel 1 */
mbed_official 610:813dcc80987e 2105 htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5CE;
mbed_official 610:813dcc80987e 2106 }
mbed_official 610:813dcc80987e 2107 }
mbed_official 610:813dcc80987e 2108 break;
mbed_official 610:813dcc80987e 2109 case TIM_CHANNEL_6:
mbed_official 610:813dcc80987e 2110 {
mbed_official 610:813dcc80987e 2111 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 610:813dcc80987e 2112 {
mbed_official 610:813dcc80987e 2113 /* Enable the OCREF clear feature for Channel 1 */
mbed_official 610:813dcc80987e 2114 htim->Instance->CCMR3 |= TIM_CCMR3_OC6CE;
mbed_official 610:813dcc80987e 2115 }
mbed_official 610:813dcc80987e 2116 else
mbed_official 610:813dcc80987e 2117 {
mbed_official 610:813dcc80987e 2118 /* Disable the OCREF clear feature for Channel 1 */
mbed_official 610:813dcc80987e 2119 htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6CE;
mbed_official 610:813dcc80987e 2120 }
mbed_official 610:813dcc80987e 2121 }
mbed_official 610:813dcc80987e 2122 break;
mbed_official 610:813dcc80987e 2123 default:
mbed_official 610:813dcc80987e 2124 break;
mbed_official 610:813dcc80987e 2125 }
mbed_official 610:813dcc80987e 2126
mbed_official 610:813dcc80987e 2127 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 2128
mbed_official 610:813dcc80987e 2129 return HAL_OK;
mbed_official 610:813dcc80987e 2130 }
mbed_official 610:813dcc80987e 2131
mbed_official 610:813dcc80987e 2132 /**
mbed_official 610:813dcc80987e 2133 * @brief Configures the TIM in master mode.
mbed_official 610:813dcc80987e 2134 * @param htim: TIM handle.
mbed_official 610:813dcc80987e 2135 * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that
mbed_official 610:813dcc80987e 2136 * contains the selected trigger output (TRGO) and the Master/Slave
mbed_official 610:813dcc80987e 2137 * mode.
mbed_official 610:813dcc80987e 2138 * @retval HAL status
mbed_official 610:813dcc80987e 2139 */
mbed_official 610:813dcc80987e 2140 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
mbed_official 610:813dcc80987e 2141 TIM_MasterConfigTypeDef * sMasterConfig)
mbed_official 610:813dcc80987e 2142 {
mbed_official 610:813dcc80987e 2143 uint32_t tmpcr2;
mbed_official 610:813dcc80987e 2144 uint32_t tmpsmcr;
mbed_official 610:813dcc80987e 2145
mbed_official 610:813dcc80987e 2146 /* Check the parameters */
mbed_official 610:813dcc80987e 2147 assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2148 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
mbed_official 610:813dcc80987e 2149 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
mbed_official 610:813dcc80987e 2150
mbed_official 610:813dcc80987e 2151 /* Check input state */
mbed_official 610:813dcc80987e 2152 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 2153
mbed_official 610:813dcc80987e 2154 /* Get the TIMx CR2 register value */
mbed_official 610:813dcc80987e 2155 tmpcr2 = htim->Instance->CR2;
mbed_official 610:813dcc80987e 2156
mbed_official 610:813dcc80987e 2157 /* Get the TIMx SMCR register value */
mbed_official 610:813dcc80987e 2158 tmpsmcr = htim->Instance->SMCR;
mbed_official 610:813dcc80987e 2159
mbed_official 610:813dcc80987e 2160 /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
mbed_official 610:813dcc80987e 2161 if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
mbed_official 610:813dcc80987e 2162 {
mbed_official 610:813dcc80987e 2163 /* Check the parameters */
mbed_official 610:813dcc80987e 2164 assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
mbed_official 610:813dcc80987e 2165
mbed_official 610:813dcc80987e 2166 /* Clear the MMS2 bits */
mbed_official 610:813dcc80987e 2167 tmpcr2 &= ~TIM_CR2_MMS2;
mbed_official 610:813dcc80987e 2168 /* Select the TRGO2 source*/
mbed_official 610:813dcc80987e 2169 tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
mbed_official 610:813dcc80987e 2170 }
mbed_official 610:813dcc80987e 2171
mbed_official 610:813dcc80987e 2172 /* Reset the MMS Bits */
mbed_official 610:813dcc80987e 2173 tmpcr2 &= ~TIM_CR2_MMS;
mbed_official 610:813dcc80987e 2174 /* Select the TRGO source */
mbed_official 610:813dcc80987e 2175 tmpcr2 |= sMasterConfig->MasterOutputTrigger;
mbed_official 610:813dcc80987e 2176
mbed_official 610:813dcc80987e 2177 /* Reset the MSM Bit */
mbed_official 610:813dcc80987e 2178 tmpsmcr &= ~TIM_SMCR_MSM;
mbed_official 610:813dcc80987e 2179 /* Set master mode */
mbed_official 610:813dcc80987e 2180 tmpsmcr |= sMasterConfig->MasterSlaveMode;
mbed_official 610:813dcc80987e 2181
mbed_official 610:813dcc80987e 2182 /* Update TIMx CR2 */
mbed_official 610:813dcc80987e 2183 htim->Instance->CR2 = tmpcr2;
mbed_official 610:813dcc80987e 2184
mbed_official 610:813dcc80987e 2185 /* Update TIMx SMCR */
mbed_official 610:813dcc80987e 2186 htim->Instance->SMCR = tmpsmcr;
mbed_official 610:813dcc80987e 2187
mbed_official 610:813dcc80987e 2188 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 2189
mbed_official 610:813dcc80987e 2190 return HAL_OK;
mbed_official 610:813dcc80987e 2191 }
mbed_official 610:813dcc80987e 2192
mbed_official 610:813dcc80987e 2193 /**
mbed_official 610:813dcc80987e 2194 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
mbed_official 610:813dcc80987e 2195 * and the AOE(automatic output enable).
mbed_official 610:813dcc80987e 2196 * @param htim: TIM handle
mbed_official 610:813dcc80987e 2197 * @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
mbed_official 610:813dcc80987e 2198 * contains the BDTR Register configuration information for the TIM peripheral.
mbed_official 610:813dcc80987e 2199 * @retval HAL status
mbed_official 610:813dcc80987e 2200 */
mbed_official 610:813dcc80987e 2201 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
mbed_official 610:813dcc80987e 2202 TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)
mbed_official 610:813dcc80987e 2203 {
mbed_official 610:813dcc80987e 2204 uint32_t tmpbdtr = 0;
mbed_official 610:813dcc80987e 2205
mbed_official 610:813dcc80987e 2206 /* Check the parameters */
mbed_official 610:813dcc80987e 2207 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2208 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
mbed_official 610:813dcc80987e 2209 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
mbed_official 610:813dcc80987e 2210 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
mbed_official 610:813dcc80987e 2211 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
mbed_official 610:813dcc80987e 2212 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
mbed_official 610:813dcc80987e 2213 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
mbed_official 610:813dcc80987e 2214 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
mbed_official 610:813dcc80987e 2215 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
mbed_official 610:813dcc80987e 2216
mbed_official 610:813dcc80987e 2217 /* Check input state */
mbed_official 610:813dcc80987e 2218 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 2219
mbed_official 610:813dcc80987e 2220 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
mbed_official 610:813dcc80987e 2221 the OSSI State, the dead time value and the Automatic Output Enable Bit */
mbed_official 610:813dcc80987e 2222 if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
mbed_official 610:813dcc80987e 2223 {
mbed_official 610:813dcc80987e 2224 assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
mbed_official 610:813dcc80987e 2225 assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
mbed_official 610:813dcc80987e 2226 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
mbed_official 610:813dcc80987e 2227
mbed_official 610:813dcc80987e 2228 /* Clear the BDTR bits */
mbed_official 610:813dcc80987e 2229 tmpbdtr &= ~(TIM_BDTR_DTG | TIM_BDTR_LOCK | TIM_BDTR_OSSI |
mbed_official 610:813dcc80987e 2230 TIM_BDTR_OSSR | TIM_BDTR_BKE | TIM_BDTR_BKP |
mbed_official 610:813dcc80987e 2231 TIM_BDTR_AOE | TIM_BDTR_MOE | TIM_BDTR_BKF |
mbed_official 610:813dcc80987e 2232 TIM_BDTR_BK2F | TIM_BDTR_BK2E | TIM_BDTR_BK2P);
mbed_official 610:813dcc80987e 2233
mbed_official 610:813dcc80987e 2234 /* Set the BDTR bits */
mbed_official 610:813dcc80987e 2235 tmpbdtr |= sBreakDeadTimeConfig->DeadTime;
mbed_official 610:813dcc80987e 2236 tmpbdtr |= sBreakDeadTimeConfig->LockLevel;
mbed_official 610:813dcc80987e 2237 tmpbdtr |= sBreakDeadTimeConfig->OffStateIDLEMode;
mbed_official 610:813dcc80987e 2238 tmpbdtr |= sBreakDeadTimeConfig->OffStateRunMode;
mbed_official 610:813dcc80987e 2239 tmpbdtr |= sBreakDeadTimeConfig->BreakState;
mbed_official 610:813dcc80987e 2240 tmpbdtr |= sBreakDeadTimeConfig->BreakPolarity;
mbed_official 610:813dcc80987e 2241 tmpbdtr |= sBreakDeadTimeConfig->AutomaticOutput;
mbed_official 610:813dcc80987e 2242 tmpbdtr |= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT);
mbed_official 610:813dcc80987e 2243 tmpbdtr |= (sBreakDeadTimeConfig->Break2Filter << BDTR_BK2F_SHIFT);
mbed_official 610:813dcc80987e 2244 tmpbdtr |= sBreakDeadTimeConfig->Break2State;
mbed_official 610:813dcc80987e 2245 tmpbdtr |= sBreakDeadTimeConfig->Break2Polarity;
mbed_official 610:813dcc80987e 2246 }
mbed_official 610:813dcc80987e 2247 else
mbed_official 610:813dcc80987e 2248 {
mbed_official 610:813dcc80987e 2249 /* Clear the BDTR bits */
mbed_official 610:813dcc80987e 2250 tmpbdtr &= ~(TIM_BDTR_DTG | TIM_BDTR_LOCK | TIM_BDTR_OSSI |
mbed_official 610:813dcc80987e 2251 TIM_BDTR_OSSR | TIM_BDTR_BKE | TIM_BDTR_BKP |
mbed_official 610:813dcc80987e 2252 TIM_BDTR_AOE | TIM_BDTR_MOE | TIM_BDTR_BKF);
mbed_official 610:813dcc80987e 2253
mbed_official 610:813dcc80987e 2254 /* Set the BDTR bits */
mbed_official 610:813dcc80987e 2255 tmpbdtr |= sBreakDeadTimeConfig->DeadTime;
mbed_official 610:813dcc80987e 2256 tmpbdtr |= sBreakDeadTimeConfig->LockLevel;
mbed_official 610:813dcc80987e 2257 tmpbdtr |= sBreakDeadTimeConfig->OffStateIDLEMode;
mbed_official 610:813dcc80987e 2258 tmpbdtr |= sBreakDeadTimeConfig->OffStateRunMode;
mbed_official 610:813dcc80987e 2259 tmpbdtr |= sBreakDeadTimeConfig->BreakState;
mbed_official 610:813dcc80987e 2260 tmpbdtr |= sBreakDeadTimeConfig->BreakPolarity;
mbed_official 610:813dcc80987e 2261 tmpbdtr |= sBreakDeadTimeConfig->AutomaticOutput;
mbed_official 610:813dcc80987e 2262 tmpbdtr |= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT);
mbed_official 610:813dcc80987e 2263 }
mbed_official 610:813dcc80987e 2264
mbed_official 610:813dcc80987e 2265 /* Set TIMx_BDTR */
mbed_official 610:813dcc80987e 2266 htim->Instance->BDTR = tmpbdtr;
mbed_official 610:813dcc80987e 2267
mbed_official 610:813dcc80987e 2268 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 2269
mbed_official 610:813dcc80987e 2270 return HAL_OK;
mbed_official 610:813dcc80987e 2271 }
mbed_official 610:813dcc80987e 2272
mbed_official 610:813dcc80987e 2273 /**
mbed_official 610:813dcc80987e 2274 * @brief Configures the break input source.
mbed_official 610:813dcc80987e 2275 * @param htim: TIM handle.
mbed_official 610:813dcc80987e 2276 * @param BreakInput: Break input to configure
mbed_official 610:813dcc80987e 2277 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2278 * @arg TIM_BREAKINPUT_BRK: Timer break input
mbed_official 610:813dcc80987e 2279 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
mbed_official 610:813dcc80987e 2280 * @param sBreakInputConfig: Break input source configuration
mbed_official 610:813dcc80987e 2281 * @retval HAL status
mbed_official 610:813dcc80987e 2282 */
mbed_official 610:813dcc80987e 2283 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
mbed_official 610:813dcc80987e 2284 uint32_t BreakInput,
mbed_official 610:813dcc80987e 2285 TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
mbed_official 610:813dcc80987e 2286
mbed_official 610:813dcc80987e 2287 {
mbed_official 610:813dcc80987e 2288 uint32_t tmporx = 0;
mbed_official 610:813dcc80987e 2289 uint32_t bkin_enable_mask = 0;
mbed_official 610:813dcc80987e 2290 uint32_t bkin_polarity_mask = 0;
mbed_official 610:813dcc80987e 2291 uint32_t bkin_enable_bitpos = 0;
mbed_official 610:813dcc80987e 2292 uint32_t bkin_polarity_bitpos = 0;
mbed_official 610:813dcc80987e 2293
mbed_official 610:813dcc80987e 2294 /* Check the parameters */
mbed_official 610:813dcc80987e 2295 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2296 assert_param(IS_TIM_BREAKINPUT(BreakInput));
mbed_official 610:813dcc80987e 2297 assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
mbed_official 610:813dcc80987e 2298 assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
mbed_official 610:813dcc80987e 2299 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM)
mbed_official 610:813dcc80987e 2300 {
mbed_official 610:813dcc80987e 2301 assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
mbed_official 610:813dcc80987e 2302 }
mbed_official 610:813dcc80987e 2303
mbed_official 610:813dcc80987e 2304 /* Check input state */
mbed_official 610:813dcc80987e 2305 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 2306
mbed_official 610:813dcc80987e 2307 switch(sBreakInputConfig->Source)
mbed_official 610:813dcc80987e 2308 {
mbed_official 610:813dcc80987e 2309 case TIM_BREAKINPUTSOURCE_BKIN:
mbed_official 610:813dcc80987e 2310 {
mbed_official 610:813dcc80987e 2311 bkin_enable_mask = TIM1_OR2_BKINE;
mbed_official 610:813dcc80987e 2312 bkin_enable_bitpos = 0;
mbed_official 610:813dcc80987e 2313 bkin_polarity_mask = TIM1_OR2_BKINP;
mbed_official 610:813dcc80987e 2314 bkin_polarity_bitpos = 9;
mbed_official 610:813dcc80987e 2315 }
mbed_official 610:813dcc80987e 2316 break;
mbed_official 610:813dcc80987e 2317 case TIM_BREAKINPUTSOURCE_COMP1:
mbed_official 610:813dcc80987e 2318 {
mbed_official 610:813dcc80987e 2319 bkin_enable_mask = TIM1_OR2_BKCMP1E;
mbed_official 610:813dcc80987e 2320 bkin_enable_bitpos = 1;
mbed_official 610:813dcc80987e 2321 bkin_polarity_mask = TIM1_OR2_BKCMP1P;
mbed_official 610:813dcc80987e 2322 bkin_polarity_bitpos = 10;
mbed_official 610:813dcc80987e 2323 }
mbed_official 610:813dcc80987e 2324 break;
mbed_official 610:813dcc80987e 2325 case TIM_BREAKINPUTSOURCE_COMP2:
mbed_official 610:813dcc80987e 2326 {
mbed_official 610:813dcc80987e 2327 bkin_enable_mask = TIM1_OR2_BKCMP2E;
mbed_official 610:813dcc80987e 2328 bkin_enable_bitpos = 2;
mbed_official 610:813dcc80987e 2329 bkin_polarity_mask = TIM1_OR2_BKCMP2P;
mbed_official 610:813dcc80987e 2330 bkin_polarity_bitpos = 11;
mbed_official 610:813dcc80987e 2331 }
mbed_official 610:813dcc80987e 2332 break;
mbed_official 610:813dcc80987e 2333 case TIM_BREAKINPUTSOURCE_DFSDM:
mbed_official 610:813dcc80987e 2334 {
mbed_official 610:813dcc80987e 2335 bkin_enable_mask = TIM1_OR2_BKDFBK0E;
mbed_official 610:813dcc80987e 2336 bkin_enable_bitpos = 8;
mbed_official 610:813dcc80987e 2337 }
mbed_official 610:813dcc80987e 2338 break;
mbed_official 610:813dcc80987e 2339 default:
mbed_official 610:813dcc80987e 2340 break;
mbed_official 610:813dcc80987e 2341 }
mbed_official 610:813dcc80987e 2342
mbed_official 610:813dcc80987e 2343 switch(BreakInput)
mbed_official 610:813dcc80987e 2344 {
mbed_official 610:813dcc80987e 2345 case TIM_BREAKINPUT_BRK:
mbed_official 610:813dcc80987e 2346 {
mbed_official 610:813dcc80987e 2347 /* Get the TIMx_OR2 register value */
mbed_official 610:813dcc80987e 2348 tmporx = htim->Instance->OR2;
mbed_official 610:813dcc80987e 2349
mbed_official 610:813dcc80987e 2350 /* Enable the break input */
mbed_official 610:813dcc80987e 2351 tmporx &= ~bkin_enable_mask;
mbed_official 610:813dcc80987e 2352 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
mbed_official 610:813dcc80987e 2353
mbed_official 610:813dcc80987e 2354 /* Set the break input polarity */
mbed_official 610:813dcc80987e 2355 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM)
mbed_official 610:813dcc80987e 2356 {
mbed_official 610:813dcc80987e 2357 tmporx &= ~bkin_polarity_mask;
mbed_official 610:813dcc80987e 2358 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
mbed_official 610:813dcc80987e 2359 }
mbed_official 610:813dcc80987e 2360
mbed_official 610:813dcc80987e 2361 /* Set TIMx_OR2 */
mbed_official 610:813dcc80987e 2362 htim->Instance->OR2 = tmporx;
mbed_official 610:813dcc80987e 2363 }
mbed_official 610:813dcc80987e 2364 break;
mbed_official 610:813dcc80987e 2365 case TIM_BREAKINPUT_BRK2:
mbed_official 610:813dcc80987e 2366 {
mbed_official 610:813dcc80987e 2367 /* Get the TIMx_OR3 register value */
mbed_official 610:813dcc80987e 2368 tmporx = htim->Instance->OR3;
mbed_official 610:813dcc80987e 2369
mbed_official 610:813dcc80987e 2370 /* Enable the break input */
mbed_official 610:813dcc80987e 2371 tmporx &= ~bkin_enable_mask;
mbed_official 610:813dcc80987e 2372 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
mbed_official 610:813dcc80987e 2373
mbed_official 610:813dcc80987e 2374 /* Set the break input polarity */
mbed_official 610:813dcc80987e 2375 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM)
mbed_official 610:813dcc80987e 2376 {
mbed_official 610:813dcc80987e 2377 tmporx &= ~bkin_polarity_mask;
mbed_official 610:813dcc80987e 2378 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
mbed_official 610:813dcc80987e 2379 }
mbed_official 610:813dcc80987e 2380
mbed_official 610:813dcc80987e 2381 /* Set TIMx_OR3 */
mbed_official 610:813dcc80987e 2382 htim->Instance->OR3 = tmporx;
mbed_official 610:813dcc80987e 2383 }
mbed_official 610:813dcc80987e 2384 break;
mbed_official 610:813dcc80987e 2385 default:
mbed_official 610:813dcc80987e 2386 break;
mbed_official 610:813dcc80987e 2387 }
mbed_official 610:813dcc80987e 2388
mbed_official 610:813dcc80987e 2389 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 2390
mbed_official 610:813dcc80987e 2391 return HAL_OK;
mbed_official 610:813dcc80987e 2392 }
mbed_official 610:813dcc80987e 2393
mbed_official 610:813dcc80987e 2394 /**
mbed_official 610:813dcc80987e 2395 * @brief Configures the TIMx Remapping input capabilities.
mbed_official 610:813dcc80987e 2396 * @param htim: TIM handle.
mbed_official 610:813dcc80987e 2397 * @param Remap: specifies the TIM remapping source.
mbed_official 610:813dcc80987e 2398 * For TIM1, the parameter is a combination of 4 fields (field1 | field2 | field3 | field4):
mbed_official 610:813dcc80987e 2399 * field1 can have the following values:
mbed_official 610:813dcc80987e 2400 * @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog)
mbed_official 610:813dcc80987e 2401 * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
mbed_official 610:813dcc80987e 2402 * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
mbed_official 610:813dcc80987e 2403 * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3
mbed_official 610:813dcc80987e 2404 * field2 can have the following values:
mbed_official 610:813dcc80987e 2405 * @arg TIM_TIM1_ETR_ADC3_NONE: TIM1_ETR is not connected to any ADC3 AWD (analog watchdog)
mbed_official 610:813dcc80987e 2406 * @arg TIM_TIM1_ETR_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1
mbed_official 610:813dcc80987e 2407 * @arg TIM_TIM1_ETR_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2
mbed_official 610:813dcc80987e 2408 * @arg TIM_TIM1_ETR_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD3
mbed_official 610:813dcc80987e 2409 * field3 can have the following values:
mbed_official 610:813dcc80987e 2410 * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO
mbed_official 610:813dcc80987e 2411 * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output
mbed_official 610:813dcc80987e 2412 * field4 can have the following values:
mbed_official 610:813dcc80987e 2413 * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output
mbed_official 610:813dcc80987e 2414 * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output
mbed_official 610:813dcc80987e 2415 * @note When field4 is set to TIM_TIM1_ETR_COMP1 or TIM_TIM1_ETR_COMP2 field1 and field2 values are not significant
mbed_official 610:813dcc80987e 2416 *
mbed_official 610:813dcc80987e 2417 * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3):
mbed_official 610:813dcc80987e 2418 * field1 can have the following values:
mbed_official 610:813dcc80987e 2419 * @arg TIM_TIM2_ITR1_TIM8_TRGO: TIM2_ITR1 is connected to TIM8_TRGO
mbed_official 610:813dcc80987e 2420 * @arg TIM_TIM2_ITR1_OTG_FS_SOF: TIM2_ITR1 is connected to OTG_FS SOF
mbed_official 610:813dcc80987e 2421 * field2 can have the following values:
mbed_official 610:813dcc80987e 2422 * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO
mbed_official 610:813dcc80987e 2423 * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
mbed_official 610:813dcc80987e 2424 * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output
mbed_official 610:813dcc80987e 2425 * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output
mbed_official 610:813dcc80987e 2426 * field3 can have the following values:
mbed_official 610:813dcc80987e 2427 * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO
mbed_official 610:813dcc80987e 2428 * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output
mbed_official 610:813dcc80987e 2429 * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output
mbed_official 610:813dcc80987e 2430 * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output
mbed_official 610:813dcc80987e 2431 *
mbed_official 610:813dcc80987e 2432 * For TIM3, the parameter is a combination 2 fields(field1 | field2):
mbed_official 610:813dcc80987e 2433 * field1 can have the following values:
mbed_official 610:813dcc80987e 2434 * @arg TIM_TIM3_TI1_GPIO: TIM3 TI1 is connected to GPIO
mbed_official 610:813dcc80987e 2435 * @arg TIM_TIM3_TI1_COMP1: TIM3 TI1 is connected to COMP1 output
mbed_official 610:813dcc80987e 2436 * @arg TIM_TIM3_TI1_COMP2: TIM3 TI1 is connected to COMP2 output
mbed_official 610:813dcc80987e 2437 * @arg TIM_TIM3_TI1_COMP1_COMP2: TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output
mbed_official 610:813dcc80987e 2438 * field2 can have the following values:
mbed_official 610:813dcc80987e 2439 * @arg TIM_TIM3_ETR_GPIO: TIM3_ETR is connected to GPIO
mbed_official 610:813dcc80987e 2440 * @arg TIM_TIM3_ETR_COMP1: TIM3_ETR is connected to COMP1 output
mbed_official 610:813dcc80987e 2441 *
mbed_official 610:813dcc80987e 2442 * For TIM8, the parameter is a combination of 3 fields (field1 | field2 | field3):
mbed_official 610:813dcc80987e 2443 * field1 can have the following values:
mbed_official 610:813dcc80987e 2444 * @arg TIM_TIM8_ETR_ADC2_NONE: TIM8_ETR is not connected to any ADC2 AWD (analog watchdog)
mbed_official 610:813dcc80987e 2445 * @arg TIM_TIM8_ETR_ADC2_AWD1: TIM8_ETR is connected to ADC2 AWD1
mbed_official 610:813dcc80987e 2446 * @arg TIM_TIM8_ETR_ADC2_AWD2: TIM8_ETR is connected to ADC2 AWD2
mbed_official 610:813dcc80987e 2447 * @arg TIM_TIM8_ETR_ADC2_AWD3: TIM8_ETR is connected to ADC2 AWD3
mbed_official 610:813dcc80987e 2448 * field2 can have the following values:
mbed_official 610:813dcc80987e 2449 * @arg TIM_TIM8_ETR_ADC3_NONE: TIM8_ETR is not connected to any ADC3 AWD (analog watchdog)
mbed_official 610:813dcc80987e 2450 * @arg TIM_TIM8_ETR_ADC3_AWD1: TIM8_ETR is connected to ADC3 AWD1
mbed_official 610:813dcc80987e 2451 * @arg TIM_TIM8_ETR_ADC3_AWD2: TIM8_ETR is connected to ADC3 AWD2
mbed_official 610:813dcc80987e 2452 * @arg TIM_TIM8_ETR_ADC3_AWD3: TIM8_ETR is connected to ADC3 AWD3
mbed_official 610:813dcc80987e 2453 * field3 can have the following values:
mbed_official 610:813dcc80987e 2454 * @arg TIM_TIM8_TI1_GPIO: TIM8 TI1 is connected to GPIO
mbed_official 610:813dcc80987e 2455 * @arg TIM_TIM8_TI1_COMP2: TIM8 TI1 is connected to COMP2 output
mbed_official 610:813dcc80987e 2456 * field4 can have the following values:
mbed_official 610:813dcc80987e 2457 * @arg TIM_TIM8_ETR_COMP1: TIM8_ETR is connected to COMP1 output
mbed_official 610:813dcc80987e 2458 * @arg TIM_TIM8_ETR_COMP2: TIM8_ETR is connected to COMP2 output
mbed_official 610:813dcc80987e 2459 * @note When field4 is set to TIM_TIM8_ETR_COMP1 or TIM_TIM8_ETR_COMP2 field1 and field2 values are not significant
mbed_official 610:813dcc80987e 2460 *
mbed_official 610:813dcc80987e 2461 * For TIM15, the parameter is a combination of 3 fields (field1 | field2):
mbed_official 610:813dcc80987e 2462 * field1 can have the following values:
mbed_official 610:813dcc80987e 2463 * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO
mbed_official 610:813dcc80987e 2464 * @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE
mbed_official 610:813dcc80987e 2465 * field2 can have the following values:
mbed_official 610:813dcc80987e 2466 * @arg TIM_TIM15_ENCODERMODE_NONE: No redirection
mbed_official 610:813dcc80987e 2467 * @arg TIM_TIM15_ENCODERMODE_TIM2: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
mbed_official 610:813dcc80987e 2468 * @arg TIM_TIM15_ENCODERMODE_TIM3: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
mbed_official 610:813dcc80987e 2469 * @arg TIM_TIM15_ENCODERMODE_TIM4: TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
mbed_official 610:813dcc80987e 2470 *
mbed_official 610:813dcc80987e 2471 * For TIM16, the parameter can have the following values:
mbed_official 610:813dcc80987e 2472 * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
mbed_official 610:813dcc80987e 2473 * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
mbed_official 610:813dcc80987e 2474 * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
mbed_official 610:813dcc80987e 2475 * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt
mbed_official 610:813dcc80987e 2476 *
mbed_official 610:813dcc80987e 2477 * For TIM17, the parameter can have the following values:
mbed_official 610:813dcc80987e 2478 * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO
mbed_official 610:813dcc80987e 2479 * @arg TIM_TIM17_TI1_MSI: TIM17 TI1 is connected to MSI
mbed_official 610:813dcc80987e 2480 * @arg TIM_TIM17_TI1_HSE_32: TIM17 TI1 is connected to HSE div 32
mbed_official 610:813dcc80987e 2481 * @arg TIM_TIM17_TI1_MCO: TIM17 TI1 is connected to MCO
mbed_official 610:813dcc80987e 2482 *
mbed_official 610:813dcc80987e 2483 * @retval HAL status
mbed_official 610:813dcc80987e 2484 */
mbed_official 610:813dcc80987e 2485 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
mbed_official 610:813dcc80987e 2486 {
mbed_official 610:813dcc80987e 2487 uint32_t tmpor1 = 0;
mbed_official 610:813dcc80987e 2488 uint32_t tmpor2 = 0;
mbed_official 610:813dcc80987e 2489
mbed_official 610:813dcc80987e 2490 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 2491
mbed_official 610:813dcc80987e 2492 /* Check parameters */
mbed_official 610:813dcc80987e 2493 assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2494 assert_param(IS_TIM_REMAP(Remap));
mbed_official 610:813dcc80987e 2495
mbed_official 610:813dcc80987e 2496 /* Set ETR_SEL bit field (if required) */
mbed_official 610:813dcc80987e 2497 if (IS_TIM_ETRSEL_INSTANCE(htim->Instance))
mbed_official 610:813dcc80987e 2498 {
mbed_official 610:813dcc80987e 2499 tmpor2 = htim->Instance->OR2;
mbed_official 610:813dcc80987e 2500 tmpor2 &= ~TIMx_ETRSEL_MASK;
mbed_official 610:813dcc80987e 2501 tmpor2 |= (Remap & TIMx_ETRSEL_MASK);
mbed_official 610:813dcc80987e 2502
mbed_official 610:813dcc80987e 2503 /* Set TIMx_OR2 */
mbed_official 610:813dcc80987e 2504 htim->Instance->OR2 = tmpor2;
mbed_official 610:813dcc80987e 2505 }
mbed_official 610:813dcc80987e 2506
mbed_official 610:813dcc80987e 2507 /* Set other remapping capabilities */
mbed_official 610:813dcc80987e 2508 tmpor1 = Remap;
mbed_official 610:813dcc80987e 2509 tmpor1 &= ~TIMx_ETRSEL_MASK;
mbed_official 610:813dcc80987e 2510
mbed_official 610:813dcc80987e 2511 /* Set TIMx_OR1 */
mbed_official 610:813dcc80987e 2512 htim->Instance->OR1 = Remap;
mbed_official 610:813dcc80987e 2513
mbed_official 610:813dcc80987e 2514 /* Set TIMx_OR1 */
mbed_official 610:813dcc80987e 2515 htim->Instance->OR1 = tmpor1;
mbed_official 610:813dcc80987e 2516
mbed_official 610:813dcc80987e 2517 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 2518
mbed_official 610:813dcc80987e 2519 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 2520
mbed_official 610:813dcc80987e 2521 return HAL_OK;
mbed_official 610:813dcc80987e 2522 }
mbed_official 610:813dcc80987e 2523
mbed_official 610:813dcc80987e 2524 /**
mbed_official 610:813dcc80987e 2525 * @brief Group channel 5 and channel 1, 2 or 3
mbed_official 610:813dcc80987e 2526 * @param htim: TIM handle.
mbed_official 610:813dcc80987e 2527 * @param Channels: specifies the reference signal(s) the OC5REF is combined with.
mbed_official 610:813dcc80987e 2528 * This parameter can be any combination of the following values:
mbed_official 610:813dcc80987e 2529 * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
mbed_official 610:813dcc80987e 2530 * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
mbed_official 610:813dcc80987e 2531 * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
mbed_official 610:813dcc80987e 2532 * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
mbed_official 610:813dcc80987e 2533 * @retval HAL status
mbed_official 610:813dcc80987e 2534 */
mbed_official 610:813dcc80987e 2535 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
mbed_official 610:813dcc80987e 2536 {
mbed_official 610:813dcc80987e 2537 /* Check parameters */
mbed_official 610:813dcc80987e 2538 assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2539 assert_param(IS_TIM_GROUPCH5(Channels));
mbed_official 610:813dcc80987e 2540
mbed_official 610:813dcc80987e 2541 /* Process Locked */
mbed_official 610:813dcc80987e 2542 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 2543
mbed_official 610:813dcc80987e 2544 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 2545
mbed_official 610:813dcc80987e 2546 /* Clear GC5Cx bit fields */
mbed_official 610:813dcc80987e 2547 htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3|TIM_CCR5_GC5C2|TIM_CCR5_GC5C1);
mbed_official 610:813dcc80987e 2548
mbed_official 610:813dcc80987e 2549 /* Set GC5Cx bit fields */
mbed_official 610:813dcc80987e 2550 htim->Instance->CCR5 |= Channels;
mbed_official 610:813dcc80987e 2551
mbed_official 610:813dcc80987e 2552 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 2553
mbed_official 610:813dcc80987e 2554 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 2555
mbed_official 610:813dcc80987e 2556 return HAL_OK;
mbed_official 610:813dcc80987e 2557 }
mbed_official 610:813dcc80987e 2558
mbed_official 610:813dcc80987e 2559 /**
mbed_official 610:813dcc80987e 2560 * @}
mbed_official 610:813dcc80987e 2561 */
mbed_official 610:813dcc80987e 2562
mbed_official 610:813dcc80987e 2563 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
mbed_official 610:813dcc80987e 2564 * @brief Extended Callbacks functions
mbed_official 610:813dcc80987e 2565 *
mbed_official 610:813dcc80987e 2566 @verbatim
mbed_official 610:813dcc80987e 2567 ==============================================================================
mbed_official 610:813dcc80987e 2568 ##### Extended Callbacks functions #####
mbed_official 610:813dcc80987e 2569 ==============================================================================
mbed_official 610:813dcc80987e 2570 [..]
mbed_official 610:813dcc80987e 2571 This section provides Extended TIM callback functions:
mbed_official 610:813dcc80987e 2572 (+) Timer Commutation callback
mbed_official 610:813dcc80987e 2573 (+) Timer Break callback
mbed_official 610:813dcc80987e 2574
mbed_official 610:813dcc80987e 2575 @endverbatim
mbed_official 610:813dcc80987e 2576 * @{
mbed_official 610:813dcc80987e 2577 */
mbed_official 610:813dcc80987e 2578
mbed_official 610:813dcc80987e 2579 /**
mbed_official 610:813dcc80987e 2580 * @brief Hall commutation changed callback in non-blocking mode
mbed_official 610:813dcc80987e 2581 * @param htim : TIM handle
mbed_official 610:813dcc80987e 2582 * @retval None
mbed_official 610:813dcc80987e 2583 */
mbed_official 610:813dcc80987e 2584 __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 2585 {
mbed_official 610:813dcc80987e 2586 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 2587 the HAL_TIMEx_CommutationCallback could be implemented in the user file
mbed_official 610:813dcc80987e 2588 */
mbed_official 610:813dcc80987e 2589 }
mbed_official 610:813dcc80987e 2590
mbed_official 610:813dcc80987e 2591 /**
mbed_official 610:813dcc80987e 2592 * @brief Hall Break detection callback in non-blocking mode
mbed_official 610:813dcc80987e 2593 * @param htim : TIM handle
mbed_official 610:813dcc80987e 2594 * @retval None
mbed_official 610:813dcc80987e 2595 */
mbed_official 610:813dcc80987e 2596 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 2597 {
mbed_official 610:813dcc80987e 2598 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 2599 the HAL_TIMEx_BreakCallback could be implemented in the user file
mbed_official 610:813dcc80987e 2600 */
mbed_official 610:813dcc80987e 2601 }
mbed_official 610:813dcc80987e 2602
mbed_official 610:813dcc80987e 2603 /**
mbed_official 610:813dcc80987e 2604 * @}
mbed_official 610:813dcc80987e 2605 */
mbed_official 610:813dcc80987e 2606
mbed_official 610:813dcc80987e 2607 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
mbed_official 610:813dcc80987e 2608 * @brief Extended Peripheral State functions
mbed_official 610:813dcc80987e 2609 *
mbed_official 610:813dcc80987e 2610 @verbatim
mbed_official 610:813dcc80987e 2611 ==============================================================================
mbed_official 610:813dcc80987e 2612 ##### Extended Peripheral State functions #####
mbed_official 610:813dcc80987e 2613 ==============================================================================
mbed_official 610:813dcc80987e 2614 [..]
mbed_official 610:813dcc80987e 2615 This subsection permits to get in run-time the status of the peripheral
mbed_official 610:813dcc80987e 2616 and the data flow.
mbed_official 610:813dcc80987e 2617
mbed_official 610:813dcc80987e 2618 @endverbatim
mbed_official 610:813dcc80987e 2619 * @{
mbed_official 610:813dcc80987e 2620 */
mbed_official 610:813dcc80987e 2621
mbed_official 610:813dcc80987e 2622 /**
mbed_official 610:813dcc80987e 2623 * @brief Return the TIM Hall Sensor interface handle state.
mbed_official 610:813dcc80987e 2624 * @param htim: TIM Hall Sensor handle
mbed_official 610:813dcc80987e 2625 * @retval HAL state
mbed_official 610:813dcc80987e 2626 */
mbed_official 610:813dcc80987e 2627 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 2628 {
mbed_official 610:813dcc80987e 2629 return htim->State;
mbed_official 610:813dcc80987e 2630 }
mbed_official 610:813dcc80987e 2631
mbed_official 610:813dcc80987e 2632 /**
mbed_official 610:813dcc80987e 2633 * @}
mbed_official 610:813dcc80987e 2634 */
mbed_official 610:813dcc80987e 2635
mbed_official 610:813dcc80987e 2636 /**
mbed_official 610:813dcc80987e 2637 * @brief TIM DMA Commutation callback.
mbed_official 610:813dcc80987e 2638 * @param hdma : pointer to DMA handle.
mbed_official 610:813dcc80987e 2639 * @retval None
mbed_official 610:813dcc80987e 2640 */
mbed_official 610:813dcc80987e 2641 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 2642 {
mbed_official 610:813dcc80987e 2643 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 2644
mbed_official 610:813dcc80987e 2645 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 2646
mbed_official 610:813dcc80987e 2647 HAL_TIMEx_CommutationCallback(htim);
mbed_official 610:813dcc80987e 2648 }
mbed_official 610:813dcc80987e 2649
mbed_official 610:813dcc80987e 2650 /**
mbed_official 610:813dcc80987e 2651 * @brief Enables or disables the TIM Capture Compare Channel xN.
mbed_official 610:813dcc80987e 2652 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 2653 * @param Channel: specifies the TIM Channel
mbed_official 610:813dcc80987e 2654 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2655 * @arg TIM_Channel_1: TIM Channel 1
mbed_official 610:813dcc80987e 2656 * @arg TIM_Channel_2: TIM Channel 2
mbed_official 610:813dcc80987e 2657 * @arg TIM_Channel_3: TIM Channel 3
mbed_official 610:813dcc80987e 2658 * @param ChannelNState: specifies the TIM Channel CCxNE bit new state.
mbed_official 610:813dcc80987e 2659 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
mbed_official 610:813dcc80987e 2660 * @retval None
mbed_official 610:813dcc80987e 2661 */
mbed_official 610:813dcc80987e 2662 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState)
mbed_official 610:813dcc80987e 2663 {
mbed_official 610:813dcc80987e 2664 uint32_t tmp = 0;
mbed_official 610:813dcc80987e 2665
mbed_official 610:813dcc80987e 2666 tmp = TIM_CCER_CC1NE << Channel;
mbed_official 610:813dcc80987e 2667
mbed_official 610:813dcc80987e 2668 /* Reset the CCxNE Bit */
mbed_official 610:813dcc80987e 2669 TIMx->CCER &= ~tmp;
mbed_official 610:813dcc80987e 2670
mbed_official 610:813dcc80987e 2671 /* Set or reset the CCxNE Bit */
mbed_official 610:813dcc80987e 2672 TIMx->CCER |= (uint32_t)(ChannelNState << Channel);
mbed_official 610:813dcc80987e 2673 }
mbed_official 610:813dcc80987e 2674
mbed_official 610:813dcc80987e 2675 /**
mbed_official 610:813dcc80987e 2676 * @}
mbed_official 610:813dcc80987e 2677 */
mbed_official 610:813dcc80987e 2678
mbed_official 610:813dcc80987e 2679 #endif /* HAL_TIM_MODULE_ENABLED */
mbed_official 610:813dcc80987e 2680 /**
mbed_official 610:813dcc80987e 2681 * @}
mbed_official 610:813dcc80987e 2682 */
mbed_official 610:813dcc80987e 2683
mbed_official 610:813dcc80987e 2684 /**
mbed_official 610:813dcc80987e 2685 * @}
mbed_official 610:813dcc80987e 2686 */
mbed_official 610:813dcc80987e 2687
mbed_official 610:813dcc80987e 2688 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/