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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_sram.c@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 610:813dcc80987e 1 /**
mbed_official 610:813dcc80987e 2 ******************************************************************************
mbed_official 610:813dcc80987e 3 * @file stm32l4xx_hal_sram.c
mbed_official 610:813dcc80987e 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.0
mbed_official 610:813dcc80987e 6 * @date 26-June-2015
mbed_official 610:813dcc80987e 7 * @brief SRAM HAL module driver.
mbed_official 610:813dcc80987e 8 * This file provides a generic firmware to drive SRAM memories
mbed_official 610:813dcc80987e 9 * mounted as external device.
mbed_official 610:813dcc80987e 10 *
mbed_official 610:813dcc80987e 11 @verbatim
mbed_official 610:813dcc80987e 12 ==============================================================================
mbed_official 610:813dcc80987e 13 ##### How to use this driver #####
mbed_official 610:813dcc80987e 14 ==============================================================================
mbed_official 610:813dcc80987e 15 [..]
mbed_official 610:813dcc80987e 16 This driver is a generic layered driver which contains a set of APIs used to
mbed_official 610:813dcc80987e 17 control SRAM memories. It uses the FMC layer functions to interface
mbed_official 610:813dcc80987e 18 with SRAM devices.
mbed_official 610:813dcc80987e 19 The following sequence should be followed to configure the FMC to interface
mbed_official 610:813dcc80987e 20 with SRAM/PSRAM memories:
mbed_official 610:813dcc80987e 21
mbed_official 610:813dcc80987e 22 (#) Declare a SRAM_HandleTypeDef handle structure, for example:
mbed_official 610:813dcc80987e 23 SRAM_HandleTypeDef hsram; and:
mbed_official 610:813dcc80987e 24
mbed_official 610:813dcc80987e 25 (++) Fill the SRAM_HandleTypeDef handle "Init" field with the allowed
mbed_official 610:813dcc80987e 26 values of the structure member.
mbed_official 610:813dcc80987e 27
mbed_official 610:813dcc80987e 28 (++) Fill the SRAM_HandleTypeDef handle "Instance" field with a predefined
mbed_official 610:813dcc80987e 29 base register instance for NOR or SRAM device
mbed_official 610:813dcc80987e 30
mbed_official 610:813dcc80987e 31 (++) Fill the SRAM_HandleTypeDef handle "Extended" field with a predefined
mbed_official 610:813dcc80987e 32 base register instance for NOR or SRAM extended mode
mbed_official 610:813dcc80987e 33
mbed_official 610:813dcc80987e 34 (#) Declare two FMC_NORSRAM_TimingTypeDef structures, for both normal and extended
mbed_official 610:813dcc80987e 35 mode timings; for example:
mbed_official 610:813dcc80987e 36 FMC_NORSRAM_TimingTypeDef Timing and FMC_NORSRAM_TimingTypeDef ExTiming;
mbed_official 610:813dcc80987e 37 and fill its fields with the allowed values of the structure member.
mbed_official 610:813dcc80987e 38
mbed_official 610:813dcc80987e 39 (#) Initialize the SRAM Controller by calling the function HAL_SRAM_Init(). This function
mbed_official 610:813dcc80987e 40 performs the following sequence:
mbed_official 610:813dcc80987e 41
mbed_official 610:813dcc80987e 42 (##) MSP hardware layer configuration using the function HAL_SRAM_MspInit()
mbed_official 610:813dcc80987e 43 (##) Control register configuration using the FMC NORSRAM interface function
mbed_official 610:813dcc80987e 44 FMC_NORSRAM_Init()
mbed_official 610:813dcc80987e 45 (##) Timing register configuration using the FMC NORSRAM interface function
mbed_official 610:813dcc80987e 46 FMC_NORSRAM_Timing_Init()
mbed_official 610:813dcc80987e 47 (##) Extended mode Timing register configuration using the FMC NORSRAM interface function
mbed_official 610:813dcc80987e 48 FMC_NORSRAM_Extended_Timing_Init()
mbed_official 610:813dcc80987e 49 (##) Enable the SRAM device using the macro __FMC_NORSRAM_ENABLE()
mbed_official 610:813dcc80987e 50
mbed_official 610:813dcc80987e 51 (#) At this stage you can perform read/write accesses from/to the memory connected
mbed_official 610:813dcc80987e 52 to the NOR/SRAM Bank. You can perform either polling or DMA transfer using the
mbed_official 610:813dcc80987e 53 following APIs:
mbed_official 610:813dcc80987e 54 (++) HAL_SRAM_Read()/HAL_SRAM_Write() for polling read/write access
mbed_official 610:813dcc80987e 55 (++) HAL_SRAM_Read_DMA()/HAL_SRAM_Write_DMA() for DMA read/write transfer
mbed_official 610:813dcc80987e 56
mbed_official 610:813dcc80987e 57 (#) You can also control the SRAM device by calling the control APIs HAL_SRAM_WriteOperation_Enable()/
mbed_official 610:813dcc80987e 58 HAL_SRAM_WriteOperation_Disable() to respectively enable/disable the SRAM write operation
mbed_official 610:813dcc80987e 59
mbed_official 610:813dcc80987e 60 (#) You can continuously monitor the SRAM device HAL state by calling the function
mbed_official 610:813dcc80987e 61 HAL_SRAM_GetState()
mbed_official 610:813dcc80987e 62
mbed_official 610:813dcc80987e 63 @endverbatim
mbed_official 610:813dcc80987e 64 ******************************************************************************
mbed_official 610:813dcc80987e 65 * @attention
mbed_official 610:813dcc80987e 66 *
mbed_official 610:813dcc80987e 67 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 610:813dcc80987e 68 *
mbed_official 610:813dcc80987e 69 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 610:813dcc80987e 70 * are permitted provided that the following conditions are met:
mbed_official 610:813dcc80987e 71 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 610:813dcc80987e 72 * this list of conditions and the following disclaimer.
mbed_official 610:813dcc80987e 73 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 610:813dcc80987e 74 * this list of conditions and the following disclaimer in the documentation
mbed_official 610:813dcc80987e 75 * and/or other materials provided with the distribution.
mbed_official 610:813dcc80987e 76 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 610:813dcc80987e 77 * may be used to endorse or promote products derived from this software
mbed_official 610:813dcc80987e 78 * without specific prior written permission.
mbed_official 610:813dcc80987e 79 *
mbed_official 610:813dcc80987e 80 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 610:813dcc80987e 81 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 610:813dcc80987e 82 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 610:813dcc80987e 83 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 610:813dcc80987e 84 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 610:813dcc80987e 85 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 610:813dcc80987e 86 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 610:813dcc80987e 87 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 610:813dcc80987e 88 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 610:813dcc80987e 89 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 610:813dcc80987e 90 *
mbed_official 610:813dcc80987e 91 ******************************************************************************
mbed_official 610:813dcc80987e 92 */
mbed_official 610:813dcc80987e 93
mbed_official 610:813dcc80987e 94 /* Includes ------------------------------------------------------------------*/
mbed_official 610:813dcc80987e 95 #include "stm32l4xx_hal.h"
mbed_official 610:813dcc80987e 96
mbed_official 610:813dcc80987e 97 /** @addtogroup STM32L4xx_HAL_Driver
mbed_official 610:813dcc80987e 98 * @{
mbed_official 610:813dcc80987e 99 */
mbed_official 610:813dcc80987e 100
mbed_official 610:813dcc80987e 101 #ifdef HAL_SRAM_MODULE_ENABLED
mbed_official 610:813dcc80987e 102
mbed_official 610:813dcc80987e 103 /** @defgroup SRAM SRAM
mbed_official 610:813dcc80987e 104 * @brief SRAM HAL module driver.
mbed_official 610:813dcc80987e 105 * @{
mbed_official 610:813dcc80987e 106 */
mbed_official 610:813dcc80987e 107 /* Private typedef -----------------------------------------------------------*/
mbed_official 610:813dcc80987e 108 /* Private define ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 109 /* Private macro -------------------------------------------------------------*/
mbed_official 610:813dcc80987e 110 /* Private variables ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 111 /* Private function prototypes -----------------------------------------------*/
mbed_official 610:813dcc80987e 112 /* Exported functions --------------------------------------------------------*/
mbed_official 610:813dcc80987e 113
mbed_official 610:813dcc80987e 114 /** @defgroup SRAM_Exported_Functions SRAM Exported Functions
mbed_official 610:813dcc80987e 115 * @{
mbed_official 610:813dcc80987e 116 */
mbed_official 610:813dcc80987e 117
mbed_official 610:813dcc80987e 118 /** @defgroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 610:813dcc80987e 119 * @brief Initialization and Configuration functions.
mbed_official 610:813dcc80987e 120 *
mbed_official 610:813dcc80987e 121 @verbatim
mbed_official 610:813dcc80987e 122 ==============================================================================
mbed_official 610:813dcc80987e 123 ##### SRAM Initialization and de-initialization functions #####
mbed_official 610:813dcc80987e 124 ==============================================================================
mbed_official 610:813dcc80987e 125 [..] This section provides functions allowing to initialize/de-initialize
mbed_official 610:813dcc80987e 126 the SRAM memory.
mbed_official 610:813dcc80987e 127
mbed_official 610:813dcc80987e 128 @endverbatim
mbed_official 610:813dcc80987e 129 * @{
mbed_official 610:813dcc80987e 130 */
mbed_official 610:813dcc80987e 131
mbed_official 610:813dcc80987e 132 /**
mbed_official 610:813dcc80987e 133 * @brief Perform the SRAM device initialization sequence.
mbed_official 610:813dcc80987e 134 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 135 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 136 * @param Timing: Pointer to SRAM control timing structure
mbed_official 610:813dcc80987e 137 * @param ExtTiming: Pointer to SRAM extended mode timing structure
mbed_official 610:813dcc80987e 138 * @retval HAL status
mbed_official 610:813dcc80987e 139 */
mbed_official 610:813dcc80987e 140 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
mbed_official 610:813dcc80987e 141 {
mbed_official 610:813dcc80987e 142 /* Check the SRAM handle parameter */
mbed_official 610:813dcc80987e 143 if(hsram == NULL)
mbed_official 610:813dcc80987e 144 {
mbed_official 610:813dcc80987e 145 return HAL_ERROR;
mbed_official 610:813dcc80987e 146 }
mbed_official 610:813dcc80987e 147
mbed_official 610:813dcc80987e 148 if(hsram->State == HAL_SRAM_STATE_RESET)
mbed_official 610:813dcc80987e 149 {
mbed_official 610:813dcc80987e 150 /* Allocate lock resource and initialize it */
mbed_official 610:813dcc80987e 151 hsram->Lock = HAL_UNLOCKED;
mbed_official 610:813dcc80987e 152
mbed_official 610:813dcc80987e 153 /* Initialize the low level hardware (MSP) */
mbed_official 610:813dcc80987e 154 HAL_SRAM_MspInit(hsram);
mbed_official 610:813dcc80987e 155 }
mbed_official 610:813dcc80987e 156
mbed_official 610:813dcc80987e 157 /* Initialize SRAM control Interface */
mbed_official 610:813dcc80987e 158 FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
mbed_official 610:813dcc80987e 159
mbed_official 610:813dcc80987e 160 /* Initialize SRAM timing Interface */
mbed_official 610:813dcc80987e 161 FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
mbed_official 610:813dcc80987e 162
mbed_official 610:813dcc80987e 163 /* Initialize SRAM extended mode timing Interface */
mbed_official 610:813dcc80987e 164 FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, hsram->Init.ExtendedMode);
mbed_official 610:813dcc80987e 165
mbed_official 610:813dcc80987e 166 /* Enable the NORSRAM device */
mbed_official 610:813dcc80987e 167 __FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
mbed_official 610:813dcc80987e 168
mbed_official 610:813dcc80987e 169 return HAL_OK;
mbed_official 610:813dcc80987e 170 }
mbed_official 610:813dcc80987e 171
mbed_official 610:813dcc80987e 172 /**
mbed_official 610:813dcc80987e 173 * @brief Perform the SRAM device de-initialization sequence.
mbed_official 610:813dcc80987e 174 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 175 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 176 * @retval HAL status
mbed_official 610:813dcc80987e 177 */
mbed_official 610:813dcc80987e 178 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram)
mbed_official 610:813dcc80987e 179 {
mbed_official 610:813dcc80987e 180 /* De-Initialize the low level hardware (MSP) */
mbed_official 610:813dcc80987e 181 HAL_SRAM_MspDeInit(hsram);
mbed_official 610:813dcc80987e 182
mbed_official 610:813dcc80987e 183 /* Configure the SRAM registers with their reset values */
mbed_official 610:813dcc80987e 184 FMC_NORSRAM_DeInit(hsram->Instance, hsram->Extended, hsram->Init.NSBank);
mbed_official 610:813dcc80987e 185
mbed_official 610:813dcc80987e 186 hsram->State = HAL_SRAM_STATE_RESET;
mbed_official 610:813dcc80987e 187
mbed_official 610:813dcc80987e 188 /* Release Lock */
mbed_official 610:813dcc80987e 189 __HAL_UNLOCK(hsram);
mbed_official 610:813dcc80987e 190
mbed_official 610:813dcc80987e 191 return HAL_OK;
mbed_official 610:813dcc80987e 192 }
mbed_official 610:813dcc80987e 193
mbed_official 610:813dcc80987e 194 /**
mbed_official 610:813dcc80987e 195 * @brief Initialize the SRAM MSP.
mbed_official 610:813dcc80987e 196 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 197 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 198 * @retval None
mbed_official 610:813dcc80987e 199 */
mbed_official 610:813dcc80987e 200 __weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram)
mbed_official 610:813dcc80987e 201 {
mbed_official 610:813dcc80987e 202 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 203 the HAL_SRAM_MspInit could be implemented in the user file
mbed_official 610:813dcc80987e 204 */
mbed_official 610:813dcc80987e 205 }
mbed_official 610:813dcc80987e 206
mbed_official 610:813dcc80987e 207 /**
mbed_official 610:813dcc80987e 208 * @brief DeInitialize the SRAM MSP.
mbed_official 610:813dcc80987e 209 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 210 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 211 * @retval None
mbed_official 610:813dcc80987e 212 */
mbed_official 610:813dcc80987e 213 __weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram)
mbed_official 610:813dcc80987e 214 {
mbed_official 610:813dcc80987e 215 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 216 the HAL_SRAM_MspDeInit could be implemented in the user file
mbed_official 610:813dcc80987e 217 */
mbed_official 610:813dcc80987e 218 }
mbed_official 610:813dcc80987e 219
mbed_official 610:813dcc80987e 220 /**
mbed_official 610:813dcc80987e 221 * @brief DMA transfer complete callback.
mbed_official 610:813dcc80987e 222 * @param hdma: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 223 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 224 * @retval None
mbed_official 610:813dcc80987e 225 */
mbed_official 610:813dcc80987e 226 __weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 227 {
mbed_official 610:813dcc80987e 228 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 229 the HAL_SRAM_DMA_XferCpltCallback could be implemented in the user file
mbed_official 610:813dcc80987e 230 */
mbed_official 610:813dcc80987e 231 }
mbed_official 610:813dcc80987e 232
mbed_official 610:813dcc80987e 233 /**
mbed_official 610:813dcc80987e 234 * @brief DMA transfer complete error callback.
mbed_official 610:813dcc80987e 235 * @param hdma: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 236 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 237 * @retval None
mbed_official 610:813dcc80987e 238 */
mbed_official 610:813dcc80987e 239 __weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 240 {
mbed_official 610:813dcc80987e 241 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 242 the HAL_SRAM_DMA_XferErrorCallback could be implemented in the user file
mbed_official 610:813dcc80987e 243 */
mbed_official 610:813dcc80987e 244 }
mbed_official 610:813dcc80987e 245
mbed_official 610:813dcc80987e 246 /**
mbed_official 610:813dcc80987e 247 * @}
mbed_official 610:813dcc80987e 248 */
mbed_official 610:813dcc80987e 249
mbed_official 610:813dcc80987e 250 /** @defgroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
mbed_official 610:813dcc80987e 251 * @brief Input Output and memory control functions
mbed_official 610:813dcc80987e 252 *
mbed_official 610:813dcc80987e 253 @verbatim
mbed_official 610:813dcc80987e 254 ==============================================================================
mbed_official 610:813dcc80987e 255 ##### SRAM Input and Output functions #####
mbed_official 610:813dcc80987e 256 ==============================================================================
mbed_official 610:813dcc80987e 257 [..]
mbed_official 610:813dcc80987e 258 This section provides functions allowing to use and control the SRAM memory
mbed_official 610:813dcc80987e 259
mbed_official 610:813dcc80987e 260 @endverbatim
mbed_official 610:813dcc80987e 261 * @{
mbed_official 610:813dcc80987e 262 */
mbed_official 610:813dcc80987e 263
mbed_official 610:813dcc80987e 264 /**
mbed_official 610:813dcc80987e 265 * @brief Read 8-bit buffer from SRAM memory.
mbed_official 610:813dcc80987e 266 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 267 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 268 * @param pAddress: Pointer to read start address
mbed_official 610:813dcc80987e 269 * @param pDstBuffer: Pointer to destination buffer
mbed_official 610:813dcc80987e 270 * @param BufferSize: Size of the buffer to read from memory
mbed_official 610:813dcc80987e 271 * @retval HAL status
mbed_official 610:813dcc80987e 272 */
mbed_official 610:813dcc80987e 273 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
mbed_official 610:813dcc80987e 274 {
mbed_official 610:813dcc80987e 275 __IO uint8_t * psramaddress = (uint8_t *)pAddress;
mbed_official 610:813dcc80987e 276
mbed_official 610:813dcc80987e 277 /* Process Locked */
mbed_official 610:813dcc80987e 278 __HAL_LOCK(hsram);
mbed_official 610:813dcc80987e 279
mbed_official 610:813dcc80987e 280 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 281 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 610:813dcc80987e 282
mbed_official 610:813dcc80987e 283 /* Read data from memory */
mbed_official 610:813dcc80987e 284 for(; BufferSize != 0; BufferSize--)
mbed_official 610:813dcc80987e 285 {
mbed_official 610:813dcc80987e 286 *pDstBuffer = *(__IO uint8_t *)psramaddress;
mbed_official 610:813dcc80987e 287 pDstBuffer++;
mbed_official 610:813dcc80987e 288 psramaddress++;
mbed_official 610:813dcc80987e 289 }
mbed_official 610:813dcc80987e 290
mbed_official 610:813dcc80987e 291 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 292 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 610:813dcc80987e 293
mbed_official 610:813dcc80987e 294 /* Process unlocked */
mbed_official 610:813dcc80987e 295 __HAL_UNLOCK(hsram);
mbed_official 610:813dcc80987e 296
mbed_official 610:813dcc80987e 297 return HAL_OK;
mbed_official 610:813dcc80987e 298 }
mbed_official 610:813dcc80987e 299
mbed_official 610:813dcc80987e 300 /**
mbed_official 610:813dcc80987e 301 * @brief Write 8-bit buffer to SRAM memory.
mbed_official 610:813dcc80987e 302 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 303 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 304 * @param pAddress: Pointer to write start address
mbed_official 610:813dcc80987e 305 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 610:813dcc80987e 306 * @param BufferSize: Size of the buffer to write to memory
mbed_official 610:813dcc80987e 307 * @retval HAL status
mbed_official 610:813dcc80987e 308 */
mbed_official 610:813dcc80987e 309 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 610:813dcc80987e 310 {
mbed_official 610:813dcc80987e 311 __IO uint8_t * psramaddress = (uint8_t *)pAddress;
mbed_official 610:813dcc80987e 312
mbed_official 610:813dcc80987e 313 /* Check the SRAM controller state */
mbed_official 610:813dcc80987e 314 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 610:813dcc80987e 315 {
mbed_official 610:813dcc80987e 316 return HAL_ERROR;
mbed_official 610:813dcc80987e 317 }
mbed_official 610:813dcc80987e 318
mbed_official 610:813dcc80987e 319 /* Process Locked */
mbed_official 610:813dcc80987e 320 __HAL_LOCK(hsram);
mbed_official 610:813dcc80987e 321
mbed_official 610:813dcc80987e 322 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 323 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 610:813dcc80987e 324
mbed_official 610:813dcc80987e 325 /* Write data to memory */
mbed_official 610:813dcc80987e 326 for(; BufferSize != 0; BufferSize--)
mbed_official 610:813dcc80987e 327 {
mbed_official 610:813dcc80987e 328 *(__IO uint8_t *)psramaddress = *pSrcBuffer;
mbed_official 610:813dcc80987e 329 pSrcBuffer++;
mbed_official 610:813dcc80987e 330 psramaddress++;
mbed_official 610:813dcc80987e 331 }
mbed_official 610:813dcc80987e 332
mbed_official 610:813dcc80987e 333 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 334 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 610:813dcc80987e 335
mbed_official 610:813dcc80987e 336 /* Process unlocked */
mbed_official 610:813dcc80987e 337 __HAL_UNLOCK(hsram);
mbed_official 610:813dcc80987e 338
mbed_official 610:813dcc80987e 339 return HAL_OK;
mbed_official 610:813dcc80987e 340 }
mbed_official 610:813dcc80987e 341
mbed_official 610:813dcc80987e 342 /**
mbed_official 610:813dcc80987e 343 * @brief Read 16-bit buffer from SRAM memory.
mbed_official 610:813dcc80987e 344 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 345 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 346 * @param pAddress: Pointer to read start address
mbed_official 610:813dcc80987e 347 * @param pDstBuffer: Pointer to destination buffer
mbed_official 610:813dcc80987e 348 * @param BufferSize: Size of the buffer to read from memory
mbed_official 610:813dcc80987e 349 * @retval HAL status
mbed_official 610:813dcc80987e 350 */
mbed_official 610:813dcc80987e 351 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
mbed_official 610:813dcc80987e 352 {
mbed_official 610:813dcc80987e 353 __IO uint16_t * psramaddress = (uint16_t *)pAddress;
mbed_official 610:813dcc80987e 354
mbed_official 610:813dcc80987e 355 /* Process Locked */
mbed_official 610:813dcc80987e 356 __HAL_LOCK(hsram);
mbed_official 610:813dcc80987e 357
mbed_official 610:813dcc80987e 358 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 359 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 610:813dcc80987e 360
mbed_official 610:813dcc80987e 361 /* Read data from memory */
mbed_official 610:813dcc80987e 362 for(; BufferSize != 0; BufferSize--)
mbed_official 610:813dcc80987e 363 {
mbed_official 610:813dcc80987e 364 *pDstBuffer = *(__IO uint16_t *)psramaddress;
mbed_official 610:813dcc80987e 365 pDstBuffer++;
mbed_official 610:813dcc80987e 366 psramaddress++;
mbed_official 610:813dcc80987e 367 }
mbed_official 610:813dcc80987e 368
mbed_official 610:813dcc80987e 369 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 370 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 610:813dcc80987e 371
mbed_official 610:813dcc80987e 372 /* Process unlocked */
mbed_official 610:813dcc80987e 373 __HAL_UNLOCK(hsram);
mbed_official 610:813dcc80987e 374
mbed_official 610:813dcc80987e 375 return HAL_OK;
mbed_official 610:813dcc80987e 376 }
mbed_official 610:813dcc80987e 377
mbed_official 610:813dcc80987e 378 /**
mbed_official 610:813dcc80987e 379 * @brief Write 16-bit buffer to SRAM memory.
mbed_official 610:813dcc80987e 380 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 381 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 382 * @param pAddress: Pointer to write start address
mbed_official 610:813dcc80987e 383 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 610:813dcc80987e 384 * @param BufferSize: Size of the buffer to write to memory
mbed_official 610:813dcc80987e 385 * @retval HAL status
mbed_official 610:813dcc80987e 386 */
mbed_official 610:813dcc80987e 387 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 610:813dcc80987e 388 {
mbed_official 610:813dcc80987e 389 __IO uint16_t * psramaddress = (uint16_t *)pAddress;
mbed_official 610:813dcc80987e 390
mbed_official 610:813dcc80987e 391 /* Check the SRAM controller state */
mbed_official 610:813dcc80987e 392 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 610:813dcc80987e 393 {
mbed_official 610:813dcc80987e 394 return HAL_ERROR;
mbed_official 610:813dcc80987e 395 }
mbed_official 610:813dcc80987e 396
mbed_official 610:813dcc80987e 397 /* Process Locked */
mbed_official 610:813dcc80987e 398 __HAL_LOCK(hsram);
mbed_official 610:813dcc80987e 399
mbed_official 610:813dcc80987e 400 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 401 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 610:813dcc80987e 402
mbed_official 610:813dcc80987e 403 /* Write data to memory */
mbed_official 610:813dcc80987e 404 for(; BufferSize != 0; BufferSize--)
mbed_official 610:813dcc80987e 405 {
mbed_official 610:813dcc80987e 406 *(__IO uint16_t *)psramaddress = *pSrcBuffer;
mbed_official 610:813dcc80987e 407 pSrcBuffer++;
mbed_official 610:813dcc80987e 408 psramaddress++;
mbed_official 610:813dcc80987e 409 }
mbed_official 610:813dcc80987e 410
mbed_official 610:813dcc80987e 411 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 412 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 610:813dcc80987e 413
mbed_official 610:813dcc80987e 414 /* Process unlocked */
mbed_official 610:813dcc80987e 415 __HAL_UNLOCK(hsram);
mbed_official 610:813dcc80987e 416
mbed_official 610:813dcc80987e 417 return HAL_OK;
mbed_official 610:813dcc80987e 418 }
mbed_official 610:813dcc80987e 419
mbed_official 610:813dcc80987e 420 /**
mbed_official 610:813dcc80987e 421 * @brief Read 32-bit buffer from SRAM memory.
mbed_official 610:813dcc80987e 422 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 423 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 424 * @param pAddress: Pointer to read start address
mbed_official 610:813dcc80987e 425 * @param pDstBuffer: Pointer to destination buffer
mbed_official 610:813dcc80987e 426 * @param BufferSize: Size of the buffer to read from memory
mbed_official 610:813dcc80987e 427 * @retval HAL status
mbed_official 610:813dcc80987e 428 */
mbed_official 610:813dcc80987e 429 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
mbed_official 610:813dcc80987e 430 {
mbed_official 610:813dcc80987e 431 /* Process Locked */
mbed_official 610:813dcc80987e 432 __HAL_LOCK(hsram);
mbed_official 610:813dcc80987e 433
mbed_official 610:813dcc80987e 434 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 435 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 610:813dcc80987e 436
mbed_official 610:813dcc80987e 437 /* Read data from memory */
mbed_official 610:813dcc80987e 438 for(; BufferSize != 0; BufferSize--)
mbed_official 610:813dcc80987e 439 {
mbed_official 610:813dcc80987e 440 *pDstBuffer = *(__IO uint32_t *)pAddress;
mbed_official 610:813dcc80987e 441 pDstBuffer++;
mbed_official 610:813dcc80987e 442 pAddress++;
mbed_official 610:813dcc80987e 443 }
mbed_official 610:813dcc80987e 444
mbed_official 610:813dcc80987e 445 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 446 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 610:813dcc80987e 447
mbed_official 610:813dcc80987e 448 /* Process unlocked */
mbed_official 610:813dcc80987e 449 __HAL_UNLOCK(hsram);
mbed_official 610:813dcc80987e 450
mbed_official 610:813dcc80987e 451 return HAL_OK;
mbed_official 610:813dcc80987e 452 }
mbed_official 610:813dcc80987e 453
mbed_official 610:813dcc80987e 454 /**
mbed_official 610:813dcc80987e 455 * @brief Write 32-bit buffer to SRAM memory.
mbed_official 610:813dcc80987e 456 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 457 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 458 * @param pAddress: Pointer to write start address
mbed_official 610:813dcc80987e 459 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 610:813dcc80987e 460 * @param BufferSize: Size of the buffer to write to memory
mbed_official 610:813dcc80987e 461 * @retval HAL status
mbed_official 610:813dcc80987e 462 */
mbed_official 610:813dcc80987e 463 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 610:813dcc80987e 464 {
mbed_official 610:813dcc80987e 465 /* Check the SRAM controller state */
mbed_official 610:813dcc80987e 466 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 610:813dcc80987e 467 {
mbed_official 610:813dcc80987e 468 return HAL_ERROR;
mbed_official 610:813dcc80987e 469 }
mbed_official 610:813dcc80987e 470
mbed_official 610:813dcc80987e 471 /* Process Locked */
mbed_official 610:813dcc80987e 472 __HAL_LOCK(hsram);
mbed_official 610:813dcc80987e 473
mbed_official 610:813dcc80987e 474 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 475 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 610:813dcc80987e 476
mbed_official 610:813dcc80987e 477 /* Write data to memory */
mbed_official 610:813dcc80987e 478 for(; BufferSize != 0; BufferSize--)
mbed_official 610:813dcc80987e 479 {
mbed_official 610:813dcc80987e 480 *(__IO uint32_t *)pAddress = *pSrcBuffer;
mbed_official 610:813dcc80987e 481 pSrcBuffer++;
mbed_official 610:813dcc80987e 482 pAddress++;
mbed_official 610:813dcc80987e 483 }
mbed_official 610:813dcc80987e 484
mbed_official 610:813dcc80987e 485 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 486 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 610:813dcc80987e 487
mbed_official 610:813dcc80987e 488 /* Process unlocked */
mbed_official 610:813dcc80987e 489 __HAL_UNLOCK(hsram);
mbed_official 610:813dcc80987e 490
mbed_official 610:813dcc80987e 491 return HAL_OK;
mbed_official 610:813dcc80987e 492 }
mbed_official 610:813dcc80987e 493
mbed_official 610:813dcc80987e 494 /**
mbed_official 610:813dcc80987e 495 * @brief Read a Word data buffer from the SRAM memory using DMA transfer.
mbed_official 610:813dcc80987e 496 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 497 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 498 * @param pAddress: Pointer to read start address
mbed_official 610:813dcc80987e 499 * @param pDstBuffer: Pointer to destination buffer
mbed_official 610:813dcc80987e 500 * @param BufferSize: Size of the buffer to read from memory
mbed_official 610:813dcc80987e 501 * @retval HAL status
mbed_official 610:813dcc80987e 502 */
mbed_official 610:813dcc80987e 503 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
mbed_official 610:813dcc80987e 504 {
mbed_official 610:813dcc80987e 505 /* Process Locked */
mbed_official 610:813dcc80987e 506 __HAL_LOCK(hsram);
mbed_official 610:813dcc80987e 507
mbed_official 610:813dcc80987e 508 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 509 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 610:813dcc80987e 510
mbed_official 610:813dcc80987e 511 /* Configure DMA user callbacks */
mbed_official 610:813dcc80987e 512 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
mbed_official 610:813dcc80987e 513 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
mbed_official 610:813dcc80987e 514
mbed_official 610:813dcc80987e 515 /* Enable the DMA Channel */
mbed_official 610:813dcc80987e 516 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
mbed_official 610:813dcc80987e 517
mbed_official 610:813dcc80987e 518 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 519 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 610:813dcc80987e 520
mbed_official 610:813dcc80987e 521 /* Process unlocked */
mbed_official 610:813dcc80987e 522 __HAL_UNLOCK(hsram);
mbed_official 610:813dcc80987e 523
mbed_official 610:813dcc80987e 524 return HAL_OK;
mbed_official 610:813dcc80987e 525 }
mbed_official 610:813dcc80987e 526
mbed_official 610:813dcc80987e 527 /**
mbed_official 610:813dcc80987e 528 * @brief Write a Word data buffer to SRAM memory using DMA transfer.
mbed_official 610:813dcc80987e 529 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 530 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 531 * @param pAddress: Pointer to write start address
mbed_official 610:813dcc80987e 532 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 610:813dcc80987e 533 * @param BufferSize: Size of the buffer to write to memory
mbed_official 610:813dcc80987e 534 * @retval HAL status
mbed_official 610:813dcc80987e 535 */
mbed_official 610:813dcc80987e 536 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 610:813dcc80987e 537 {
mbed_official 610:813dcc80987e 538 /* Check the SRAM controller state */
mbed_official 610:813dcc80987e 539 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
mbed_official 610:813dcc80987e 540 {
mbed_official 610:813dcc80987e 541 return HAL_ERROR;
mbed_official 610:813dcc80987e 542 }
mbed_official 610:813dcc80987e 543
mbed_official 610:813dcc80987e 544 /* Process Locked */
mbed_official 610:813dcc80987e 545 __HAL_LOCK(hsram);
mbed_official 610:813dcc80987e 546
mbed_official 610:813dcc80987e 547 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 548 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 610:813dcc80987e 549
mbed_official 610:813dcc80987e 550 /* Configure DMA user callbacks */
mbed_official 610:813dcc80987e 551 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
mbed_official 610:813dcc80987e 552 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
mbed_official 610:813dcc80987e 553
mbed_official 610:813dcc80987e 554 /* Enable the DMA Channel */
mbed_official 610:813dcc80987e 555 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
mbed_official 610:813dcc80987e 556
mbed_official 610:813dcc80987e 557 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 558 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 610:813dcc80987e 559
mbed_official 610:813dcc80987e 560 /* Process unlocked */
mbed_official 610:813dcc80987e 561 __HAL_UNLOCK(hsram);
mbed_official 610:813dcc80987e 562
mbed_official 610:813dcc80987e 563 return HAL_OK;
mbed_official 610:813dcc80987e 564 }
mbed_official 610:813dcc80987e 565
mbed_official 610:813dcc80987e 566 /**
mbed_official 610:813dcc80987e 567 * @}
mbed_official 610:813dcc80987e 568 */
mbed_official 610:813dcc80987e 569
mbed_official 610:813dcc80987e 570 /** @defgroup SRAM_Exported_Functions_Group3 Control functions
mbed_official 610:813dcc80987e 571 * @brief Control functions
mbed_official 610:813dcc80987e 572 *
mbed_official 610:813dcc80987e 573 @verbatim
mbed_official 610:813dcc80987e 574 ==============================================================================
mbed_official 610:813dcc80987e 575 ##### SRAM Control functions #####
mbed_official 610:813dcc80987e 576 ==============================================================================
mbed_official 610:813dcc80987e 577 [..]
mbed_official 610:813dcc80987e 578 This subsection provides a set of functions allowing to control dynamically
mbed_official 610:813dcc80987e 579 the SRAM interface.
mbed_official 610:813dcc80987e 580
mbed_official 610:813dcc80987e 581 @endverbatim
mbed_official 610:813dcc80987e 582 * @{
mbed_official 610:813dcc80987e 583 */
mbed_official 610:813dcc80987e 584
mbed_official 610:813dcc80987e 585 /**
mbed_official 610:813dcc80987e 586 * @brief Enable dynamically SRAM write operation.
mbed_official 610:813dcc80987e 587 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 588 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 589 * @retval HAL status
mbed_official 610:813dcc80987e 590 */
mbed_official 610:813dcc80987e 591 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram)
mbed_official 610:813dcc80987e 592 {
mbed_official 610:813dcc80987e 593 /* Process Locked */
mbed_official 610:813dcc80987e 594 __HAL_LOCK(hsram);
mbed_official 610:813dcc80987e 595
mbed_official 610:813dcc80987e 596 /* Enable write operation */
mbed_official 610:813dcc80987e 597 FMC_NORSRAM_WriteOperation_Enable(hsram->Instance, hsram->Init.NSBank);
mbed_official 610:813dcc80987e 598
mbed_official 610:813dcc80987e 599 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 600 hsram->State = HAL_SRAM_STATE_READY;
mbed_official 610:813dcc80987e 601
mbed_official 610:813dcc80987e 602 /* Process unlocked */
mbed_official 610:813dcc80987e 603 __HAL_UNLOCK(hsram);
mbed_official 610:813dcc80987e 604
mbed_official 610:813dcc80987e 605 return HAL_OK;
mbed_official 610:813dcc80987e 606 }
mbed_official 610:813dcc80987e 607
mbed_official 610:813dcc80987e 608 /**
mbed_official 610:813dcc80987e 609 * @brief Disable dynamically SRAM write operation.
mbed_official 610:813dcc80987e 610 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 611 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 612 * @retval HAL status
mbed_official 610:813dcc80987e 613 */
mbed_official 610:813dcc80987e 614 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram)
mbed_official 610:813dcc80987e 615 {
mbed_official 610:813dcc80987e 616 /* Process Locked */
mbed_official 610:813dcc80987e 617 __HAL_LOCK(hsram);
mbed_official 610:813dcc80987e 618
mbed_official 610:813dcc80987e 619 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 620 hsram->State = HAL_SRAM_STATE_BUSY;
mbed_official 610:813dcc80987e 621
mbed_official 610:813dcc80987e 622 /* Disable write operation */
mbed_official 610:813dcc80987e 623 FMC_NORSRAM_WriteOperation_Disable(hsram->Instance, hsram->Init.NSBank);
mbed_official 610:813dcc80987e 624
mbed_official 610:813dcc80987e 625 /* Update the SRAM controller state */
mbed_official 610:813dcc80987e 626 hsram->State = HAL_SRAM_STATE_PROTECTED;
mbed_official 610:813dcc80987e 627
mbed_official 610:813dcc80987e 628 /* Process unlocked */
mbed_official 610:813dcc80987e 629 __HAL_UNLOCK(hsram);
mbed_official 610:813dcc80987e 630
mbed_official 610:813dcc80987e 631 return HAL_OK;
mbed_official 610:813dcc80987e 632 }
mbed_official 610:813dcc80987e 633
mbed_official 610:813dcc80987e 634 /**
mbed_official 610:813dcc80987e 635 * @}
mbed_official 610:813dcc80987e 636 */
mbed_official 610:813dcc80987e 637
mbed_official 610:813dcc80987e 638 /** @defgroup SRAM_Exported_Functions_Group4 Peripheral State functions
mbed_official 610:813dcc80987e 639 * @brief Peripheral State functions
mbed_official 610:813dcc80987e 640 *
mbed_official 610:813dcc80987e 641 @verbatim
mbed_official 610:813dcc80987e 642 ==============================================================================
mbed_official 610:813dcc80987e 643 ##### SRAM State functions #####
mbed_official 610:813dcc80987e 644 ==============================================================================
mbed_official 610:813dcc80987e 645 [..]
mbed_official 610:813dcc80987e 646 This subsection permits to get in run-time the status of the SRAM controller
mbed_official 610:813dcc80987e 647 and the data flow.
mbed_official 610:813dcc80987e 648
mbed_official 610:813dcc80987e 649 @endverbatim
mbed_official 610:813dcc80987e 650 * @{
mbed_official 610:813dcc80987e 651 */
mbed_official 610:813dcc80987e 652
mbed_official 610:813dcc80987e 653 /**
mbed_official 610:813dcc80987e 654 * @brief Return the SRAM controller handle state.
mbed_official 610:813dcc80987e 655 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 656 * the configuration information for SRAM module.
mbed_official 610:813dcc80987e 657 * @retval HAL state
mbed_official 610:813dcc80987e 658 */
mbed_official 610:813dcc80987e 659 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram)
mbed_official 610:813dcc80987e 660 {
mbed_official 610:813dcc80987e 661 /* Return SRAM handle state */
mbed_official 610:813dcc80987e 662 return hsram->State;
mbed_official 610:813dcc80987e 663 }
mbed_official 610:813dcc80987e 664
mbed_official 610:813dcc80987e 665 /**
mbed_official 610:813dcc80987e 666 * @}
mbed_official 610:813dcc80987e 667 */
mbed_official 610:813dcc80987e 668
mbed_official 610:813dcc80987e 669 /**
mbed_official 610:813dcc80987e 670 * @}
mbed_official 610:813dcc80987e 671 */
mbed_official 610:813dcc80987e 672 /**
mbed_official 610:813dcc80987e 673 * @}
mbed_official 610:813dcc80987e 674 */
mbed_official 610:813dcc80987e 675 #endif /* HAL_SRAM_MODULE_ENABLED */
mbed_official 610:813dcc80987e 676
mbed_official 610:813dcc80987e 677 /**
mbed_official 610:813dcc80987e 678 * @}
mbed_official 610:813dcc80987e 679 */
mbed_official 610:813dcc80987e 680
mbed_official 610:813dcc80987e 681 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/