mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599

Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/

DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 610:813dcc80987e 1 /**
mbed_official 610:813dcc80987e 2 ******************************************************************************
mbed_official 610:813dcc80987e 3 * @file stm32l4xx_hal_cortex.h
mbed_official 610:813dcc80987e 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.0
mbed_official 610:813dcc80987e 6 * @date 26-June-2015
mbed_official 610:813dcc80987e 7 * @brief Header file of CORTEX HAL module.
mbed_official 610:813dcc80987e 8 ******************************************************************************
mbed_official 610:813dcc80987e 9 * @attention
mbed_official 610:813dcc80987e 10 *
mbed_official 610:813dcc80987e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 610:813dcc80987e 12 *
mbed_official 610:813dcc80987e 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 610:813dcc80987e 14 * are permitted provided that the following conditions are met:
mbed_official 610:813dcc80987e 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 610:813dcc80987e 16 * this list of conditions and the following disclaimer.
mbed_official 610:813dcc80987e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 610:813dcc80987e 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 610:813dcc80987e 19 * and/or other materials provided with the distribution.
mbed_official 610:813dcc80987e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 610:813dcc80987e 21 * may be used to endorse or promote products derived from this software
mbed_official 610:813dcc80987e 22 * without specific prior written permission.
mbed_official 610:813dcc80987e 23 *
mbed_official 610:813dcc80987e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 610:813dcc80987e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 610:813dcc80987e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 610:813dcc80987e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 610:813dcc80987e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 610:813dcc80987e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 610:813dcc80987e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 610:813dcc80987e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 610:813dcc80987e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 610:813dcc80987e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 610:813dcc80987e 34 *
mbed_official 610:813dcc80987e 35 ******************************************************************************
mbed_official 610:813dcc80987e 36 */
mbed_official 610:813dcc80987e 37
mbed_official 610:813dcc80987e 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 610:813dcc80987e 39 #ifndef __STM32L4xx_HAL_CORTEX_H
mbed_official 610:813dcc80987e 40 #define __STM32L4xx_HAL_CORTEX_H
mbed_official 610:813dcc80987e 41
mbed_official 610:813dcc80987e 42 #ifdef __cplusplus
mbed_official 610:813dcc80987e 43 extern "C" {
mbed_official 610:813dcc80987e 44 #endif
mbed_official 610:813dcc80987e 45
mbed_official 610:813dcc80987e 46 /* Includes ------------------------------------------------------------------*/
mbed_official 610:813dcc80987e 47 #include "stm32l4xx_hal_def.h"
mbed_official 610:813dcc80987e 48
mbed_official 610:813dcc80987e 49 /** @addtogroup STM32L4xx_HAL_Driver
mbed_official 610:813dcc80987e 50 * @{
mbed_official 610:813dcc80987e 51 */
mbed_official 610:813dcc80987e 52
mbed_official 610:813dcc80987e 53 /** @defgroup CORTEX CORTEX
mbed_official 610:813dcc80987e 54 * @{
mbed_official 610:813dcc80987e 55 */
mbed_official 610:813dcc80987e 56
mbed_official 610:813dcc80987e 57 /* Exported types ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 58 /** @defgroup CORTEX_Exported_Types CORTEX Exported Types
mbed_official 610:813dcc80987e 59 * @{
mbed_official 610:813dcc80987e 60 */
mbed_official 610:813dcc80987e 61
mbed_official 610:813dcc80987e 62 #if (__MPU_PRESENT == 1)
mbed_official 610:813dcc80987e 63 /** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
mbed_official 610:813dcc80987e 64 * @{
mbed_official 610:813dcc80987e 65 */
mbed_official 610:813dcc80987e 66 typedef struct
mbed_official 610:813dcc80987e 67 {
mbed_official 610:813dcc80987e 68 uint8_t Enable; /*!< Specifies the status of the region.
mbed_official 610:813dcc80987e 69 This parameter can be a value of @ref CORTEX_MPU_Region_Enable */
mbed_official 610:813dcc80987e 70 uint8_t Number; /*!< Specifies the number of the region to protect.
mbed_official 610:813dcc80987e 71 This parameter can be a value of @ref CORTEX_MPU_Region_Number */
mbed_official 610:813dcc80987e 72 uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */
mbed_official 610:813dcc80987e 73 uint8_t Size; /*!< Specifies the size of the region to protect.
mbed_official 610:813dcc80987e 74 This parameter can be a value of @ref CORTEX_MPU_Region_Size */
mbed_official 610:813dcc80987e 75 uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable.
mbed_official 610:813dcc80987e 76 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
mbed_official 610:813dcc80987e 77 uint8_t TypeExtField; /*!< Specifies the TEX field level.
mbed_official 610:813dcc80987e 78 This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */
mbed_official 610:813dcc80987e 79 uint8_t AccessPermission; /*!< Specifies the region access permission type.
mbed_official 610:813dcc80987e 80 This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */
mbed_official 610:813dcc80987e 81 uint8_t DisableExec; /*!< Specifies the instruction access status.
mbed_official 610:813dcc80987e 82 This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */
mbed_official 610:813dcc80987e 83 uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
mbed_official 610:813dcc80987e 84 This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */
mbed_official 610:813dcc80987e 85 uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected.
mbed_official 610:813dcc80987e 86 This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */
mbed_official 610:813dcc80987e 87 uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region.
mbed_official 610:813dcc80987e 88 This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */
mbed_official 610:813dcc80987e 89 }MPU_Region_InitTypeDef;
mbed_official 610:813dcc80987e 90 /**
mbed_official 610:813dcc80987e 91 * @}
mbed_official 610:813dcc80987e 92 */
mbed_official 610:813dcc80987e 93 #endif /* __MPU_PRESENT */
mbed_official 610:813dcc80987e 94
mbed_official 610:813dcc80987e 95 /**
mbed_official 610:813dcc80987e 96 * @}
mbed_official 610:813dcc80987e 97 */
mbed_official 610:813dcc80987e 98
mbed_official 610:813dcc80987e 99 /* Exported constants --------------------------------------------------------*/
mbed_official 610:813dcc80987e 100
mbed_official 610:813dcc80987e 101 /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
mbed_official 610:813dcc80987e 102 * @{
mbed_official 610:813dcc80987e 103 */
mbed_official 610:813dcc80987e 104
mbed_official 610:813dcc80987e 105 /** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
mbed_official 610:813dcc80987e 106 * @{
mbed_official 610:813dcc80987e 107 */
mbed_official 610:813dcc80987e 108 #define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority,
mbed_official 610:813dcc80987e 109 4 bits for subpriority */
mbed_official 610:813dcc80987e 110 #define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority,
mbed_official 610:813dcc80987e 111 3 bits for subpriority */
mbed_official 610:813dcc80987e 112 #define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority,
mbed_official 610:813dcc80987e 113 2 bits for subpriority */
mbed_official 610:813dcc80987e 114 #define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority,
mbed_official 610:813dcc80987e 115 1 bit for subpriority */
mbed_official 610:813dcc80987e 116 #define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority,
mbed_official 610:813dcc80987e 117 0 bit for subpriority */
mbed_official 610:813dcc80987e 118 /**
mbed_official 610:813dcc80987e 119 * @}
mbed_official 610:813dcc80987e 120 */
mbed_official 610:813dcc80987e 121
mbed_official 610:813dcc80987e 122 /** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source
mbed_official 610:813dcc80987e 123 * @{
mbed_official 610:813dcc80987e 124 */
mbed_official 610:813dcc80987e 125 #define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 126 #define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004)
mbed_official 610:813dcc80987e 127 /**
mbed_official 610:813dcc80987e 128 * @}
mbed_official 610:813dcc80987e 129 */
mbed_official 610:813dcc80987e 130
mbed_official 610:813dcc80987e 131 #if (__MPU_PRESENT == 1)
mbed_official 610:813dcc80987e 132 /** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control CORTEX MPU HFNMI and PRIVILEGED Access control
mbed_official 610:813dcc80987e 133 * @{
mbed_official 610:813dcc80987e 134 */
mbed_official 610:813dcc80987e 135 #define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 136 #define MPU_HARDFAULT_NMI ((uint32_t)0x00000002)
mbed_official 610:813dcc80987e 137 #define MPU_PRIVILEGED_DEFAULT ((uint32_t)0x00000004)
mbed_official 610:813dcc80987e 138 #define MPU_HFNMI_PRIVDEF ((uint32_t)0x00000006)
mbed_official 610:813dcc80987e 139 /**
mbed_official 610:813dcc80987e 140 * @}
mbed_official 610:813dcc80987e 141 */
mbed_official 610:813dcc80987e 142
mbed_official 610:813dcc80987e 143 /** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
mbed_official 610:813dcc80987e 144 * @{
mbed_official 610:813dcc80987e 145 */
mbed_official 610:813dcc80987e 146 #define MPU_REGION_ENABLE ((uint8_t)0x01)
mbed_official 610:813dcc80987e 147 #define MPU_REGION_DISABLE ((uint8_t)0x00)
mbed_official 610:813dcc80987e 148 /**
mbed_official 610:813dcc80987e 149 * @}
mbed_official 610:813dcc80987e 150 */
mbed_official 610:813dcc80987e 151
mbed_official 610:813dcc80987e 152 /** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
mbed_official 610:813dcc80987e 153 * @{
mbed_official 610:813dcc80987e 154 */
mbed_official 610:813dcc80987e 155 #define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00)
mbed_official 610:813dcc80987e 156 #define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01)
mbed_official 610:813dcc80987e 157 /**
mbed_official 610:813dcc80987e 158 * @}
mbed_official 610:813dcc80987e 159 */
mbed_official 610:813dcc80987e 160
mbed_official 610:813dcc80987e 161 /** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
mbed_official 610:813dcc80987e 162 * @{
mbed_official 610:813dcc80987e 163 */
mbed_official 610:813dcc80987e 164 #define MPU_ACCESS_SHAREABLE ((uint8_t)0x01)
mbed_official 610:813dcc80987e 165 #define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00)
mbed_official 610:813dcc80987e 166 /**
mbed_official 610:813dcc80987e 167 * @}
mbed_official 610:813dcc80987e 168 */
mbed_official 610:813dcc80987e 169
mbed_official 610:813dcc80987e 170 /** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
mbed_official 610:813dcc80987e 171 * @{
mbed_official 610:813dcc80987e 172 */
mbed_official 610:813dcc80987e 173 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01)
mbed_official 610:813dcc80987e 174 #define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00)
mbed_official 610:813dcc80987e 175 /**
mbed_official 610:813dcc80987e 176 * @}
mbed_official 610:813dcc80987e 177 */
mbed_official 610:813dcc80987e 178
mbed_official 610:813dcc80987e 179 /** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
mbed_official 610:813dcc80987e 180 * @{
mbed_official 610:813dcc80987e 181 */
mbed_official 610:813dcc80987e 182 #define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01)
mbed_official 610:813dcc80987e 183 #define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00)
mbed_official 610:813dcc80987e 184 /**
mbed_official 610:813dcc80987e 185 * @}
mbed_official 610:813dcc80987e 186 */
mbed_official 610:813dcc80987e 187
mbed_official 610:813dcc80987e 188 /** @defgroup CORTEX_MPU_TEX_Levels CORTEX MPU TEX Levels
mbed_official 610:813dcc80987e 189 * @{
mbed_official 610:813dcc80987e 190 */
mbed_official 610:813dcc80987e 191 #define MPU_TEX_LEVEL0 ((uint8_t)0x00)
mbed_official 610:813dcc80987e 192 #define MPU_TEX_LEVEL1 ((uint8_t)0x01)
mbed_official 610:813dcc80987e 193 #define MPU_TEX_LEVEL2 ((uint8_t)0x02)
mbed_official 610:813dcc80987e 194 /**
mbed_official 610:813dcc80987e 195 * @}
mbed_official 610:813dcc80987e 196 */
mbed_official 610:813dcc80987e 197
mbed_official 610:813dcc80987e 198 /** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
mbed_official 610:813dcc80987e 199 * @{
mbed_official 610:813dcc80987e 200 */
mbed_official 610:813dcc80987e 201 #define MPU_REGION_SIZE_32B ((uint8_t)0x04)
mbed_official 610:813dcc80987e 202 #define MPU_REGION_SIZE_64B ((uint8_t)0x05)
mbed_official 610:813dcc80987e 203 #define MPU_REGION_SIZE_128B ((uint8_t)0x06)
mbed_official 610:813dcc80987e 204 #define MPU_REGION_SIZE_256B ((uint8_t)0x07)
mbed_official 610:813dcc80987e 205 #define MPU_REGION_SIZE_512B ((uint8_t)0x08)
mbed_official 610:813dcc80987e 206 #define MPU_REGION_SIZE_1KB ((uint8_t)0x09)
mbed_official 610:813dcc80987e 207 #define MPU_REGION_SIZE_2KB ((uint8_t)0x0A)
mbed_official 610:813dcc80987e 208 #define MPU_REGION_SIZE_4KB ((uint8_t)0x0B)
mbed_official 610:813dcc80987e 209 #define MPU_REGION_SIZE_8KB ((uint8_t)0x0C)
mbed_official 610:813dcc80987e 210 #define MPU_REGION_SIZE_16KB ((uint8_t)0x0D)
mbed_official 610:813dcc80987e 211 #define MPU_REGION_SIZE_32KB ((uint8_t)0x0E)
mbed_official 610:813dcc80987e 212 #define MPU_REGION_SIZE_64KB ((uint8_t)0x0F)
mbed_official 610:813dcc80987e 213 #define MPU_REGION_SIZE_128KB ((uint8_t)0x10)
mbed_official 610:813dcc80987e 214 #define MPU_REGION_SIZE_256KB ((uint8_t)0x11)
mbed_official 610:813dcc80987e 215 #define MPU_REGION_SIZE_512KB ((uint8_t)0x12)
mbed_official 610:813dcc80987e 216 #define MPU_REGION_SIZE_1MB ((uint8_t)0x13)
mbed_official 610:813dcc80987e 217 #define MPU_REGION_SIZE_2MB ((uint8_t)0x14)
mbed_official 610:813dcc80987e 218 #define MPU_REGION_SIZE_4MB ((uint8_t)0x15)
mbed_official 610:813dcc80987e 219 #define MPU_REGION_SIZE_8MB ((uint8_t)0x16)
mbed_official 610:813dcc80987e 220 #define MPU_REGION_SIZE_16MB ((uint8_t)0x17)
mbed_official 610:813dcc80987e 221 #define MPU_REGION_SIZE_32MB ((uint8_t)0x18)
mbed_official 610:813dcc80987e 222 #define MPU_REGION_SIZE_64MB ((uint8_t)0x19)
mbed_official 610:813dcc80987e 223 #define MPU_REGION_SIZE_128MB ((uint8_t)0x1A)
mbed_official 610:813dcc80987e 224 #define MPU_REGION_SIZE_256MB ((uint8_t)0x1B)
mbed_official 610:813dcc80987e 225 #define MPU_REGION_SIZE_512MB ((uint8_t)0x1C)
mbed_official 610:813dcc80987e 226 #define MPU_REGION_SIZE_1GB ((uint8_t)0x1D)
mbed_official 610:813dcc80987e 227 #define MPU_REGION_SIZE_2GB ((uint8_t)0x1E)
mbed_official 610:813dcc80987e 228 #define MPU_REGION_SIZE_4GB ((uint8_t)0x1F)
mbed_official 610:813dcc80987e 229 /**
mbed_official 610:813dcc80987e 230 * @}
mbed_official 610:813dcc80987e 231 */
mbed_official 610:813dcc80987e 232
mbed_official 610:813dcc80987e 233 /** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
mbed_official 610:813dcc80987e 234 * @{
mbed_official 610:813dcc80987e 235 */
mbed_official 610:813dcc80987e 236 #define MPU_REGION_NO_ACCESS ((uint8_t)0x00)
mbed_official 610:813dcc80987e 237 #define MPU_REGION_PRIV_RW ((uint8_t)0x01)
mbed_official 610:813dcc80987e 238 #define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02)
mbed_official 610:813dcc80987e 239 #define MPU_REGION_FULL_ACCESS ((uint8_t)0x03)
mbed_official 610:813dcc80987e 240 #define MPU_REGION_PRIV_RO ((uint8_t)0x05)
mbed_official 610:813dcc80987e 241 #define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06)
mbed_official 610:813dcc80987e 242 /**
mbed_official 610:813dcc80987e 243 * @}
mbed_official 610:813dcc80987e 244 */
mbed_official 610:813dcc80987e 245
mbed_official 610:813dcc80987e 246 /** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
mbed_official 610:813dcc80987e 247 * @{
mbed_official 610:813dcc80987e 248 */
mbed_official 610:813dcc80987e 249 #define MPU_REGION_NUMBER0 ((uint8_t)0x00)
mbed_official 610:813dcc80987e 250 #define MPU_REGION_NUMBER1 ((uint8_t)0x01)
mbed_official 610:813dcc80987e 251 #define MPU_REGION_NUMBER2 ((uint8_t)0x02)
mbed_official 610:813dcc80987e 252 #define MPU_REGION_NUMBER3 ((uint8_t)0x03)
mbed_official 610:813dcc80987e 253 #define MPU_REGION_NUMBER4 ((uint8_t)0x04)
mbed_official 610:813dcc80987e 254 #define MPU_REGION_NUMBER5 ((uint8_t)0x05)
mbed_official 610:813dcc80987e 255 #define MPU_REGION_NUMBER6 ((uint8_t)0x06)
mbed_official 610:813dcc80987e 256 #define MPU_REGION_NUMBER7 ((uint8_t)0x07)
mbed_official 610:813dcc80987e 257 /**
mbed_official 610:813dcc80987e 258 * @}
mbed_official 610:813dcc80987e 259 */
mbed_official 610:813dcc80987e 260 #endif /* __MPU_PRESENT */
mbed_official 610:813dcc80987e 261
mbed_official 610:813dcc80987e 262 /**
mbed_official 610:813dcc80987e 263 * @}
mbed_official 610:813dcc80987e 264 */
mbed_official 610:813dcc80987e 265
mbed_official 610:813dcc80987e 266 /* Exported macros -----------------------------------------------------------*/
mbed_official 610:813dcc80987e 267 /** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros
mbed_official 610:813dcc80987e 268 * @{
mbed_official 610:813dcc80987e 269 */
mbed_official 610:813dcc80987e 270
mbed_official 610:813dcc80987e 271 /** @defgroup CORTEX_SysTick_clock_source_Macro_Exported CORTEX SysTick clock source
mbed_official 610:813dcc80987e 272 * @{
mbed_official 610:813dcc80987e 273 */
mbed_official 610:813dcc80987e 274
mbed_official 610:813dcc80987e 275 /** @brief Configure the SysTick clock source.
mbed_official 610:813dcc80987e 276 * @param __CLKSRC__: specifies the SysTick clock source.
mbed_official 610:813dcc80987e 277 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 278 * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
mbed_official 610:813dcc80987e 279 * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
mbed_official 610:813dcc80987e 280 * @retval None
mbed_official 610:813dcc80987e 281 */
mbed_official 610:813dcc80987e 282 #define __HAL_CORTEX_SYSTICKCLK_CONFIG(__CLKSRC__) \
mbed_official 610:813dcc80987e 283 do { \
mbed_official 610:813dcc80987e 284 if ((__CLKSRC__) == SYSTICK_CLKSOURCE_HCLK) \
mbed_official 610:813dcc80987e 285 { \
mbed_official 610:813dcc80987e 286 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; \
mbed_official 610:813dcc80987e 287 } \
mbed_official 610:813dcc80987e 288 else \
mbed_official 610:813dcc80987e 289 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; \
mbed_official 610:813dcc80987e 290 } while(0)
mbed_official 610:813dcc80987e 291
mbed_official 610:813dcc80987e 292 /**
mbed_official 610:813dcc80987e 293 * @}
mbed_official 610:813dcc80987e 294 */
mbed_official 610:813dcc80987e 295
mbed_official 610:813dcc80987e 296 /**
mbed_official 610:813dcc80987e 297 * @}
mbed_official 610:813dcc80987e 298 */
mbed_official 610:813dcc80987e 299
mbed_official 610:813dcc80987e 300 /* Exported functions --------------------------------------------------------*/
mbed_official 610:813dcc80987e 301 /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
mbed_official 610:813dcc80987e 302 * @{
mbed_official 610:813dcc80987e 303 */
mbed_official 610:813dcc80987e 304
mbed_official 610:813dcc80987e 305 /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and Configuration functions
mbed_official 610:813dcc80987e 306 * @brief Initialization and Configuration functions
mbed_official 610:813dcc80987e 307 * @{
mbed_official 610:813dcc80987e 308 */
mbed_official 610:813dcc80987e 309 /* Initialization and Configuration functions *****************************/
mbed_official 610:813dcc80987e 310 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
mbed_official 610:813dcc80987e 311 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
mbed_official 610:813dcc80987e 312 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
mbed_official 610:813dcc80987e 313 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
mbed_official 610:813dcc80987e 314 void HAL_NVIC_SystemReset(void);
mbed_official 610:813dcc80987e 315 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
mbed_official 610:813dcc80987e 316
mbed_official 610:813dcc80987e 317 #if (__MPU_PRESENT == 1)
mbed_official 610:813dcc80987e 318 /**
mbed_official 610:813dcc80987e 319 * @brief Disable the MPU.
mbed_official 610:813dcc80987e 320 * @retval None
mbed_official 610:813dcc80987e 321 */
mbed_official 610:813dcc80987e 322 __STATIC_INLINE void HAL_MPU_Disable(void)
mbed_official 610:813dcc80987e 323 {
mbed_official 610:813dcc80987e 324 /* Disable fault exceptions */
mbed_official 610:813dcc80987e 325 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
mbed_official 610:813dcc80987e 326
mbed_official 610:813dcc80987e 327 /* Disable the MPU */
mbed_official 610:813dcc80987e 328 MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
mbed_official 610:813dcc80987e 329 }
mbed_official 610:813dcc80987e 330
mbed_official 610:813dcc80987e 331 /**
mbed_official 610:813dcc80987e 332 * @brief Enable the MPU.
mbed_official 610:813dcc80987e 333 * @param MPU_Control: Specifies the control mode of the MPU during hard fault,
mbed_official 610:813dcc80987e 334 * NMI, FAULTMASK and privileged accessto the default memory
mbed_official 610:813dcc80987e 335 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 336 * @arg MPU_HFNMI_PRIVDEF_NONE
mbed_official 610:813dcc80987e 337 * @arg MPU_HARDFAULT_NMI
mbed_official 610:813dcc80987e 338 * @arg MPU_PRIVILEGED_DEFAULT
mbed_official 610:813dcc80987e 339 * @arg MPU_HFNMI_PRIVDEF
mbed_official 610:813dcc80987e 340 * @retval None
mbed_official 610:813dcc80987e 341 */
mbed_official 610:813dcc80987e 342 __STATIC_INLINE void HAL_MPU_Enable(uint32_t MPU_Control)
mbed_official 610:813dcc80987e 343 {
mbed_official 610:813dcc80987e 344 /* Enable the MPU */
mbed_official 610:813dcc80987e 345 MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
mbed_official 610:813dcc80987e 346
mbed_official 610:813dcc80987e 347 /* Enable fault exceptions */
mbed_official 610:813dcc80987e 348 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
mbed_official 610:813dcc80987e 349 }
mbed_official 610:813dcc80987e 350 #endif /* __MPU_PRESENT */
mbed_official 610:813dcc80987e 351 /**
mbed_official 610:813dcc80987e 352 * @}
mbed_official 610:813dcc80987e 353 */
mbed_official 610:813dcc80987e 354
mbed_official 610:813dcc80987e 355 /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
mbed_official 610:813dcc80987e 356 * @brief Cortex control functions
mbed_official 610:813dcc80987e 357 * @{
mbed_official 610:813dcc80987e 358 */
mbed_official 610:813dcc80987e 359 /* Peripheral Control functions ***********************************************/
mbed_official 610:813dcc80987e 360 uint32_t HAL_NVIC_GetPriorityGrouping(void);
mbed_official 610:813dcc80987e 361 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
mbed_official 610:813dcc80987e 362 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
mbed_official 610:813dcc80987e 363 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
mbed_official 610:813dcc80987e 364 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
mbed_official 610:813dcc80987e 365 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
mbed_official 610:813dcc80987e 366 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
mbed_official 610:813dcc80987e 367 void HAL_SYSTICK_IRQHandler(void);
mbed_official 610:813dcc80987e 368 void HAL_SYSTICK_Callback(void);
mbed_official 610:813dcc80987e 369
mbed_official 610:813dcc80987e 370 #if (__MPU_PRESENT == 1)
mbed_official 610:813dcc80987e 371 void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
mbed_official 610:813dcc80987e 372 #endif /* __MPU_PRESENT */
mbed_official 610:813dcc80987e 373 /**
mbed_official 610:813dcc80987e 374 * @}
mbed_official 610:813dcc80987e 375 */
mbed_official 610:813dcc80987e 376
mbed_official 610:813dcc80987e 377 /**
mbed_official 610:813dcc80987e 378 * @}
mbed_official 610:813dcc80987e 379 */
mbed_official 610:813dcc80987e 380
mbed_official 610:813dcc80987e 381 /* Private types -------------------------------------------------------------*/
mbed_official 610:813dcc80987e 382 /* Private variables ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 383 /* Private constants ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 384 /* Private macros ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 385 /** @defgroup CORTEX_Private_Macros CORTEX Private Macros
mbed_official 610:813dcc80987e 386 * @{
mbed_official 610:813dcc80987e 387 */
mbed_official 610:813dcc80987e 388 #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
mbed_official 610:813dcc80987e 389 ((GROUP) == NVIC_PRIORITYGROUP_1) || \
mbed_official 610:813dcc80987e 390 ((GROUP) == NVIC_PRIORITYGROUP_2) || \
mbed_official 610:813dcc80987e 391 ((GROUP) == NVIC_PRIORITYGROUP_3) || \
mbed_official 610:813dcc80987e 392 ((GROUP) == NVIC_PRIORITYGROUP_4))
mbed_official 610:813dcc80987e 393
mbed_official 610:813dcc80987e 394 #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
mbed_official 610:813dcc80987e 395
mbed_official 610:813dcc80987e 396 #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
mbed_official 610:813dcc80987e 397
mbed_official 610:813dcc80987e 398 #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00)
mbed_official 610:813dcc80987e 399
mbed_official 610:813dcc80987e 400 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
mbed_official 610:813dcc80987e 401 ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
mbed_official 610:813dcc80987e 402
mbed_official 610:813dcc80987e 403 #if (__MPU_PRESENT == 1)
mbed_official 610:813dcc80987e 404 #define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
mbed_official 610:813dcc80987e 405 ((STATE) == MPU_REGION_DISABLE))
mbed_official 610:813dcc80987e 406
mbed_official 610:813dcc80987e 407 #define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
mbed_official 610:813dcc80987e 408 ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
mbed_official 610:813dcc80987e 409
mbed_official 610:813dcc80987e 410 #define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
mbed_official 610:813dcc80987e 411 ((STATE) == MPU_ACCESS_NOT_SHAREABLE))
mbed_official 610:813dcc80987e 412
mbed_official 610:813dcc80987e 413 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
mbed_official 610:813dcc80987e 414 ((STATE) == MPU_ACCESS_NOT_CACHEABLE))
mbed_official 610:813dcc80987e 415
mbed_official 610:813dcc80987e 416 #define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
mbed_official 610:813dcc80987e 417 ((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
mbed_official 610:813dcc80987e 418
mbed_official 610:813dcc80987e 419 #define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
mbed_official 610:813dcc80987e 420 ((TYPE) == MPU_TEX_LEVEL1) || \
mbed_official 610:813dcc80987e 421 ((TYPE) == MPU_TEX_LEVEL2))
mbed_official 610:813dcc80987e 422
mbed_official 610:813dcc80987e 423 #define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
mbed_official 610:813dcc80987e 424 ((TYPE) == MPU_REGION_PRIV_RW) || \
mbed_official 610:813dcc80987e 425 ((TYPE) == MPU_REGION_PRIV_RW_URO) || \
mbed_official 610:813dcc80987e 426 ((TYPE) == MPU_REGION_FULL_ACCESS) || \
mbed_official 610:813dcc80987e 427 ((TYPE) == MPU_REGION_PRIV_RO) || \
mbed_official 610:813dcc80987e 428 ((TYPE) == MPU_REGION_PRIV_RO_URO))
mbed_official 610:813dcc80987e 429
mbed_official 610:813dcc80987e 430 #define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
mbed_official 610:813dcc80987e 431 ((NUMBER) == MPU_REGION_NUMBER1) || \
mbed_official 610:813dcc80987e 432 ((NUMBER) == MPU_REGION_NUMBER2) || \
mbed_official 610:813dcc80987e 433 ((NUMBER) == MPU_REGION_NUMBER3) || \
mbed_official 610:813dcc80987e 434 ((NUMBER) == MPU_REGION_NUMBER4) || \
mbed_official 610:813dcc80987e 435 ((NUMBER) == MPU_REGION_NUMBER5) || \
mbed_official 610:813dcc80987e 436 ((NUMBER) == MPU_REGION_NUMBER6) || \
mbed_official 610:813dcc80987e 437 ((NUMBER) == MPU_REGION_NUMBER7))
mbed_official 610:813dcc80987e 438
mbed_official 610:813dcc80987e 439 #define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
mbed_official 610:813dcc80987e 440 ((SIZE) == MPU_REGION_SIZE_64B) || \
mbed_official 610:813dcc80987e 441 ((SIZE) == MPU_REGION_SIZE_128B) || \
mbed_official 610:813dcc80987e 442 ((SIZE) == MPU_REGION_SIZE_256B) || \
mbed_official 610:813dcc80987e 443 ((SIZE) == MPU_REGION_SIZE_512B) || \
mbed_official 610:813dcc80987e 444 ((SIZE) == MPU_REGION_SIZE_1KB) || \
mbed_official 610:813dcc80987e 445 ((SIZE) == MPU_REGION_SIZE_2KB) || \
mbed_official 610:813dcc80987e 446 ((SIZE) == MPU_REGION_SIZE_4KB) || \
mbed_official 610:813dcc80987e 447 ((SIZE) == MPU_REGION_SIZE_8KB) || \
mbed_official 610:813dcc80987e 448 ((SIZE) == MPU_REGION_SIZE_16KB) || \
mbed_official 610:813dcc80987e 449 ((SIZE) == MPU_REGION_SIZE_32KB) || \
mbed_official 610:813dcc80987e 450 ((SIZE) == MPU_REGION_SIZE_64KB) || \
mbed_official 610:813dcc80987e 451 ((SIZE) == MPU_REGION_SIZE_128KB) || \
mbed_official 610:813dcc80987e 452 ((SIZE) == MPU_REGION_SIZE_256KB) || \
mbed_official 610:813dcc80987e 453 ((SIZE) == MPU_REGION_SIZE_512KB) || \
mbed_official 610:813dcc80987e 454 ((SIZE) == MPU_REGION_SIZE_1MB) || \
mbed_official 610:813dcc80987e 455 ((SIZE) == MPU_REGION_SIZE_2MB) || \
mbed_official 610:813dcc80987e 456 ((SIZE) == MPU_REGION_SIZE_4MB) || \
mbed_official 610:813dcc80987e 457 ((SIZE) == MPU_REGION_SIZE_8MB) || \
mbed_official 610:813dcc80987e 458 ((SIZE) == MPU_REGION_SIZE_16MB) || \
mbed_official 610:813dcc80987e 459 ((SIZE) == MPU_REGION_SIZE_32MB) || \
mbed_official 610:813dcc80987e 460 ((SIZE) == MPU_REGION_SIZE_64MB) || \
mbed_official 610:813dcc80987e 461 ((SIZE) == MPU_REGION_SIZE_128MB) || \
mbed_official 610:813dcc80987e 462 ((SIZE) == MPU_REGION_SIZE_256MB) || \
mbed_official 610:813dcc80987e 463 ((SIZE) == MPU_REGION_SIZE_512MB) || \
mbed_official 610:813dcc80987e 464 ((SIZE) == MPU_REGION_SIZE_1GB) || \
mbed_official 610:813dcc80987e 465 ((SIZE) == MPU_REGION_SIZE_2GB) || \
mbed_official 610:813dcc80987e 466 ((SIZE) == MPU_REGION_SIZE_4GB))
mbed_official 610:813dcc80987e 467
mbed_official 610:813dcc80987e 468 #define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
mbed_official 610:813dcc80987e 469 #endif /* __MPU_PRESENT */
mbed_official 610:813dcc80987e 470
mbed_official 610:813dcc80987e 471 /**
mbed_official 610:813dcc80987e 472 * @}
mbed_official 610:813dcc80987e 473 */
mbed_official 610:813dcc80987e 474
mbed_official 610:813dcc80987e 475 /* Private functions ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 476
mbed_official 610:813dcc80987e 477 /**
mbed_official 610:813dcc80987e 478 * @}
mbed_official 610:813dcc80987e 479 */
mbed_official 610:813dcc80987e 480
mbed_official 610:813dcc80987e 481 /**
mbed_official 610:813dcc80987e 482 * @}
mbed_official 610:813dcc80987e 483 */
mbed_official 610:813dcc80987e 484
mbed_official 610:813dcc80987e 485 #ifdef __cplusplus
mbed_official 610:813dcc80987e 486 }
mbed_official 610:813dcc80987e 487 #endif
mbed_official 610:813dcc80987e 488
mbed_official 610:813dcc80987e 489 #endif /* __STM32L4xx_HAL_CORTEX_H */
mbed_official 610:813dcc80987e 490
mbed_official 610:813dcc80987e 491
mbed_official 610:813dcc80987e 492 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/