mbed library sources
Dependents: Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more
Superseded
This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.
Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.
If you are looking for a stable and tested release, please import one of the official mbed library releases:
Import librarymbed
The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_rcc_ex.c@579:53297373a894, 2015-07-01 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Jul 01 09:45:11 2015 +0100
- Revision:
- 579:53297373a894
- Parent:
- 394:83f921546702
Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081
Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/
Initial version of drivers for SAMR21
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 354:e67efb2aab0e | 1 | /** |
mbed_official | 354:e67efb2aab0e | 2 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 3 | * @file stm32l1xx_hal_rcc_ex.c |
mbed_official | 354:e67efb2aab0e | 4 | * @author MCD Application Team |
mbed_official | 354:e67efb2aab0e | 5 | * @version V1.0.0 |
mbed_official | 354:e67efb2aab0e | 6 | * @date 5-September-2014 |
mbed_official | 354:e67efb2aab0e | 7 | * @brief Extended RCC HAL module driver. |
mbed_official | 354:e67efb2aab0e | 8 | * |
mbed_official | 354:e67efb2aab0e | 9 | * This file provides firmware functions to manage the following |
mbed_official | 354:e67efb2aab0e | 10 | * functionalities RCC extension peripheral: |
mbed_official | 354:e67efb2aab0e | 11 | * + Extended Peripheral Control functions |
mbed_official | 354:e67efb2aab0e | 12 | * |
mbed_official | 354:e67efb2aab0e | 13 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 14 | * @attention |
mbed_official | 354:e67efb2aab0e | 15 | * |
mbed_official | 354:e67efb2aab0e | 16 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 354:e67efb2aab0e | 17 | * |
mbed_official | 354:e67efb2aab0e | 18 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 354:e67efb2aab0e | 19 | * are permitted provided that the following conditions are met: |
mbed_official | 354:e67efb2aab0e | 20 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 354:e67efb2aab0e | 21 | * this list of conditions and the following disclaimer. |
mbed_official | 354:e67efb2aab0e | 22 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 354:e67efb2aab0e | 23 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 354:e67efb2aab0e | 24 | * and/or other materials provided with the distribution. |
mbed_official | 354:e67efb2aab0e | 25 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 354:e67efb2aab0e | 26 | * may be used to endorse or promote products derived from this software |
mbed_official | 354:e67efb2aab0e | 27 | * without specific prior written permission. |
mbed_official | 354:e67efb2aab0e | 28 | * |
mbed_official | 354:e67efb2aab0e | 29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 354:e67efb2aab0e | 30 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 354:e67efb2aab0e | 31 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 354:e67efb2aab0e | 32 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 354:e67efb2aab0e | 33 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 354:e67efb2aab0e | 34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 354:e67efb2aab0e | 35 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 354:e67efb2aab0e | 36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 354:e67efb2aab0e | 37 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 354:e67efb2aab0e | 38 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 354:e67efb2aab0e | 39 | * |
mbed_official | 354:e67efb2aab0e | 40 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 41 | */ |
mbed_official | 354:e67efb2aab0e | 42 | |
mbed_official | 354:e67efb2aab0e | 43 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 44 | #include "stm32l1xx_hal.h" |
mbed_official | 354:e67efb2aab0e | 45 | |
mbed_official | 354:e67efb2aab0e | 46 | /** @addtogroup STM32L1xx_HAL_Driver |
mbed_official | 354:e67efb2aab0e | 47 | * @{ |
mbed_official | 354:e67efb2aab0e | 48 | */ |
mbed_official | 354:e67efb2aab0e | 49 | |
mbed_official | 354:e67efb2aab0e | 50 | /** @defgroup RCCEx RCCEx |
mbed_official | 354:e67efb2aab0e | 51 | * @brief RCC Extension HAL module driver |
mbed_official | 354:e67efb2aab0e | 52 | * @{ |
mbed_official | 354:e67efb2aab0e | 53 | */ |
mbed_official | 354:e67efb2aab0e | 54 | |
mbed_official | 354:e67efb2aab0e | 55 | #ifdef HAL_RCC_MODULE_ENABLED |
mbed_official | 354:e67efb2aab0e | 56 | |
mbed_official | 354:e67efb2aab0e | 57 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 58 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 59 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 60 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 61 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 62 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 63 | |
mbed_official | 354:e67efb2aab0e | 64 | /** @defgroup RCCEx_Private_Functions RCCEx Exported Functions |
mbed_official | 354:e67efb2aab0e | 65 | * @{ |
mbed_official | 354:e67efb2aab0e | 66 | */ |
mbed_official | 354:e67efb2aab0e | 67 | |
mbed_official | 354:e67efb2aab0e | 68 | /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions |
mbed_official | 354:e67efb2aab0e | 69 | * @brief Extended Peripheral Control functions |
mbed_official | 354:e67efb2aab0e | 70 | * |
mbed_official | 354:e67efb2aab0e | 71 | @verbatim |
mbed_official | 354:e67efb2aab0e | 72 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 73 | ##### Extended Peripheral Control functions ##### |
mbed_official | 354:e67efb2aab0e | 74 | =============================================================================== |
mbed_official | 354:e67efb2aab0e | 75 | [..] |
mbed_official | 354:e67efb2aab0e | 76 | This subsection provides a set of functions allowing to control the RCC Clocks |
mbed_official | 354:e67efb2aab0e | 77 | frequencies. |
mbed_official | 354:e67efb2aab0e | 78 | [..] |
mbed_official | 354:e67efb2aab0e | 79 | (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to |
mbed_official | 354:e67efb2aab0e | 80 | select the RTC clock source; in this case the Backup domain will be reset in |
mbed_official | 354:e67efb2aab0e | 81 | order to modify the RTC Clock source, as consequence RTC registers (including |
mbed_official | 354:e67efb2aab0e | 82 | the backup registers) and RCC_BDCR register are set to their reset values. |
mbed_official | 354:e67efb2aab0e | 83 | |
mbed_official | 354:e67efb2aab0e | 84 | @endverbatim |
mbed_official | 354:e67efb2aab0e | 85 | * @{ |
mbed_official | 354:e67efb2aab0e | 86 | */ |
mbed_official | 354:e67efb2aab0e | 87 | |
mbed_official | 354:e67efb2aab0e | 88 | /** |
mbed_official | 354:e67efb2aab0e | 89 | * @brief Initializes the RCC extended peripherals clocks according to the specified parameters in the |
mbed_official | 354:e67efb2aab0e | 90 | * RCC_PeriphCLKInitTypeDef. |
mbed_official | 354:e67efb2aab0e | 91 | * @param PeriphClkInit: pointer to an RCC_PeriphCLKInitTypeDef structure that |
mbed_official | 354:e67efb2aab0e | 92 | * contains the configuration information for the Extended Peripherals clocks(RTC/LCD clock). |
mbed_official | 354:e67efb2aab0e | 93 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 94 | */ |
mbed_official | 354:e67efb2aab0e | 95 | HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) |
mbed_official | 354:e67efb2aab0e | 96 | { |
mbed_official | 354:e67efb2aab0e | 97 | uint32_t tickstart = 0; |
mbed_official | 354:e67efb2aab0e | 98 | uint32_t tmpreg = 0; |
mbed_official | 354:e67efb2aab0e | 99 | |
mbed_official | 354:e67efb2aab0e | 100 | /* Check the parameters */ |
mbed_official | 354:e67efb2aab0e | 101 | assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); |
mbed_official | 354:e67efb2aab0e | 102 | |
mbed_official | 354:e67efb2aab0e | 103 | /*------------------------------- RTC/LCD Configuration ------------------------*/ |
mbed_official | 354:e67efb2aab0e | 104 | if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) |
mbed_official | 354:e67efb2aab0e | 105 | #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\ |
mbed_official | 354:e67efb2aab0e | 106 | defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \ |
mbed_official | 354:e67efb2aab0e | 107 | defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \ |
mbed_official | 354:e67efb2aab0e | 108 | defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \ |
mbed_official | 354:e67efb2aab0e | 109 | defined(STM32L162xE) |
mbed_official | 354:e67efb2aab0e | 110 | || (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LCD) == RCC_PERIPHCLK_LCD) |
mbed_official | 354:e67efb2aab0e | 111 | #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */ |
mbed_official | 354:e67efb2aab0e | 112 | ) |
mbed_official | 354:e67efb2aab0e | 113 | { |
mbed_official | 354:e67efb2aab0e | 114 | /* Enable Power Controller clock */ |
mbed_official | 354:e67efb2aab0e | 115 | __PWR_CLK_ENABLE(); |
mbed_official | 354:e67efb2aab0e | 116 | |
mbed_official | 354:e67efb2aab0e | 117 | /* Enable write access to Backup domain */ |
mbed_official | 354:e67efb2aab0e | 118 | SET_BIT(PWR->CR, PWR_CR_DBP); |
mbed_official | 354:e67efb2aab0e | 119 | |
mbed_official | 354:e67efb2aab0e | 120 | /* Wait for Backup domain Write protection disable */ |
mbed_official | 354:e67efb2aab0e | 121 | tickstart = HAL_GetTick(); |
mbed_official | 354:e67efb2aab0e | 122 | |
mbed_official | 354:e67efb2aab0e | 123 | while((PWR->CR & PWR_CR_DBP) == RESET) |
mbed_official | 354:e67efb2aab0e | 124 | { |
mbed_official | 354:e67efb2aab0e | 125 | if((HAL_GetTick() - tickstart ) > DBP_TIMEOUT_VALUE) |
mbed_official | 354:e67efb2aab0e | 126 | { |
mbed_official | 354:e67efb2aab0e | 127 | return HAL_TIMEOUT; |
mbed_official | 354:e67efb2aab0e | 128 | } |
mbed_official | 354:e67efb2aab0e | 129 | } |
mbed_official | 354:e67efb2aab0e | 130 | |
mbed_official | 354:e67efb2aab0e | 131 | tmpreg = (RCC->CSR & RCC_CSR_RTCSEL); |
mbed_official | 354:e67efb2aab0e | 132 | /* Reset the Backup domain only if the RTC Clock source selection is modified */ |
mbed_official | 354:e67efb2aab0e | 133 | if((tmpreg != (PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL)) |
mbed_official | 354:e67efb2aab0e | 134 | #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\ |
mbed_official | 354:e67efb2aab0e | 135 | defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \ |
mbed_official | 354:e67efb2aab0e | 136 | defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \ |
mbed_official | 354:e67efb2aab0e | 137 | defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \ |
mbed_official | 354:e67efb2aab0e | 138 | defined(STM32L162xE) |
mbed_official | 354:e67efb2aab0e | 139 | || (tmpreg != (PeriphClkInit->LCDClockSelection & RCC_CSR_RTCSEL)) |
mbed_official | 354:e67efb2aab0e | 140 | #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */ |
mbed_official | 354:e67efb2aab0e | 141 | ) |
mbed_official | 354:e67efb2aab0e | 142 | { |
mbed_official | 354:e67efb2aab0e | 143 | /* Store the content of CSR register before the reset of Backup Domain */ |
mbed_official | 354:e67efb2aab0e | 144 | tmpreg = (RCC->CSR & ~(RCC_CSR_RTCSEL)); |
mbed_official | 354:e67efb2aab0e | 145 | /* RTC Clock selection can be changed only if the Backup Domain is reset */ |
mbed_official | 354:e67efb2aab0e | 146 | __HAL_RCC_BACKUPRESET_FORCE(); |
mbed_official | 354:e67efb2aab0e | 147 | __HAL_RCC_BACKUPRESET_RELEASE(); |
mbed_official | 354:e67efb2aab0e | 148 | /* Restore the Content of CSR register */ |
mbed_official | 354:e67efb2aab0e | 149 | RCC->CSR = tmpreg; |
mbed_official | 354:e67efb2aab0e | 150 | } |
mbed_official | 354:e67efb2aab0e | 151 | |
mbed_official | 354:e67efb2aab0e | 152 | /* If LSE is selected as RTC clock source, wait for LSE reactivation */ |
mbed_official | 354:e67efb2aab0e | 153 | if ((PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE) |
mbed_official | 354:e67efb2aab0e | 154 | #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\ |
mbed_official | 354:e67efb2aab0e | 155 | defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \ |
mbed_official | 354:e67efb2aab0e | 156 | defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \ |
mbed_official | 354:e67efb2aab0e | 157 | defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \ |
mbed_official | 354:e67efb2aab0e | 158 | defined(STM32L162xE) |
mbed_official | 354:e67efb2aab0e | 159 | || (PeriphClkInit->LCDClockSelection == RCC_RTCCLKSOURCE_LSE) |
mbed_official | 354:e67efb2aab0e | 160 | #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */ |
mbed_official | 354:e67efb2aab0e | 161 | ) |
mbed_official | 354:e67efb2aab0e | 162 | { |
mbed_official | 354:e67efb2aab0e | 163 | /* Get timeout */ |
mbed_official | 354:e67efb2aab0e | 164 | tickstart = HAL_GetTick(); |
mbed_official | 354:e67efb2aab0e | 165 | |
mbed_official | 354:e67efb2aab0e | 166 | /* Wait till LSE is ready */ |
mbed_official | 354:e67efb2aab0e | 167 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) |
mbed_official | 354:e67efb2aab0e | 168 | { |
mbed_official | 354:e67efb2aab0e | 169 | if((HAL_GetTick() - tickstart ) > LSE_TIMEOUT_VALUE) |
mbed_official | 354:e67efb2aab0e | 170 | { |
mbed_official | 354:e67efb2aab0e | 171 | return HAL_TIMEOUT; |
mbed_official | 354:e67efb2aab0e | 172 | } |
mbed_official | 354:e67efb2aab0e | 173 | } |
mbed_official | 354:e67efb2aab0e | 174 | } |
mbed_official | 354:e67efb2aab0e | 175 | |
mbed_official | 354:e67efb2aab0e | 176 | __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); |
mbed_official | 354:e67efb2aab0e | 177 | } |
mbed_official | 354:e67efb2aab0e | 178 | |
mbed_official | 354:e67efb2aab0e | 179 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 180 | } |
mbed_official | 354:e67efb2aab0e | 181 | |
mbed_official | 354:e67efb2aab0e | 182 | /** |
mbed_official | 354:e67efb2aab0e | 183 | * @brief Get the PeriphClkInit according to the internal |
mbed_official | 354:e67efb2aab0e | 184 | * RCC configuration registers. |
mbed_official | 354:e67efb2aab0e | 185 | * @param PeriphClkInit: pointer to an RCC_PeriphCLKInitTypeDef structure that |
mbed_official | 354:e67efb2aab0e | 186 | * returns the configuration information for the Extended Peripherals clocks(RTC/LCD clocks). |
mbed_official | 354:e67efb2aab0e | 187 | * @retval None |
mbed_official | 354:e67efb2aab0e | 188 | */ |
mbed_official | 354:e67efb2aab0e | 189 | void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) |
mbed_official | 354:e67efb2aab0e | 190 | { |
mbed_official | 354:e67efb2aab0e | 191 | uint32_t srcclk = 0; |
mbed_official | 354:e67efb2aab0e | 192 | |
mbed_official | 354:e67efb2aab0e | 193 | /* Set all possible values for the extended clock type parameter------------*/ |
mbed_official | 354:e67efb2aab0e | 194 | PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_RTC; |
mbed_official | 354:e67efb2aab0e | 195 | #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\ |
mbed_official | 354:e67efb2aab0e | 196 | defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \ |
mbed_official | 354:e67efb2aab0e | 197 | defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \ |
mbed_official | 354:e67efb2aab0e | 198 | defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \ |
mbed_official | 354:e67efb2aab0e | 199 | defined(STM32L162xE) |
mbed_official | 354:e67efb2aab0e | 200 | PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_LCD; |
mbed_official | 354:e67efb2aab0e | 201 | #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */ |
mbed_official | 354:e67efb2aab0e | 202 | |
mbed_official | 354:e67efb2aab0e | 203 | /* Get the RTC/LCD configuration -----------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 204 | srcclk = __HAL_RCC_GET_RTC_SOURCE(); |
mbed_official | 354:e67efb2aab0e | 205 | if (srcclk != RCC_RTCCLKSOURCE_HSE_DIV2) |
mbed_official | 354:e67efb2aab0e | 206 | { |
mbed_official | 354:e67efb2aab0e | 207 | /* Source clock is LSE or LSI*/ |
mbed_official | 354:e67efb2aab0e | 208 | PeriphClkInit->RTCClockSelection = srcclk; |
mbed_official | 354:e67efb2aab0e | 209 | } |
mbed_official | 354:e67efb2aab0e | 210 | else |
mbed_official | 354:e67efb2aab0e | 211 | { |
mbed_official | 354:e67efb2aab0e | 212 | /* Source clock is HSE. Need to get the prescaler value*/ |
mbed_official | 354:e67efb2aab0e | 213 | PeriphClkInit->RTCClockSelection = srcclk | (READ_BIT(RCC->CR, RCC_CR_RTCPRE)); |
mbed_official | 354:e67efb2aab0e | 214 | } |
mbed_official | 354:e67efb2aab0e | 215 | #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\ |
mbed_official | 354:e67efb2aab0e | 216 | defined(STM32L152xB) || defined(STM32L152xBA) || defined(STM32L152xC) || \ |
mbed_official | 354:e67efb2aab0e | 217 | defined(STM32L162xC) || defined(STM32L152xCA) || defined(STM32L152xD) || \ |
mbed_official | 354:e67efb2aab0e | 218 | defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || \ |
mbed_official | 354:e67efb2aab0e | 219 | defined(STM32L162xE) |
mbed_official | 354:e67efb2aab0e | 220 | PeriphClkInit->LCDClockSelection = PeriphClkInit->RTCClockSelection; |
mbed_official | 354:e67efb2aab0e | 221 | #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L162xE */ |
mbed_official | 354:e67efb2aab0e | 222 | } |
mbed_official | 354:e67efb2aab0e | 223 | |
mbed_official | 354:e67efb2aab0e | 224 | #if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || \ |
mbed_official | 354:e67efb2aab0e | 225 | defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \ |
mbed_official | 354:e67efb2aab0e | 226 | defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \ |
mbed_official | 354:e67efb2aab0e | 227 | defined(STM32L151xE) || defined (STM32L152xE) || defined (STM32L162xE) |
mbed_official | 354:e67efb2aab0e | 228 | |
mbed_official | 354:e67efb2aab0e | 229 | /** |
mbed_official | 354:e67efb2aab0e | 230 | * @brief Enables the LSE Clock Security System. |
mbed_official | 354:e67efb2aab0e | 231 | * @note If a failure is detected on the external 32 kHz oscillator, the LSE clock is no longer supplied |
mbed_official | 354:e67efb2aab0e | 232 | * to the RTC but no hardware action is made to the registers. |
mbed_official | 354:e67efb2aab0e | 233 | * In Standby mode a wakeup is generated. In other modes an interrupt can be sent to wakeup |
mbed_official | 354:e67efb2aab0e | 234 | * the software (see Section 5.3.4: Clock interrupt register (RCC_CIR) on page 104). |
mbed_official | 354:e67efb2aab0e | 235 | * The software MUST then disable the LSECSSON bit, stop the defective 32 kHz oscillator |
mbed_official | 354:e67efb2aab0e | 236 | * (disabling LSEON), and can change the RTC clock source (no clock or LSI or HSE, with |
mbed_official | 354:e67efb2aab0e | 237 | * RTCSEL), or take any required action to secure the application. |
mbed_official | 354:e67efb2aab0e | 238 | * @note LSE CSS available only for high density and medium+ devices |
mbed_official | 354:e67efb2aab0e | 239 | * @retval None |
mbed_official | 354:e67efb2aab0e | 240 | */ |
mbed_official | 354:e67efb2aab0e | 241 | void HAL_RCCEx_EnableLSECSS(void) |
mbed_official | 354:e67efb2aab0e | 242 | { |
mbed_official | 354:e67efb2aab0e | 243 | *(__IO uint32_t *) CSR_LSECSSON_BB = (uint32_t)ENABLE; |
mbed_official | 354:e67efb2aab0e | 244 | } |
mbed_official | 354:e67efb2aab0e | 245 | |
mbed_official | 354:e67efb2aab0e | 246 | /** |
mbed_official | 354:e67efb2aab0e | 247 | * @brief Disables the LSE Clock Security System. |
mbed_official | 354:e67efb2aab0e | 248 | * @note Once enabled this bit cannot be disabled, except after an LSE failure detection |
mbed_official | 354:e67efb2aab0e | 249 | * (LSECSSD=1). In that case the software MUST disable the LSECSSON bit. |
mbed_official | 354:e67efb2aab0e | 250 | * Reset by power on reset and RTC software reset (RTCRST bit). |
mbed_official | 354:e67efb2aab0e | 251 | * @note LSE CSS available only for high density and medium+ devices |
mbed_official | 354:e67efb2aab0e | 252 | * @retval None |
mbed_official | 354:e67efb2aab0e | 253 | */ |
mbed_official | 354:e67efb2aab0e | 254 | void HAL_RCCEx_DisableLSECSS(void) |
mbed_official | 354:e67efb2aab0e | 255 | { |
mbed_official | 354:e67efb2aab0e | 256 | *(__IO uint32_t *) CSR_LSECSSON_BB = (uint32_t)DISABLE; |
mbed_official | 354:e67efb2aab0e | 257 | } |
mbed_official | 354:e67efb2aab0e | 258 | #endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
mbed_official | 354:e67efb2aab0e | 259 | |
mbed_official | 354:e67efb2aab0e | 260 | /** |
mbed_official | 354:e67efb2aab0e | 261 | * @} |
mbed_official | 354:e67efb2aab0e | 262 | */ |
mbed_official | 354:e67efb2aab0e | 263 | |
mbed_official | 354:e67efb2aab0e | 264 | /** |
mbed_official | 354:e67efb2aab0e | 265 | * @} |
mbed_official | 354:e67efb2aab0e | 266 | */ |
mbed_official | 354:e67efb2aab0e | 267 | |
mbed_official | 354:e67efb2aab0e | 268 | #endif /* HAL_RCC_MODULE_ENABLED */ |
mbed_official | 354:e67efb2aab0e | 269 | /** |
mbed_official | 354:e67efb2aab0e | 270 | * @} |
mbed_official | 354:e67efb2aab0e | 271 | */ |
mbed_official | 354:e67efb2aab0e | 272 | |
mbed_official | 354:e67efb2aab0e | 273 | /** |
mbed_official | 354:e67efb2aab0e | 274 | * @} |
mbed_official | 354:e67efb2aab0e | 275 | */ |
mbed_official | 354:e67efb2aab0e | 276 | |
mbed_official | 354:e67efb2aab0e | 277 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |