arm_shift_q31.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        19. March 2015
00005 * $Revision:    V.1.4.5
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_shift_q31.c    
00009 *    
00010 * Description:  Shifts the elements of a Q31 vector by a specified number of bits.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE. 
00039 * -------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**        
00044  * @ingroup groupMath        
00045  */
00046 /**        
00047  * @defgroup shift Vector Shift        
00048  *        
00049  * Shifts the elements of a fixed-point vector by a specified number of bits.        
00050  * There are separate functions for Q7, Q15, and Q31 data types.        
00051  * The underlying algorithm used is:        
00052  *        
00053  * <pre>        
00054  *     pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.        
00055  * </pre>        
00056  *        
00057  * If <code>shift</code> is positive then the elements of the vector are shifted to the left.        
00058  * If <code>shift</code> is negative then the elements of the vector are shifted to the right.        
00059  *
00060  * The functions support in-place computation allowing the source and destination
00061  * pointers to reference the same memory buffer.
00062  */
00063 
00064 /**        
00065  * @addtogroup shift        
00066  * @{        
00067  */
00068 
00069 /**        
00070  * @brief  Shifts the elements of a Q31 vector a specified number of bits.        
00071  * @param[in]  *pSrc points to the input vector        
00072  * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.        
00073  * @param[out]  *pDst points to the output vector        
00074  * @param[in]  blockSize number of samples in the vector        
00075  * @return none.        
00076  *        
00077  *        
00078  * <b>Scaling and Overflow Behavior:</b>        
00079  * \par        
00080  * The function uses saturating arithmetic.        
00081  * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.        
00082  */
00083 
00084 void arm_shift_q31(
00085   q31_t * pSrc,
00086   int8_t shiftBits,
00087   q31_t * pDst,
00088   uint32_t blockSize)
00089 {
00090   uint32_t blkCnt;                               /* loop counter */
00091   uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
00092 
00093 #ifndef ARM_MATH_CM0_FAMILY
00094 
00095   q31_t in1, in2, in3, in4;                      /* Temporary input variables */
00096   q31_t out1, out2, out3, out4;                  /* Temporary output variables */
00097 
00098   /*loop Unrolling */
00099   blkCnt = blockSize >> 2u;
00100 
00101 
00102   if(sign == 0u)
00103   {
00104     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00105      ** a second loop below computes the remaining 1 to 3 samples. */
00106     while(blkCnt > 0u)
00107     {
00108       /* C = A  << shiftBits */
00109       /* Shift the input and then store the results in the destination buffer. */
00110       in1 = *pSrc;
00111       in2 = *(pSrc + 1);
00112       out1 = in1 << shiftBits;
00113       in3 = *(pSrc + 2);
00114       out2 = in2 << shiftBits;
00115       in4 = *(pSrc + 3);
00116       if(in1 != (out1 >> shiftBits))
00117         out1 = 0x7FFFFFFF ^ (in1 >> 31);
00118 
00119       if(in2 != (out2 >> shiftBits))
00120         out2 = 0x7FFFFFFF ^ (in2 >> 31);
00121 
00122       *pDst = out1;
00123       out3 = in3 << shiftBits;
00124       *(pDst + 1) = out2;
00125       out4 = in4 << shiftBits;
00126 
00127       if(in3 != (out3 >> shiftBits))
00128         out3 = 0x7FFFFFFF ^ (in3 >> 31);
00129 
00130       if(in4 != (out4 >> shiftBits))
00131         out4 = 0x7FFFFFFF ^ (in4 >> 31);
00132 
00133       *(pDst + 2) = out3;
00134       *(pDst + 3) = out4;
00135 
00136       /* Update destination pointer to process next sampels */
00137       pSrc += 4u;
00138       pDst += 4u;
00139 
00140       /* Decrement the loop counter */
00141       blkCnt--;
00142     }
00143   }
00144   else
00145   {
00146 
00147     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00148      ** a second loop below computes the remaining 1 to 3 samples. */
00149     while(blkCnt > 0u)
00150     {
00151       /* C = A >>  shiftBits */
00152       /* Shift the input and then store the results in the destination buffer. */
00153       in1 = *pSrc;
00154       in2 = *(pSrc + 1);
00155       in3 = *(pSrc + 2);
00156       in4 = *(pSrc + 3);
00157 
00158       *pDst = (in1 >> -shiftBits);
00159       *(pDst + 1) = (in2 >> -shiftBits);
00160       *(pDst + 2) = (in3 >> -shiftBits);
00161       *(pDst + 3) = (in4 >> -shiftBits);
00162 
00163 
00164       pSrc += 4u;
00165       pDst += 4u;
00166 
00167       blkCnt--;
00168     }
00169 
00170   }
00171 
00172   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
00173    ** No loop unrolling is used. */
00174   blkCnt = blockSize % 0x4u;
00175 
00176 #else
00177 
00178   /* Run the below code for Cortex-M0 */
00179 
00180 
00181   /* Initialize blkCnt with number of samples */
00182   blkCnt = blockSize;
00183 
00184 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00185 
00186 
00187   while(blkCnt > 0u)
00188   {
00189     /* C = A (>> or <<) shiftBits */
00190     /* Shift the input and then store the result in the destination buffer. */
00191     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
00192       (*pSrc++ >> -shiftBits);
00193 
00194     /* Decrement the loop counter */
00195     blkCnt--;
00196   }
00197 
00198 
00199 }
00200 
00201 /**        
00202  * @} end of shift group        
00203  */