arm_rms_f32.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        19. March 2015
00005 * $Revision:    V.1.4.5  
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_rms_f32.c    
00009 *    
00010 * Description:  Root mean square value of an array of F32 type    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.  
00039 * ---------------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupStats    
00045  */
00046 
00047 /**    
00048  * @defgroup RMS Root mean square (RMS)    
00049  *    
00050  *     
00051  * Calculates the Root Mean Sqaure of the elements in the input vector.    
00052  * The underlying algorithm is used:    
00053  *    
00054  * <pre>    
00055  *  Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));    
00056  * </pre>    
00057  *   
00058  * There are separate functions for floating point, Q31, and Q15 data types.     
00059  */
00060 
00061 /**    
00062  * @addtogroup RMS    
00063  * @{    
00064  */
00065 
00066 
00067 /**    
00068  * @brief Root Mean Square of the elements of a floating-point vector.    
00069  * @param[in]       *pSrc points to the input vector    
00070  * @param[in]       blockSize length of the input vector    
00071  * @param[out]      *pResult rms value returned here    
00072  * @return none.    
00073  *    
00074  */
00075 
00076 void arm_rms_f32(
00077   float32_t * pSrc,
00078   uint32_t blockSize,
00079   float32_t * pResult)
00080 {
00081   float32_t sum = 0.0f;                          /* Accumulator */
00082   float32_t in;                                  /* Tempoprary variable to store input value */
00083   uint32_t blkCnt;                               /* loop counter */
00084 
00085 #ifndef ARM_MATH_CM0_FAMILY
00086 
00087   /* Run the below code for Cortex-M4 and Cortex-M3 */
00088 
00089   /* loop Unrolling */
00090   blkCnt = blockSize >> 2u;
00091 
00092   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00093    ** a second loop below computes the remaining 1 to 3 samples. */
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00097     /* Compute sum of the squares and then store the result in a temporary variable, sum  */
00098     in = *pSrc++;
00099     sum += in * in;
00100     in = *pSrc++;
00101     sum += in * in;
00102     in = *pSrc++;
00103     sum += in * in;
00104     in = *pSrc++;
00105     sum += in * in;
00106 
00107     /* Decrement the loop counter */
00108     blkCnt--;
00109   }
00110 
00111   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
00112    ** No loop unrolling is used. */
00113   blkCnt = blockSize % 0x4u;
00114 
00115 #else
00116 
00117   /* Run the below code for Cortex-M0 */
00118 
00119   /* Loop over blockSize number of values */
00120   blkCnt = blockSize;
00121 
00122 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00123 
00124   while(blkCnt > 0u)
00125   {
00126     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00127     /* Compute sum of the squares and then store the results in a temporary variable, sum  */
00128     in = *pSrc++;
00129     sum += in * in;
00130 
00131     /* Decrement the loop counter */
00132     blkCnt--;
00133   }
00134 
00135   /* Compute Rms and store the result in the destination */
00136   arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
00137 }
00138 
00139 /**    
00140  * @} end of RMS group    
00141  */