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Show/hide line numbers arm_offset_f32.c Source File

arm_offset_f32.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        19. March 2015
00005 * $Revision:    V.1.4.5
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_offset_f32.c    
00009 *    
00010 * Description:  Floating-point vector offset.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.   
00039 * ---------------------------------------------------------------------------- */
00040 #include "arm_math.h"
00041 
00042 /**        
00043  * @ingroup groupMath        
00044  */
00045 
00046 /**        
00047  * @defgroup offset Vector Offset        
00048  *        
00049  * Adds a constant offset to each element of a vector.        
00050  *        
00051  * <pre>        
00052  *     pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.        
00053  * </pre>        
00054  *        
00055  * The functions support in-place computation allowing the source and
00056  * destination pointers to reference the same memory buffer.
00057  * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
00058  */
00059 
00060 /**        
00061  * @addtogroup offset        
00062  * @{        
00063  */
00064 
00065 /**        
00066  * @brief  Adds a constant offset to a floating-point vector.        
00067  * @param[in]  *pSrc points to the input vector        
00068  * @param[in]  offset is the offset to be added        
00069  * @param[out]  *pDst points to the output vector        
00070  * @param[in]  blockSize number of samples in the vector        
00071  * @return none.        
00072  */
00073 
00074 
00075 void arm_offset_f32(
00076   float32_t * pSrc,
00077   float32_t offset,
00078   float32_t * pDst,
00079   uint32_t blockSize)
00080 {
00081   uint32_t blkCnt;                               /* loop counter */
00082 
00083 #ifndef ARM_MATH_CM0_FAMILY
00084 
00085 /* Run the below code for Cortex-M4 and Cortex-M3 */
00086   float32_t in1, in2, in3, in4;
00087 
00088   /*loop Unrolling */
00089   blkCnt = blockSize >> 2u;
00090 
00091   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
00092    ** a second loop below computes the remaining 1 to 3 samples. */
00093   while(blkCnt > 0u)
00094   {
00095     /* C = A + offset */
00096     /* Add offset and then store the results in the destination buffer. */
00097     /* read samples from source */
00098     in1 = *pSrc;
00099     in2 = *(pSrc + 1);
00100 
00101     /* add offset to input */
00102     in1 = in1 + offset;
00103 
00104     /* read samples from source */
00105     in3 = *(pSrc + 2);
00106 
00107     /* add offset to input */
00108     in2 = in2 + offset;
00109 
00110     /* read samples from source */
00111     in4 = *(pSrc + 3);
00112 
00113     /* add offset to input */
00114     in3 = in3 + offset;
00115 
00116     /* store result to destination */
00117     *pDst = in1;
00118 
00119     /* add offset to input */
00120     in4 = in4 + offset;
00121 
00122     /* store result to destination */
00123     *(pDst + 1) = in2;
00124 
00125     /* store result to destination */
00126     *(pDst + 2) = in3;
00127 
00128     /* store result to destination */
00129     *(pDst + 3) = in4;
00130 
00131     /* update pointers to process next samples */
00132     pSrc += 4u;
00133     pDst += 4u;
00134 
00135     /* Decrement the loop counter */
00136     blkCnt--;
00137   }
00138 
00139   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
00140    ** No loop unrolling is used. */
00141   blkCnt = blockSize % 0x4u;
00142 
00143 #else
00144 
00145   /* Run the below code for Cortex-M0 */
00146 
00147   /* Initialize blkCnt with number of samples */
00148   blkCnt = blockSize;
00149 
00150 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00151 
00152   while(blkCnt > 0u)
00153   {
00154     /* C = A + offset */
00155     /* Add offset and then store the result in the destination buffer. */
00156     *pDst++ = (*pSrc++) + offset;
00157 
00158     /* Decrement the loop counter */
00159     blkCnt--;
00160   }
00161 }
00162 
00163 /**        
00164  * @} end of offset group        
00165  */