arm_negate_q15.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        19. March 2015
00005 * $Revision:    V.1.4.5
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_negate_q15.c    
00009 *    
00010 * Description:  Negates Q15 vectors.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.   
00039 * -------------------------------------------------------------------- */
00040 #include "arm_math.h"
00041 
00042 /**        
00043  * @ingroup groupMath        
00044  */
00045 
00046 /**        
00047  * @addtogroup negate        
00048  * @{        
00049  */
00050 
00051 /**        
00052  * @brief  Negates the elements of a Q15 vector.        
00053  * @param[in]  *pSrc points to the input vector        
00054  * @param[out]  *pDst points to the output vector        
00055  * @param[in]  blockSize number of samples in the vector        
00056  * @return none.        
00057  *    
00058  * \par Conditions for optimum performance    
00059  *  Input and output buffers should be aligned by 32-bit    
00060  *    
00061  *        
00062  * <b>Scaling and Overflow Behavior:</b>        
00063  * \par        
00064  * The function uses saturating arithmetic.        
00065  * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.        
00066  */
00067 
00068 void arm_negate_q15(
00069   q15_t * pSrc,
00070   q15_t * pDst,
00071   uint32_t blockSize)
00072 {
00073   uint32_t blkCnt;                               /* loop counter */
00074   q15_t in;
00075 
00076 #ifndef ARM_MATH_CM0_FAMILY
00077 
00078 /* Run the below code for Cortex-M4 and Cortex-M3 */
00079 
00080   q31_t in1, in2;                                /* Temporary variables */
00081 
00082 
00083   /*loop Unrolling */
00084   blkCnt = blockSize >> 2u;
00085 
00086   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
00087    ** a second loop below computes the remaining 1 to 3 samples. */
00088   while(blkCnt > 0u)
00089   {
00090     /* C = -A */
00091     /* Read two inputs at a time */
00092     in1 = _SIMD32_OFFSET(pSrc);
00093     in2 = _SIMD32_OFFSET(pSrc + 2);
00094 
00095     /* negate two samples at a time */
00096     in1 = __QSUB16(0, in1);
00097 
00098     /* negate two samples at a time */
00099     in2 = __QSUB16(0, in2);
00100 
00101     /* store the result to destination 2 samples at a time */
00102     _SIMD32_OFFSET(pDst) = in1;
00103     /* store the result to destination 2 samples at a time */
00104     _SIMD32_OFFSET(pDst + 2) = in2;
00105 
00106 
00107     /* update pointers to process next samples */
00108     pSrc += 4u;
00109     pDst += 4u;
00110 
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114 
00115   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
00116    ** No loop unrolling is used. */
00117   blkCnt = blockSize % 0x4u;
00118 
00119 #else
00120 
00121   /* Run the below code for Cortex-M0 */
00122 
00123   /* Initialize blkCnt with number of samples */
00124   blkCnt = blockSize;
00125 
00126 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00127 
00128   while(blkCnt > 0u)
00129   {
00130     /* C = -A */
00131     /* Negate and then store the result in the destination buffer. */
00132     in = *pSrc++;
00133     *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
00134 
00135     /* Decrement the loop counter */
00136     blkCnt--;
00137   }
00138 }
00139 
00140 /**        
00141  * @} end of negate group        
00142  */