CMSIS DSP library
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arm_mult_q31.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 19. March 2015 00005 * $Revision: V.1.4.5 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_mult_q31.c 00009 * 00010 * Description: Q31 vector multiplication. 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Redistribution and use in source and binary forms, with or without 00015 * modification, are permitted provided that the following conditions 00016 * are met: 00017 * - Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * - Redistributions in binary form must reproduce the above copyright 00020 * notice, this list of conditions and the following disclaimer in 00021 * the documentation and/or other materials provided with the 00022 * distribution. 00023 * - Neither the name of ARM LIMITED nor the names of its contributors 00024 * may be used to endorse or promote products derived from this 00025 * software without specific prior written permission. 00026 * 00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00038 * POSSIBILITY OF SUCH DAMAGE. 00039 * -------------------------------------------------------------------- */ 00040 00041 #include "arm_math.h" 00042 00043 /** 00044 * @ingroup groupMath 00045 */ 00046 00047 /** 00048 * @addtogroup BasicMult 00049 * @{ 00050 */ 00051 00052 /** 00053 * @brief Q31 vector multiplication. 00054 * @param[in] *pSrcA points to the first input vector 00055 * @param[in] *pSrcB points to the second input vector 00056 * @param[out] *pDst points to the output vector 00057 * @param[in] blockSize number of samples in each vector 00058 * @return none. 00059 * 00060 * <b>Scaling and Overflow Behavior:</b> 00061 * \par 00062 * The function uses saturating arithmetic. 00063 * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. 00064 */ 00065 00066 void arm_mult_q31( 00067 q31_t * pSrcA, 00068 q31_t * pSrcB, 00069 q31_t * pDst, 00070 uint32_t blockSize) 00071 { 00072 uint32_t blkCnt; /* loop counters */ 00073 00074 #ifndef ARM_MATH_CM0_FAMILY 00075 00076 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00077 q31_t inA1, inA2, inA3, inA4; /* temporary input variables */ 00078 q31_t inB1, inB2, inB3, inB4; /* temporary input variables */ 00079 q31_t out1, out2, out3, out4; /* temporary output variables */ 00080 00081 /* loop Unrolling */ 00082 blkCnt = blockSize >> 2u; 00083 00084 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00085 ** a second loop below computes the remaining 1 to 3 samples. */ 00086 while(blkCnt > 0u) 00087 { 00088 /* C = A * B */ 00089 /* Multiply the inputs and then store the results in the destination buffer. */ 00090 inA1 = *pSrcA++; 00091 inA2 = *pSrcA++; 00092 inA3 = *pSrcA++; 00093 inA4 = *pSrcA++; 00094 inB1 = *pSrcB++; 00095 inB2 = *pSrcB++; 00096 inB3 = *pSrcB++; 00097 inB4 = *pSrcB++; 00098 00099 out1 = ((q63_t) inA1 * inB1) >> 32; 00100 out2 = ((q63_t) inA2 * inB2) >> 32; 00101 out3 = ((q63_t) inA3 * inB3) >> 32; 00102 out4 = ((q63_t) inA4 * inB4) >> 32; 00103 00104 out1 = __SSAT(out1, 31); 00105 out2 = __SSAT(out2, 31); 00106 out3 = __SSAT(out3, 31); 00107 out4 = __SSAT(out4, 31); 00108 00109 *pDst++ = out1 << 1u; 00110 *pDst++ = out2 << 1u; 00111 *pDst++ = out3 << 1u; 00112 *pDst++ = out4 << 1u; 00113 00114 /* Decrement the blockSize loop counter */ 00115 blkCnt--; 00116 } 00117 00118 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00119 ** No loop unrolling is used. */ 00120 blkCnt = blockSize % 0x4u; 00121 00122 while(blkCnt > 0u) 00123 { 00124 /* C = A * B */ 00125 /* Multiply the inputs and then store the results in the destination buffer. */ 00126 inA1 = *pSrcA++; 00127 inB1 = *pSrcB++; 00128 out1 = ((q63_t) inA1 * inB1) >> 32; 00129 out1 = __SSAT(out1, 31); 00130 *pDst++ = out1 << 1u; 00131 00132 /* Decrement the blockSize loop counter */ 00133 blkCnt--; 00134 } 00135 00136 #else 00137 00138 /* Run the below code for Cortex-M0 */ 00139 00140 /* Initialize blkCnt with number of samples */ 00141 blkCnt = blockSize; 00142 00143 00144 while(blkCnt > 0u) 00145 { 00146 /* C = A * B */ 00147 /* Multiply the inputs and then store the results in the destination buffer. */ 00148 *pDst++ = 00149 (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31); 00150 00151 /* Decrement the blockSize loop counter */ 00152 blkCnt--; 00153 } 00154 00155 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ 00156 } 00157 00158 /** 00159 * @} end of BasicMult group 00160 */
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