CMSIS DSP library
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arm_mat_trans_f32.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 19. March 2015 00005 * $Revision: V.1.4.5 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_mat_trans_f32.c 00009 * 00010 * Description: Floating-point matrix transpose. 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Redistribution and use in source and binary forms, with or without 00015 * modification, are permitted provided that the following conditions 00016 * are met: 00017 * - Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * - Redistributions in binary form must reproduce the above copyright 00020 * notice, this list of conditions and the following disclaimer in 00021 * the documentation and/or other materials provided with the 00022 * distribution. 00023 * - Neither the name of ARM LIMITED nor the names of its contributors 00024 * may be used to endorse or promote products derived from this 00025 * software without specific prior written permission. 00026 * 00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00038 * POSSIBILITY OF SUCH DAMAGE. 00039 * -------------------------------------------------------------------- */ 00040 00041 /** 00042 * @defgroup MatrixTrans Matrix Transpose 00043 * 00044 * Tranposes a matrix. 00045 * Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix. 00046 * \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix" 00047 */ 00048 00049 #include "arm_math.h" 00050 00051 /** 00052 * @ingroup groupMatrix 00053 */ 00054 00055 /** 00056 * @addtogroup MatrixTrans 00057 * @{ 00058 */ 00059 00060 /** 00061 * @brief Floating-point matrix transpose. 00062 * @param[in] *pSrc points to the input matrix 00063 * @param[out] *pDst points to the output matrix 00064 * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> 00065 * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. 00066 */ 00067 00068 00069 arm_status arm_mat_trans_f32( 00070 const arm_matrix_instance_f32 * pSrc, 00071 arm_matrix_instance_f32 * pDst) 00072 { 00073 float32_t *pIn = pSrc->pData; /* input data matrix pointer */ 00074 float32_t *pOut = pDst->pData; /* output data matrix pointer */ 00075 float32_t *px; /* Temporary output data matrix pointer */ 00076 uint16_t nRows = pSrc->numRows; /* number of rows */ 00077 uint16_t nColumns = pSrc->numCols; /* number of columns */ 00078 00079 #ifndef ARM_MATH_CM0_FAMILY 00080 00081 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00082 00083 uint16_t blkCnt, i = 0u, row = nRows; /* loop counters */ 00084 arm_status status; /* status of matrix transpose */ 00085 00086 00087 #ifdef ARM_MATH_MATRIX_CHECK 00088 00089 00090 /* Check for matrix mismatch condition */ 00091 if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) 00092 { 00093 /* Set status as ARM_MATH_SIZE_MISMATCH */ 00094 status = ARM_MATH_SIZE_MISMATCH; 00095 } 00096 else 00097 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 00098 00099 { 00100 /* Matrix transpose by exchanging the rows with columns */ 00101 /* row loop */ 00102 do 00103 { 00104 /* Loop Unrolling */ 00105 blkCnt = nColumns >> 2; 00106 00107 /* The pointer px is set to starting address of the column being processed */ 00108 px = pOut + i; 00109 00110 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00111 ** a second loop below computes the remaining 1 to 3 samples. */ 00112 while(blkCnt > 0u) /* column loop */ 00113 { 00114 /* Read and store the input element in the destination */ 00115 *px = *pIn++; 00116 00117 /* Update the pointer px to point to the next row of the transposed matrix */ 00118 px += nRows; 00119 00120 /* Read and store the input element in the destination */ 00121 *px = *pIn++; 00122 00123 /* Update the pointer px to point to the next row of the transposed matrix */ 00124 px += nRows; 00125 00126 /* Read and store the input element in the destination */ 00127 *px = *pIn++; 00128 00129 /* Update the pointer px to point to the next row of the transposed matrix */ 00130 px += nRows; 00131 00132 /* Read and store the input element in the destination */ 00133 *px = *pIn++; 00134 00135 /* Update the pointer px to point to the next row of the transposed matrix */ 00136 px += nRows; 00137 00138 /* Decrement the column loop counter */ 00139 blkCnt--; 00140 } 00141 00142 /* Perform matrix transpose for last 3 samples here. */ 00143 blkCnt = nColumns % 0x4u; 00144 00145 while(blkCnt > 0u) 00146 { 00147 /* Read and store the input element in the destination */ 00148 *px = *pIn++; 00149 00150 /* Update the pointer px to point to the next row of the transposed matrix */ 00151 px += nRows; 00152 00153 /* Decrement the column loop counter */ 00154 blkCnt--; 00155 } 00156 00157 #else 00158 00159 /* Run the below code for Cortex-M0 */ 00160 00161 uint16_t col, i = 0u, row = nRows; /* loop counters */ 00162 arm_status status; /* status of matrix transpose */ 00163 00164 00165 #ifdef ARM_MATH_MATRIX_CHECK 00166 00167 /* Check for matrix mismatch condition */ 00168 if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) 00169 { 00170 /* Set status as ARM_MATH_SIZE_MISMATCH */ 00171 status = ARM_MATH_SIZE_MISMATCH; 00172 } 00173 else 00174 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ 00175 00176 { 00177 /* Matrix transpose by exchanging the rows with columns */ 00178 /* row loop */ 00179 do 00180 { 00181 /* The pointer px is set to starting address of the column being processed */ 00182 px = pOut + i; 00183 00184 /* Initialize column loop counter */ 00185 col = nColumns; 00186 00187 while(col > 0u) 00188 { 00189 /* Read and store the input element in the destination */ 00190 *px = *pIn++; 00191 00192 /* Update the pointer px to point to the next row of the transposed matrix */ 00193 px += nRows; 00194 00195 /* Decrement the column loop counter */ 00196 col--; 00197 } 00198 00199 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ 00200 00201 i++; 00202 00203 /* Decrement the row loop counter */ 00204 row--; 00205 00206 } while(row > 0u); /* row loop end */ 00207 00208 /* Set status as ARM_MATH_SUCCESS */ 00209 status = ARM_MATH_SUCCESS; 00210 } 00211 00212 /* Return to application */ 00213 return (status); 00214 } 00215 00216 /** 00217 * @} end of MatrixTrans group 00218 */
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