CMSIS DSP library
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arm_dot_prod_q7.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 19. March 2015 00005 * $Revision: V.1.4.5 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_dot_prod_q7.c 00009 * 00010 * Description: Q7 dot product. 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Redistribution and use in source and binary forms, with or without 00015 * modification, are permitted provided that the following conditions 00016 * are met: 00017 * - Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * - Redistributions in binary form must reproduce the above copyright 00020 * notice, this list of conditions and the following disclaimer in 00021 * the documentation and/or other materials provided with the 00022 * distribution. 00023 * - Neither the name of ARM LIMITED nor the names of its contributors 00024 * may be used to endorse or promote products derived from this 00025 * software without specific prior written permission. 00026 * 00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00038 * POSSIBILITY OF SUCH DAMAGE. 00039 * -------------------------------------------------------------------- */ 00040 00041 #include "arm_math.h" 00042 00043 /** 00044 * @ingroup groupMath 00045 */ 00046 00047 /** 00048 * @addtogroup dot_prod 00049 * @{ 00050 */ 00051 00052 /** 00053 * @brief Dot product of Q7 vectors. 00054 * @param[in] *pSrcA points to the first input vector 00055 * @param[in] *pSrcB points to the second input vector 00056 * @param[in] blockSize number of samples in each vector 00057 * @param[out] *result output result returned here 00058 * @return none. 00059 * 00060 * <b>Scaling and Overflow Behavior:</b> 00061 * \par 00062 * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these 00063 * results are added to an accumulator in 18.14 format. 00064 * Nonsaturating additions are used and there is no danger of wrap around as long as 00065 * the vectors are less than 2^18 elements long. 00066 * The return result is in 18.14 format. 00067 */ 00068 00069 void arm_dot_prod_q7( 00070 q7_t * pSrcA, 00071 q7_t * pSrcB, 00072 uint32_t blockSize, 00073 q31_t * result) 00074 { 00075 uint32_t blkCnt; /* loop counter */ 00076 00077 q31_t sum = 0; /* Temporary variables to store output */ 00078 00079 #ifndef ARM_MATH_CM0_FAMILY 00080 00081 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00082 00083 q31_t input1, input2; /* Temporary variables to store input */ 00084 q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */ 00085 00086 00087 00088 /*loop Unrolling */ 00089 blkCnt = blockSize >> 2u; 00090 00091 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00092 ** a second loop below computes the remaining 1 to 3 samples. */ 00093 while(blkCnt > 0u) 00094 { 00095 /* read 4 samples at a time from sourceA */ 00096 input1 = *__SIMD32(pSrcA)++; 00097 /* read 4 samples at a time from sourceB */ 00098 input2 = *__SIMD32(pSrcB)++; 00099 00100 /* extract two q7_t samples to q15_t samples */ 00101 inA1 = __SXTB16(__ROR(input1, 8)); 00102 /* extract reminaing two samples */ 00103 inA2 = __SXTB16(input1); 00104 /* extract two q7_t samples to q15_t samples */ 00105 inB1 = __SXTB16(__ROR(input2, 8)); 00106 /* extract reminaing two samples */ 00107 inB2 = __SXTB16(input2); 00108 00109 /* multiply and accumulate two samples at a time */ 00110 sum = __SMLAD(inA1, inB1, sum); 00111 sum = __SMLAD(inA2, inB2, sum); 00112 00113 /* Decrement the loop counter */ 00114 blkCnt--; 00115 } 00116 00117 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00118 ** No loop unrolling is used. */ 00119 blkCnt = blockSize % 0x4u; 00120 00121 while(blkCnt > 0u) 00122 { 00123 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ 00124 /* Dot product and then store the results in a temporary buffer. */ 00125 sum = __SMLAD(*pSrcA++, *pSrcB++, sum); 00126 00127 /* Decrement the loop counter */ 00128 blkCnt--; 00129 } 00130 00131 #else 00132 00133 /* Run the below code for Cortex-M0 */ 00134 00135 00136 00137 /* Initialize blkCnt with number of samples */ 00138 blkCnt = blockSize; 00139 00140 while(blkCnt > 0u) 00141 { 00142 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ 00143 /* Dot product and then store the results in a temporary buffer. */ 00144 sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++); 00145 00146 /* Decrement the loop counter */ 00147 blkCnt--; 00148 } 00149 00150 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ 00151 00152 00153 /* Store the result in the destination buffer in 18.14 format */ 00154 *result = sum; 00155 } 00156 00157 /** 00158 * @} end of dot_prod group 00159 */
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