CMSIS DSP library
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arm_dot_prod_q31.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 19. March 2015 00005 * $Revision: V.1.4.5 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_dot_prod_q31.c 00009 * 00010 * Description: Q31 dot product. 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Redistribution and use in source and binary forms, with or without 00015 * modification, are permitted provided that the following conditions 00016 * are met: 00017 * - Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * - Redistributions in binary form must reproduce the above copyright 00020 * notice, this list of conditions and the following disclaimer in 00021 * the documentation and/or other materials provided with the 00022 * distribution. 00023 * - Neither the name of ARM LIMITED nor the names of its contributors 00024 * may be used to endorse or promote products derived from this 00025 * software without specific prior written permission. 00026 * 00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00038 * POSSIBILITY OF SUCH DAMAGE. 00039 * -------------------------------------------------------------------- */ 00040 00041 #include "arm_math.h" 00042 00043 /** 00044 * @ingroup groupMath 00045 */ 00046 00047 /** 00048 * @addtogroup dot_prod 00049 * @{ 00050 */ 00051 00052 /** 00053 * @brief Dot product of Q31 vectors. 00054 * @param[in] *pSrcA points to the first input vector 00055 * @param[in] *pSrcB points to the second input vector 00056 * @param[in] blockSize number of samples in each vector 00057 * @param[out] *result output result returned here 00058 * @return none. 00059 * 00060 * <b>Scaling and Overflow Behavior:</b> 00061 * \par 00062 * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these 00063 * are truncated to 2.48 format by discarding the lower 14 bits. 00064 * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. 00065 * There are 15 guard bits in the accumulator and there is no risk of overflow as long as 00066 * the length of the vectors is less than 2^16 elements. 00067 * The return result is in 16.48 format. 00068 */ 00069 00070 void arm_dot_prod_q31( 00071 q31_t * pSrcA, 00072 q31_t * pSrcB, 00073 uint32_t blockSize, 00074 q63_t * result) 00075 { 00076 q63_t sum = 0; /* Temporary result storage */ 00077 uint32_t blkCnt; /* loop counter */ 00078 00079 00080 #ifndef ARM_MATH_CM0_FAMILY 00081 00082 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00083 q31_t inA1, inA2, inA3, inA4; 00084 q31_t inB1, inB2, inB3, inB4; 00085 00086 /*loop Unrolling */ 00087 blkCnt = blockSize >> 2u; 00088 00089 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00090 ** a second loop below computes the remaining 1 to 3 samples. */ 00091 while(blkCnt > 0u) 00092 { 00093 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ 00094 /* Calculate dot product and then store the result in a temporary buffer. */ 00095 inA1 = *pSrcA++; 00096 inA2 = *pSrcA++; 00097 inA3 = *pSrcA++; 00098 inA4 = *pSrcA++; 00099 inB1 = *pSrcB++; 00100 inB2 = *pSrcB++; 00101 inB3 = *pSrcB++; 00102 inB4 = *pSrcB++; 00103 00104 sum += ((q63_t) inA1 * inB1) >> 14u; 00105 sum += ((q63_t) inA2 * inB2) >> 14u; 00106 sum += ((q63_t) inA3 * inB3) >> 14u; 00107 sum += ((q63_t) inA4 * inB4) >> 14u; 00108 00109 /* Decrement the loop counter */ 00110 blkCnt--; 00111 } 00112 00113 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00114 ** No loop unrolling is used. */ 00115 blkCnt = blockSize % 0x4u; 00116 00117 #else 00118 00119 /* Run the below code for Cortex-M0 */ 00120 00121 /* Initialize blkCnt with number of samples */ 00122 blkCnt = blockSize; 00123 00124 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ 00125 00126 00127 while(blkCnt > 0u) 00128 { 00129 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */ 00130 /* Calculate dot product and then store the result in a temporary buffer. */ 00131 sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u; 00132 00133 /* Decrement the loop counter */ 00134 blkCnt--; 00135 } 00136 00137 /* Store the result in the destination buffer in 16.48 format */ 00138 *result = sum; 00139 } 00140 00141 /** 00142 * @} end of dot_prod group 00143 */
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