arm_dot_prod_q15.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        19. March 2015
00005 * $Revision:    V.1.4.5
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_dot_prod_q15.c    
00009 *    
00010 * Description:  Q15 dot product.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.
00039 * -------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupMath    
00045  */
00046 
00047 /**    
00048  * @addtogroup dot_prod    
00049  * @{    
00050  */
00051 
00052 /**    
00053  * @brief Dot product of Q15 vectors.    
00054  * @param[in]       *pSrcA points to the first input vector    
00055  * @param[in]       *pSrcB points to the second input vector    
00056  * @param[in]       blockSize number of samples in each vector    
00057  * @param[out]      *result output result returned here    
00058  * @return none.    
00059  *    
00060  * <b>Scaling and Overflow Behavior:</b>    
00061  * \par    
00062  * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these    
00063  * results are added to a 64-bit accumulator in 34.30 format.    
00064  * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator    
00065  * there is no risk of overflow.    
00066  * The return result is in 34.30 format.    
00067  */
00068 
00069 void arm_dot_prod_q15(
00070   q15_t * pSrcA,
00071   q15_t * pSrcB,
00072   uint32_t blockSize,
00073   q63_t * result)
00074 {
00075   q63_t sum = 0;                                 /* Temporary result storage */
00076   uint32_t blkCnt;                               /* loop counter */
00077 
00078 #ifndef ARM_MATH_CM0_FAMILY
00079 
00080 /* Run the below code for Cortex-M4 and Cortex-M3 */
00081 
00082 
00083   /*loop Unrolling */
00084   blkCnt = blockSize >> 2u;
00085 
00086   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00087    ** a second loop below computes the remaining 1 to 3 samples. */
00088   while(blkCnt > 0u)
00089   {
00090     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00091     /* Calculate dot product and then store the result in a temporary buffer. */
00092     sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
00093     sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
00094 
00095     /* Decrement the loop counter */
00096     blkCnt--;
00097   }
00098 
00099   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
00100    ** No loop unrolling is used. */
00101   blkCnt = blockSize % 0x4u;
00102 
00103   while(blkCnt > 0u)
00104   {
00105     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00106     /* Calculate dot product and then store the results in a temporary buffer. */
00107     sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
00108 
00109     /* Decrement the loop counter */
00110     blkCnt--;
00111   }
00112 
00113 
00114 #else
00115 
00116   /* Run the below code for Cortex-M0 */
00117 
00118   /* Initialize blkCnt with number of samples */
00119   blkCnt = blockSize;
00120 
00121   while(blkCnt > 0u)
00122   {
00123     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00124     /* Calculate dot product and then store the results in a temporary buffer. */
00125     sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
00126 
00127     /* Decrement the loop counter */
00128     blkCnt--;
00129   }
00130 
00131 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00132 
00133   /* Store the result in the destination buffer in 34.30 format */
00134   *result = sum;
00135 
00136 }
00137 
00138 /**    
00139  * @} end of dot_prod group    
00140  */