CMSIS DSP library
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arm_copy_q15.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 19. March 2015 00005 * $Revision: V.1.4.5 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_copy_q15.c 00009 * 00010 * Description: Copies the elements of a Q15 vector. 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Redistribution and use in source and binary forms, with or without 00015 * modification, are permitted provided that the following conditions 00016 * are met: 00017 * - Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * - Redistributions in binary form must reproduce the above copyright 00020 * notice, this list of conditions and the following disclaimer in 00021 * the documentation and/or other materials provided with the 00022 * distribution. 00023 * - Neither the name of ARM LIMITED nor the names of its contributors 00024 * may be used to endorse or promote products derived from this 00025 * software without specific prior written permission. 00026 * 00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00038 * POSSIBILITY OF SUCH DAMAGE. 00039 * -------------------------------------------------------------------- */ 00040 00041 #include "arm_math.h" 00042 00043 /** 00044 * @ingroup groupSupport 00045 */ 00046 00047 /** 00048 * @addtogroup copy 00049 * @{ 00050 */ 00051 /** 00052 * @brief Copies the elements of a Q15 vector. 00053 * @param[in] *pSrc points to input vector 00054 * @param[out] *pDst points to output vector 00055 * @param[in] blockSize length of the input vector 00056 * @return none. 00057 * 00058 */ 00059 00060 void arm_copy_q15( 00061 q15_t * pSrc, 00062 q15_t * pDst, 00063 uint32_t blockSize) 00064 { 00065 uint32_t blkCnt; /* loop counter */ 00066 00067 #ifndef ARM_MATH_CM0_FAMILY 00068 00069 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00070 00071 /*loop Unrolling */ 00072 blkCnt = blockSize >> 2u; 00073 00074 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00075 ** a second loop below computes the remaining 1 to 3 samples. */ 00076 while(blkCnt > 0u) 00077 { 00078 /* C = A */ 00079 /* Read two inputs */ 00080 *__SIMD32(pDst)++ = *__SIMD32(pSrc)++; 00081 *__SIMD32(pDst)++ = *__SIMD32(pSrc)++; 00082 00083 /* Decrement the loop counter */ 00084 blkCnt--; 00085 } 00086 00087 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00088 ** No loop unrolling is used. */ 00089 blkCnt = blockSize % 0x4u; 00090 00091 00092 #else 00093 00094 /* Run the below code for Cortex-M0 */ 00095 00096 /* Loop over blockSize number of values */ 00097 blkCnt = blockSize; 00098 00099 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ 00100 00101 while(blkCnt > 0u) 00102 { 00103 /* C = A */ 00104 /* Copy and then store the value in the destination buffer */ 00105 *pDst++ = *pSrc++; 00106 00107 /* Decrement the loop counter */ 00108 blkCnt--; 00109 } 00110 } 00111 00112 /** 00113 * @} end of BasicCopy group 00114 */
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