CMSIS DSP library
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arm_cmplx_mult_real_q15.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 19. October 2015 00005 * $Revision: V.1.4.5 a 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_cmplx_mult_real_q15.c 00009 * 00010 * Description: Q15 complex by real multiplication 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Redistribution and use in source and binary forms, with or without 00015 * modification, are permitted provided that the following conditions 00016 * are met: 00017 * - Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * - Redistributions in binary form must reproduce the above copyright 00020 * notice, this list of conditions and the following disclaimer in 00021 * the documentation and/or other materials provided with the 00022 * distribution. 00023 * - Neither the name of ARM LIMITED nor the names of its contributors 00024 * may be used to endorse or promote products derived from this 00025 * software without specific prior written permission. 00026 * 00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00038 * POSSIBILITY OF SUCH DAMAGE. 00039 * -------------------------------------------------------------------- */ 00040 00041 #include "arm_math.h" 00042 00043 /** 00044 * @ingroup groupCmplxMath 00045 */ 00046 00047 /** 00048 * @addtogroup CmplxByRealMult 00049 * @{ 00050 */ 00051 00052 00053 /** 00054 * @brief Q15 complex-by-real multiplication 00055 * @param[in] *pSrcCmplx points to the complex input vector 00056 * @param[in] *pSrcReal points to the real input vector 00057 * @param[out] *pCmplxDst points to the complex output vector 00058 * @param[in] numSamples number of samples in each vector 00059 * @return none. 00060 * 00061 * <b>Scaling and Overflow Behavior:</b> 00062 * \par 00063 * The function uses saturating arithmetic. 00064 * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. 00065 */ 00066 00067 void arm_cmplx_mult_real_q15( 00068 q15_t * pSrcCmplx, 00069 q15_t * pSrcReal, 00070 q15_t * pCmplxDst, 00071 uint32_t numSamples) 00072 { 00073 q15_t in; /* Temporary variable to store input value */ 00074 00075 #ifndef ARM_MATH_CM0_FAMILY 00076 00077 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00078 uint32_t blkCnt; /* loop counters */ 00079 q31_t inA1, inA2; /* Temporary variables to hold input data */ 00080 q31_t inB1; /* Temporary variables to hold input data */ 00081 q15_t out1, out2, out3, out4; /* Temporary variables to hold output data */ 00082 q31_t mul1, mul2, mul3, mul4; /* Temporary variables to hold intermediate data */ 00083 00084 /* loop Unrolling */ 00085 blkCnt = numSamples >> 2u; 00086 00087 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00088 ** a second loop below computes the remaining 1 to 3 samples. */ 00089 while(blkCnt > 0u) 00090 { 00091 /* C[2 * i] = A[2 * i] * B[i]. */ 00092 /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ 00093 /* read complex number both real and imaginary from complex input buffer */ 00094 inA1 = *__SIMD32(pSrcCmplx)++; 00095 /* read two real values at a time from real input buffer */ 00096 inB1 = *__SIMD32(pSrcReal)++; 00097 /* read complex number both real and imaginary from complex input buffer */ 00098 inA2 = *__SIMD32(pSrcCmplx)++; 00099 00100 /* multiply complex number with real numbers */ 00101 #ifndef ARM_MATH_BIG_ENDIAN 00102 00103 mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1)); 00104 mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1)); 00105 mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16)); 00106 mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16)); 00107 00108 #else 00109 00110 mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); 00111 mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16)); 00112 mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1); 00113 mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1); 00114 00115 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 00116 00117 /* saturate the result */ 00118 out1 = (q15_t) __SSAT(mul1 >> 15u, 16); 00119 out2 = (q15_t) __SSAT(mul2 >> 15u, 16); 00120 out3 = (q15_t) __SSAT(mul3 >> 15u, 16); 00121 out4 = (q15_t) __SSAT(mul4 >> 15u, 16); 00122 00123 /* pack real and imaginary outputs and store them to destination */ 00124 *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16); 00125 *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16); 00126 00127 inA1 = *__SIMD32(pSrcCmplx)++; 00128 inB1 = *__SIMD32(pSrcReal)++; 00129 inA2 = *__SIMD32(pSrcCmplx)++; 00130 00131 #ifndef ARM_MATH_BIG_ENDIAN 00132 00133 mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1)); 00134 mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1)); 00135 mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16)); 00136 mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16)); 00137 00138 #else 00139 00140 mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); 00141 mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16)); 00142 mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1); 00143 mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1); 00144 00145 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 00146 00147 out1 = (q15_t) __SSAT(mul1 >> 15u, 16); 00148 out2 = (q15_t) __SSAT(mul2 >> 15u, 16); 00149 out3 = (q15_t) __SSAT(mul3 >> 15u, 16); 00150 out4 = (q15_t) __SSAT(mul4 >> 15u, 16); 00151 00152 *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16); 00153 *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16); 00154 00155 /* Decrement the numSamples loop counter */ 00156 blkCnt--; 00157 } 00158 00159 /* If the numSamples is not a multiple of 4, compute any remaining output samples here. 00160 ** No loop unrolling is used. */ 00161 blkCnt = numSamples % 0x4u; 00162 00163 while(blkCnt > 0u) 00164 { 00165 /* C[2 * i] = A[2 * i] * B[i]. */ 00166 /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ 00167 in = *pSrcReal++; 00168 /* store the result in the destination buffer. */ 00169 *pCmplxDst++ = 00170 (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); 00171 *pCmplxDst++ = 00172 (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); 00173 00174 /* Decrement the numSamples loop counter */ 00175 blkCnt--; 00176 } 00177 00178 #else 00179 00180 /* Run the below code for Cortex-M0 */ 00181 00182 while(numSamples > 0u) 00183 { 00184 /* realOut = realA * realB. */ 00185 /* imagOut = imagA * realB. */ 00186 in = *pSrcReal++; 00187 /* store the result in the destination buffer. */ 00188 *pCmplxDst++ = 00189 (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); 00190 *pCmplxDst++ = 00191 (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); 00192 00193 /* Decrement the numSamples loop counter */ 00194 numSamples--; 00195 } 00196 00197 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ 00198 00199 } 00200 00201 /** 00202 * @} end of CmplxByRealMult group 00203 */
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