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CMSIS DSP library
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Diff: cmsis_dsp/FilteringFunctions/arm_iir_lattice_q15.c
- Revision:
- 2:da51fb522205
- Parent:
- 1:fdd22bb7aa52
- Child:
- 3:7a284390b0ce
--- a/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q15.c Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q15.c Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. February 2012
-* $Revision: V1.1.0
+* $Revision: V1.1.0
*
-* Project: CMSIS DSP Library
-* Title: arm_iir_lattice_q15.c
+* Project: CMSIS DSP Library
+* Title: arm_iir_lattice_q15.c
*
-* Description: Q15 IIR lattice filter processing function.
+* Description: Q15 IIR lattice filter processing function.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
@@ -171,20 +171,20 @@
#else
- v1 = *pv++;
- v2 = *pv++;
+ v1 = *pv++;
+ v2 = *pv++;
#ifndef ARM_MATH_BIG_ENDIAN
- v = __PKHBT(v1, v2, 16);
+ v = __PKHBT(v1, v2, 16);
#else
- v = __PKHBT(v2, v1, 16);
+ v = __PKHBT(v2, v1, 16);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Pack gN-1(n) and gN-2(n) */
@@ -240,20 +240,20 @@
#else
- v1 = *pv++;
- v2 = *pv++;
+ v1 = *pv++;
+ v2 = *pv++;
#ifndef ARM_MATH_BIG_ENDIAN
- v = __PKHBT(v1, v2, 16);
+ v = __PKHBT(v1, v2, 16);
#else
- v = __PKHBT(v2, v1, 16);
+ v = __PKHBT(v2, v1, 16);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Pack gN-3(n) and gN-4(n) */
@@ -336,7 +336,7 @@
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Decrement the loop counter */
stgCnt--;