Diff: cmsis_dsp/FilteringFunctions/arm_conv_fast_opt_q15.c

Revision:

2:da51fb522205

Parent:

1:fdd22bb7aa52

Child:

3:7a284390b0ce

--- a/cmsis_dsp/FilteringFunctions/arm_conv_fast_opt_q15.c	Wed Nov 28 12:30:09 2012 +0000
+++ b/cmsis_dsp/FilteringFunctions/arm_conv_fast_opt_q15.c	Thu May 30 17:10:11 2013 +0100
@@ -2,12 +2,12 @@
 * Copyright (C) 2010 ARM Limited. All rights reserved.    
 *    
 * $Date:        15. February 2012  
-* $Revision:     V1.1.0  
+* $Revision: 	V1.1.0  
 *    
-* Project:         CMSIS DSP Library    
-* Title:        arm_conv_fast_opt_q15.c    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_conv_fast_opt_q15.c    
 *    
-* Description:    Fast Q15 Convolution.    
+* Description:	Fast Q15 Convolution.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
@@ -57,7 +57,7 @@
  *    
  * \par Restrictions    
  *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *    In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
+ *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
  *     
  * <b>Scaling and Overflow Behavior:</b>    
  *    
@@ -100,7 +100,7 @@
 
   q15_t a, b;
 
-#endif    /*    #ifdef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifdef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -217,7 +217,7 @@
     k--;
   }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
 
 #ifndef UNALIGNED_SUPPORT_DISABLE
@@ -260,7 +260,7 @@
     k--;
   }
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* Temporary pointer for scratch2 */
   py = pScratch2;
@@ -344,25 +344,25 @@
 
       acc3 = __SMLADX(x3, y2, acc3);
 
-#else     
+#else	 
 
       /* Read four samples from smaller buffer */
-      a = *pIn2;
-      b = *(pIn2 + 1);
+	  a = *pIn2;
+	  b = *(pIn2 + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       y1 = __PKHBT(a, b, 16);
 #else
       y1 = __PKHBT(b, a, 16);
 #endif
-      
-      a = *(pIn2 + 2);
-      b = *(pIn2 + 3);
+	  
+	  a = *(pIn2 + 2);
+	  b = *(pIn2 + 3);
 #ifndef ARM_MATH_BIG_ENDIAN
       y2 = __PKHBT(a, b, 16);
 #else
       y2 = __PKHBT(b, a, 16);
-#endif                
+#endif				
 
       acc0 = __SMLAD(x1, y1, acc0);
 
@@ -376,8 +376,8 @@
 
       acc1 = __SMLADX(x3, y1, acc1);
 
-      a = *pScr1;
-      b = *(pScr1 + 1);
+	  a = *pScr1;
+	  b = *(pScr1 + 1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x1 = __PKHBT(a, b, 16);
@@ -399,8 +399,8 @@
 
       acc1 = __SMLADX(x3, y2, acc1);
 
-      a = *(pScr1 + 2);
-      b = *(pScr1 + 3);
+	  a = *(pScr1 + 2);
+	  b = *(pScr1 + 3);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x2 = __PKHBT(a, b, 16);
@@ -416,7 +416,7 @@
 
       acc3 = __SMLADX(x3, y2, acc3);
 
-#endif    /*    #ifndef UNALIGNED_SUPPORT_DISABLE    */
+#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
       /* update scratch pointers */
       pIn2 += 4u;