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CMSIS DSP library

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cmsis_dsp/SupportFunctions/arm_q15_to_q7.c@1:fdd22bb7aa52, 2012-11-28 (annotated)

Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_q15_to_q7.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Converts the elements of the Q15 vector to Q7 vector.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 * ---------------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 32
emilmont 1:fdd22bb7aa52 33 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 34
emilmont 1:fdd22bb7aa52 35 /**
emilmont 1:fdd22bb7aa52 36 * @ingroup groupSupport
emilmont 1:fdd22bb7aa52 37 */
emilmont 1:fdd22bb7aa52 38
emilmont 1:fdd22bb7aa52 39 /**
emilmont 1:fdd22bb7aa52 40 * @addtogroup q15_to_x
emilmont 1:fdd22bb7aa52 41 * @{
emilmont 1:fdd22bb7aa52 42 */
emilmont 1:fdd22bb7aa52 43
emilmont 1:fdd22bb7aa52 44
emilmont 1:fdd22bb7aa52 45 /**
emilmont 1:fdd22bb7aa52 46 * @brief Converts the elements of the Q15 vector to Q7 vector.
emilmont 1:fdd22bb7aa52 47 * @param[in] *pSrc points to the Q15 input vector
emilmont 1:fdd22bb7aa52 48 * @param[out] *pDst points to the Q7 output vector
emilmont 1:fdd22bb7aa52 49 * @param[in] blockSize length of the input vector
emilmont 1:fdd22bb7aa52 50 * @return none.
emilmont 1:fdd22bb7aa52 51 *
emilmont 1:fdd22bb7aa52 52 * \par Description:
emilmont 1:fdd22bb7aa52 53 *
emilmont 1:fdd22bb7aa52 54 * The equation used for the conversion process is:
emilmont 1:fdd22bb7aa52 55 *
emilmont 1:fdd22bb7aa52 56 * <pre>
emilmont 1:fdd22bb7aa52 57 * pDst[n] = (q7_t) pSrc[n] >> 8; 0 <= n < blockSize.
emilmont 1:fdd22bb7aa52 58 * </pre>
emilmont 1:fdd22bb7aa52 59 *
emilmont 1:fdd22bb7aa52 60 */
emilmont 1:fdd22bb7aa52 61
emilmont 1:fdd22bb7aa52 62
emilmont 1:fdd22bb7aa52 63 void arm_q15_to_q7(
emilmont 1:fdd22bb7aa52 64 q15_t * pSrc,
emilmont 1:fdd22bb7aa52 65 q7_t * pDst,
emilmont 1:fdd22bb7aa52 66 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 67 {
emilmont 1:fdd22bb7aa52 68 q15_t *pIn = pSrc; /* Src pointer */
emilmont 1:fdd22bb7aa52 69 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 70
emilmont 1:fdd22bb7aa52 71 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 72
emilmont 1:fdd22bb7aa52 73 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 74 q31_t in1, in2;
emilmont 1:fdd22bb7aa52 75 q31_t out1, out2;
emilmont 1:fdd22bb7aa52 76
emilmont 1:fdd22bb7aa52 77 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 78 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 79
emilmont 1:fdd22bb7aa52 80 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 81 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 82 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 83 {
emilmont 1:fdd22bb7aa52 84 /* C = (q7_t) A >> 8 */
emilmont 1:fdd22bb7aa52 85 /* convert from q15 to q7 and then store the results in the destination buffer */
emilmont 1:fdd22bb7aa52 86 in1 = *__SIMD32(pIn)++;
emilmont 1:fdd22bb7aa52 87 in2 = *__SIMD32(pIn)++;
emilmont 1:fdd22bb7aa52 88
emilmont 1:fdd22bb7aa52 89 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 90
emilmont 1:fdd22bb7aa52 91 out1 = __PKHTB(in2, in1, 16);
emilmont 1:fdd22bb7aa52 92 out2 = __PKHBT(in2, in1, 16);
emilmont 1:fdd22bb7aa52 93
emilmont 1:fdd22bb7aa52 94 #else
emilmont 1:fdd22bb7aa52 95
emilmont 1:fdd22bb7aa52 96 out1 = __PKHTB(in1, in2, 16);
emilmont 1:fdd22bb7aa52 97 out2 = __PKHBT(in1, in2, 16);
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 #endif // #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 100
emilmont 1:fdd22bb7aa52 101 /* rotate packed value by 24 */
emilmont 1:fdd22bb7aa52 102 out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24);
emilmont 1:fdd22bb7aa52 103
emilmont 1:fdd22bb7aa52 104 /* anding with 0xff00ff00 to get two 8 bit values */
emilmont 1:fdd22bb7aa52 105 out1 = out1 & 0xFF00FF00;
emilmont 1:fdd22bb7aa52 106 /* anding with 0x00ff00ff to get two 8 bit values */
emilmont 1:fdd22bb7aa52 107 out2 = out2 & 0x00FF00FF;
emilmont 1:fdd22bb7aa52 108
emilmont 1:fdd22bb7aa52 109 /* oring two values(contains two 8 bit values) to get four packed 8 bit values */
emilmont 1:fdd22bb7aa52 110 out1 = out1 | out2;
emilmont 1:fdd22bb7aa52 111
emilmont 1:fdd22bb7aa52 112 /* store 4 samples at a time to destiantion buffer */
emilmont 1:fdd22bb7aa52 113 *__SIMD32(pDst)++ = out1;
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 116 blkCnt--;
emilmont 1:fdd22bb7aa52 117 }
emilmont 1:fdd22bb7aa52 118
emilmont 1:fdd22bb7aa52 119 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 120 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 121 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 #else
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 /* Loop over blockSize number of values */
emilmont 1:fdd22bb7aa52 128 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 129
emilmont 1:fdd22bb7aa52 130 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 133 {
emilmont 1:fdd22bb7aa52 134 /* C = (q7_t) A >> 8 */
emilmont 1:fdd22bb7aa52 135 /* convert from q15 to q7 and then store the results in the destination buffer */
emilmont 1:fdd22bb7aa52 136 *pDst++ = (q7_t) (*pIn++ >> 8);
emilmont 1:fdd22bb7aa52 137
emilmont 1:fdd22bb7aa52 138 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 139 blkCnt--;
emilmont 1:fdd22bb7aa52 140 }
emilmont 1:fdd22bb7aa52 141
emilmont 1:fdd22bb7aa52 142 }
emilmont 1:fdd22bb7aa52 143
emilmont 1:fdd22bb7aa52 144 /**
emilmont 1:fdd22bb7aa52 145 * @} end of q15_to_x group
emilmont 1:fdd22bb7aa52 146 */