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CMSIS DSP library

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cmsis_dsp/SupportFunctions/arm_q15_to_q31.c@1:fdd22bb7aa52, 2012-11-28 (annotated)

Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_q15_to_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Converts the elements of the Q15 vector to Q31 vector.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 * ---------------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 32
emilmont 1:fdd22bb7aa52 33 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 34
emilmont 1:fdd22bb7aa52 35 /**
emilmont 1:fdd22bb7aa52 36 * @ingroup groupSupport
emilmont 1:fdd22bb7aa52 37 */
emilmont 1:fdd22bb7aa52 38
emilmont 1:fdd22bb7aa52 39 /**
emilmont 1:fdd22bb7aa52 40 * @addtogroup q15_to_x
emilmont 1:fdd22bb7aa52 41 * @{
emilmont 1:fdd22bb7aa52 42 */
emilmont 1:fdd22bb7aa52 43
emilmont 1:fdd22bb7aa52 44 /**
emilmont 1:fdd22bb7aa52 45 * @brief Converts the elements of the Q15 vector to Q31 vector.
emilmont 1:fdd22bb7aa52 46 * @param[in] *pSrc points to the Q15 input vector
emilmont 1:fdd22bb7aa52 47 * @param[out] *pDst points to the Q31 output vector
emilmont 1:fdd22bb7aa52 48 * @param[in] blockSize length of the input vector
emilmont 1:fdd22bb7aa52 49 * @return none.
emilmont 1:fdd22bb7aa52 50 *
emilmont 1:fdd22bb7aa52 51 * \par Description:
emilmont 1:fdd22bb7aa52 52 *
emilmont 1:fdd22bb7aa52 53 * The equation used for the conversion process is:
emilmont 1:fdd22bb7aa52 54 *
emilmont 1:fdd22bb7aa52 55 * <pre>
emilmont 1:fdd22bb7aa52 56 * pDst[n] = (q31_t) pSrc[n] << 16; 0 <= n < blockSize.
emilmont 1:fdd22bb7aa52 57 * </pre>
emilmont 1:fdd22bb7aa52 58 *
emilmont 1:fdd22bb7aa52 59 */
emilmont 1:fdd22bb7aa52 60
emilmont 1:fdd22bb7aa52 61
emilmont 1:fdd22bb7aa52 62 void arm_q15_to_q31(
emilmont 1:fdd22bb7aa52 63 q15_t * pSrc,
emilmont 1:fdd22bb7aa52 64 q31_t * pDst,
emilmont 1:fdd22bb7aa52 65 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 66 {
emilmont 1:fdd22bb7aa52 67 q15_t *pIn = pSrc; /* Src pointer */
emilmont 1:fdd22bb7aa52 68 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 69
emilmont 1:fdd22bb7aa52 70 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 71
emilmont 1:fdd22bb7aa52 72 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 73 q31_t in1, in2;
emilmont 1:fdd22bb7aa52 74 q31_t out1, out2, out3, out4;
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 77 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 78
emilmont 1:fdd22bb7aa52 79 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 80 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 81 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 82 {
emilmont 1:fdd22bb7aa52 83 /* C = (q31_t)A << 16 */
emilmont 1:fdd22bb7aa52 84 /* convert from q15 to q31 and then store the results in the destination buffer */
emilmont 1:fdd22bb7aa52 85 in1 = *__SIMD32(pIn)++;
emilmont 1:fdd22bb7aa52 86 in2 = *__SIMD32(pIn)++;
emilmont 1:fdd22bb7aa52 87
emilmont 1:fdd22bb7aa52 88 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 89
emilmont 1:fdd22bb7aa52 90 /* extract lower 16 bits to 32 bit result */
emilmont 1:fdd22bb7aa52 91 out1 = in1 << 16u;
emilmont 1:fdd22bb7aa52 92 /* extract upper 16 bits to 32 bit result */
emilmont 1:fdd22bb7aa52 93 out2 = in1 & 0xFFFF0000;
emilmont 1:fdd22bb7aa52 94 /* extract lower 16 bits to 32 bit result */
emilmont 1:fdd22bb7aa52 95 out3 = in2 << 16u;
emilmont 1:fdd22bb7aa52 96 /* extract upper 16 bits to 32 bit result */
emilmont 1:fdd22bb7aa52 97 out4 = in2 & 0xFFFF0000;
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 #else
emilmont 1:fdd22bb7aa52 100
emilmont 1:fdd22bb7aa52 101 /* extract upper 16 bits to 32 bit result */
emilmont 1:fdd22bb7aa52 102 out1 = in1 & 0xFFFF0000;
emilmont 1:fdd22bb7aa52 103 /* extract lower 16 bits to 32 bit result */
emilmont 1:fdd22bb7aa52 104 out2 = in1 << 16u;
emilmont 1:fdd22bb7aa52 105 /* extract upper 16 bits to 32 bit result */
emilmont 1:fdd22bb7aa52 106 out3 = in2 & 0xFFFF0000;
emilmont 1:fdd22bb7aa52 107 /* extract lower 16 bits to 32 bit result */
emilmont 1:fdd22bb7aa52 108 out4 = in2 << 16u;
emilmont 1:fdd22bb7aa52 109
emilmont 1:fdd22bb7aa52 110 #endif // #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 111
emilmont 1:fdd22bb7aa52 112 *pDst++ = out1;
emilmont 1:fdd22bb7aa52 113 *pDst++ = out2;
emilmont 1:fdd22bb7aa52 114 *pDst++ = out3;
emilmont 1:fdd22bb7aa52 115 *pDst++ = out4;
emilmont 1:fdd22bb7aa52 116
emilmont 1:fdd22bb7aa52 117 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 118 blkCnt--;
emilmont 1:fdd22bb7aa52 119 }
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 122 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 123 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 #else
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 128
emilmont 1:fdd22bb7aa52 129 /* Loop over blockSize number of values */
emilmont 1:fdd22bb7aa52 130 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 133
emilmont 1:fdd22bb7aa52 134 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 135 {
emilmont 1:fdd22bb7aa52 136 /* C = (q31_t)A << 16 */
emilmont 1:fdd22bb7aa52 137 /* convert from q15 to q31 and then store the results in the destination buffer */
emilmont 1:fdd22bb7aa52 138 *pDst++ = (q31_t) * pIn++ << 16;
emilmont 1:fdd22bb7aa52 139
emilmont 1:fdd22bb7aa52 140 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 141 blkCnt--;
emilmont 1:fdd22bb7aa52 142 }
emilmont 1:fdd22bb7aa52 143
emilmont 1:fdd22bb7aa52 144 }
emilmont 1:fdd22bb7aa52 145
emilmont 1:fdd22bb7aa52 146 /**
emilmont 1:fdd22bb7aa52 147 * @} end of q15_to_x group
emilmont 1:fdd22bb7aa52 148 */