CMSIS DSP library

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Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

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emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_mat_mult_fast_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Q31 matrix multiplication (fast variant).
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 32
emilmont 1:fdd22bb7aa52 33 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 34
emilmont 1:fdd22bb7aa52 35 /**
emilmont 1:fdd22bb7aa52 36 * @ingroup groupMatrix
emilmont 1:fdd22bb7aa52 37 */
emilmont 1:fdd22bb7aa52 38
emilmont 1:fdd22bb7aa52 39 /**
emilmont 1:fdd22bb7aa52 40 * @addtogroup MatrixMult
emilmont 1:fdd22bb7aa52 41 * @{
emilmont 1:fdd22bb7aa52 42 */
emilmont 1:fdd22bb7aa52 43
emilmont 1:fdd22bb7aa52 44 /**
emilmont 1:fdd22bb7aa52 45 * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
emilmont 1:fdd22bb7aa52 46 * @param[in] *pSrcA points to the first input matrix structure
emilmont 1:fdd22bb7aa52 47 * @param[in] *pSrcB points to the second input matrix structure
emilmont 1:fdd22bb7aa52 48 * @param[out] *pDst points to output matrix structure
emilmont 1:fdd22bb7aa52 49 * @return The function returns either
emilmont 1:fdd22bb7aa52 50 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emilmont 1:fdd22bb7aa52 51 *
emilmont 1:fdd22bb7aa52 52 * @details
emilmont 1:fdd22bb7aa52 53 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 54 *
emilmont 1:fdd22bb7aa52 55 * \par
emilmont 1:fdd22bb7aa52 56 * The difference between the function arm_mat_mult_q31() and this fast variant is that
emilmont 1:fdd22bb7aa52 57 * the fast variant use a 32-bit rather than a 64-bit accumulator.
emilmont 1:fdd22bb7aa52 58 * The result of each 1.31 x 1.31 multiplication is truncated to
emilmont 1:fdd22bb7aa52 59 * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
emilmont 1:fdd22bb7aa52 60 * format. Finally, the accumulator is saturated and converted to a 1.31 result.
emilmont 1:fdd22bb7aa52 61 *
emilmont 1:fdd22bb7aa52 62 * \par
emilmont 1:fdd22bb7aa52 63 * The fast version has the same overflow behavior as the standard version but provides
emilmont 1:fdd22bb7aa52 64 * less precision since it discards the low 32 bits of each multiplication result.
emilmont 1:fdd22bb7aa52 65 * In order to avoid overflows completely the input signals must be scaled down.
emilmont 1:fdd22bb7aa52 66 * Scale down one of the input matrices by log2(numColsA) bits to
emilmont 1:fdd22bb7aa52 67 * avoid overflows, as a total of numColsA additions are computed internally for each
emilmont 1:fdd22bb7aa52 68 * output element.
emilmont 1:fdd22bb7aa52 69 *
emilmont 1:fdd22bb7aa52 70 * \par
emilmont 1:fdd22bb7aa52 71 * See <code>arm_mat_mult_q31()</code> for a slower implementation of this function
emilmont 1:fdd22bb7aa52 72 * which uses 64-bit accumulation to provide higher precision.
emilmont 1:fdd22bb7aa52 73 */
emilmont 1:fdd22bb7aa52 74
emilmont 1:fdd22bb7aa52 75 arm_status arm_mat_mult_fast_q31(
emilmont 1:fdd22bb7aa52 76 const arm_matrix_instance_q31 * pSrcA,
emilmont 1:fdd22bb7aa52 77 const arm_matrix_instance_q31 * pSrcB,
emilmont 1:fdd22bb7aa52 78 arm_matrix_instance_q31 * pDst)
emilmont 1:fdd22bb7aa52 79 {
emilmont 1:fdd22bb7aa52 80 q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
emilmont 1:fdd22bb7aa52 81 q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
emilmont 1:fdd22bb7aa52 82 q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
emilmont 1:fdd22bb7aa52 83 // q31_t *pSrcB = pSrcB->pData; /* input data matrix pointer B */
emilmont 1:fdd22bb7aa52 84 q31_t *pOut = pDst->pData; /* output data matrix pointer */
emilmont 1:fdd22bb7aa52 85 q31_t *px; /* Temporary output data matrix pointer */
emilmont 1:fdd22bb7aa52 86 q31_t sum; /* Accumulator */
emilmont 1:fdd22bb7aa52 87 uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
emilmont 1:fdd22bb7aa52 88 uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
emilmont 1:fdd22bb7aa52 89 uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
emilmont 1:fdd22bb7aa52 90 uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
emilmont 1:fdd22bb7aa52 91 arm_status status; /* status of matrix multiplication */
emilmont 1:fdd22bb7aa52 92 q31_t inA1, inA2, inA3, inA4, inB1, inB2, inB3, inB4;
emilmont 1:fdd22bb7aa52 93
emilmont 1:fdd22bb7aa52 94 #ifdef ARM_MATH_MATRIX_CHECK
emilmont 1:fdd22bb7aa52 95
emilmont 1:fdd22bb7aa52 96
emilmont 1:fdd22bb7aa52 97 /* Check for matrix mismatch condition */
emilmont 1:fdd22bb7aa52 98 if((pSrcA->numCols != pSrcB->numRows) ||
emilmont 1:fdd22bb7aa52 99 (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
emilmont 1:fdd22bb7aa52 100 {
emilmont 1:fdd22bb7aa52 101 /* Set status as ARM_MATH_SIZE_MISMATCH */
emilmont 1:fdd22bb7aa52 102 status = ARM_MATH_SIZE_MISMATCH;
emilmont 1:fdd22bb7aa52 103 }
emilmont 1:fdd22bb7aa52 104 else
emilmont 1:fdd22bb7aa52 105 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emilmont 1:fdd22bb7aa52 106
emilmont 1:fdd22bb7aa52 107 {
emilmont 1:fdd22bb7aa52 108 /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
emilmont 1:fdd22bb7aa52 109 /* row loop */
emilmont 1:fdd22bb7aa52 110 do
emilmont 1:fdd22bb7aa52 111 {
emilmont 1:fdd22bb7aa52 112 /* Output pointer is set to starting address of the row being processed */
emilmont 1:fdd22bb7aa52 113 px = pOut + i;
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 /* For every row wise process, the column loop counter is to be initiated */
emilmont 1:fdd22bb7aa52 116 col = numColsB;
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 /* For every row wise process, the pIn2 pointer is set
emilmont 1:fdd22bb7aa52 119 ** to the starting address of the pSrcB data */
emilmont 1:fdd22bb7aa52 120 pIn2 = pSrcB->pData;
emilmont 1:fdd22bb7aa52 121
emilmont 1:fdd22bb7aa52 122 j = 0u;
emilmont 1:fdd22bb7aa52 123
emilmont 1:fdd22bb7aa52 124 /* column loop */
emilmont 1:fdd22bb7aa52 125 do
emilmont 1:fdd22bb7aa52 126 {
emilmont 1:fdd22bb7aa52 127 /* Set the variable sum, that acts as accumulator, to zero */
emilmont 1:fdd22bb7aa52 128 sum = 0;
emilmont 1:fdd22bb7aa52 129
emilmont 1:fdd22bb7aa52 130 /* Initiate the pointer pIn1 to point to the starting address of pInA */
emilmont 1:fdd22bb7aa52 131 pIn1 = pInA;
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 /* Apply loop unrolling and compute 4 MACs simultaneously. */
emilmont 1:fdd22bb7aa52 134 colCnt = numColsA >> 2;
emilmont 1:fdd22bb7aa52 135
emilmont 1:fdd22bb7aa52 136
emilmont 1:fdd22bb7aa52 137 /* matrix multiplication */
emilmont 1:fdd22bb7aa52 138 while(colCnt > 0u)
emilmont 1:fdd22bb7aa52 139 {
emilmont 1:fdd22bb7aa52 140 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emilmont 1:fdd22bb7aa52 141 /* Perform the multiply-accumulates */
emilmont 1:fdd22bb7aa52 142 inB1 = *pIn2;
emilmont 1:fdd22bb7aa52 143 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 144
emilmont 1:fdd22bb7aa52 145 inA1 = pIn1[0];
emilmont 1:fdd22bb7aa52 146 inA2 = pIn1[1];
emilmont 1:fdd22bb7aa52 147
emilmont 1:fdd22bb7aa52 148 inB2 = *pIn2;
emilmont 1:fdd22bb7aa52 149 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 150
emilmont 1:fdd22bb7aa52 151 inB3 = *pIn2;
emilmont 1:fdd22bb7aa52 152 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 153
emilmont 1:fdd22bb7aa52 154 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA1 * inB1)) >> 32);
emilmont 1:fdd22bb7aa52 155 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA2 * inB2)) >> 32);
emilmont 1:fdd22bb7aa52 156
emilmont 1:fdd22bb7aa52 157 inA3 = pIn1[2];
emilmont 1:fdd22bb7aa52 158 inA4 = pIn1[3];
emilmont 1:fdd22bb7aa52 159
emilmont 1:fdd22bb7aa52 160 inB4 = *pIn2;
emilmont 1:fdd22bb7aa52 161 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 162
emilmont 1:fdd22bb7aa52 163 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA3 * inB3)) >> 32);
emilmont 1:fdd22bb7aa52 164 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA4 * inB4)) >> 32);
emilmont 1:fdd22bb7aa52 165
emilmont 1:fdd22bb7aa52 166 pIn1 += 4u;
emilmont 1:fdd22bb7aa52 167
emilmont 1:fdd22bb7aa52 168 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 169 colCnt--;
emilmont 1:fdd22bb7aa52 170 }
emilmont 1:fdd22bb7aa52 171
emilmont 1:fdd22bb7aa52 172 /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 173 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 174 colCnt = numColsA % 0x4u;
emilmont 1:fdd22bb7aa52 175
emilmont 1:fdd22bb7aa52 176 while(colCnt > 0u)
emilmont 1:fdd22bb7aa52 177 {
emilmont 1:fdd22bb7aa52 178 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emilmont 1:fdd22bb7aa52 179 /* Perform the multiply-accumulates */
emilmont 1:fdd22bb7aa52 180 sum = (q31_t) ((((q63_t) sum << 32) +
emilmont 1:fdd22bb7aa52 181 ((q63_t) * pIn1++ * (*pIn2))) >> 32);
emilmont 1:fdd22bb7aa52 182 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 183
emilmont 1:fdd22bb7aa52 184 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 185 colCnt--;
emilmont 1:fdd22bb7aa52 186 }
emilmont 1:fdd22bb7aa52 187
emilmont 1:fdd22bb7aa52 188 /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
emilmont 1:fdd22bb7aa52 189 *px++ = sum << 1;
emilmont 1:fdd22bb7aa52 190
emilmont 1:fdd22bb7aa52 191 /* Update the pointer pIn2 to point to the starting address of the next column */
emilmont 1:fdd22bb7aa52 192 j++;
emilmont 1:fdd22bb7aa52 193 pIn2 = pSrcB->pData + j;
emilmont 1:fdd22bb7aa52 194
emilmont 1:fdd22bb7aa52 195 /* Decrement the column loop counter */
emilmont 1:fdd22bb7aa52 196 col--;
emilmont 1:fdd22bb7aa52 197
emilmont 1:fdd22bb7aa52 198 } while(col > 0u);
emilmont 1:fdd22bb7aa52 199
emilmont 1:fdd22bb7aa52 200 /* Update the pointer pInA to point to the starting address of the next row */
emilmont 1:fdd22bb7aa52 201 i = i + numColsB;
emilmont 1:fdd22bb7aa52 202 pInA = pInA + numColsA;
emilmont 1:fdd22bb7aa52 203
emilmont 1:fdd22bb7aa52 204 /* Decrement the row loop counter */
emilmont 1:fdd22bb7aa52 205 row--;
emilmont 1:fdd22bb7aa52 206
emilmont 1:fdd22bb7aa52 207 } while(row > 0u);
emilmont 1:fdd22bb7aa52 208
emilmont 1:fdd22bb7aa52 209 /* set status as ARM_MATH_SUCCESS */
emilmont 1:fdd22bb7aa52 210 status = ARM_MATH_SUCCESS;
emilmont 1:fdd22bb7aa52 211 }
emilmont 1:fdd22bb7aa52 212 /* Return to application */
emilmont 1:fdd22bb7aa52 213 return (status);
emilmont 1:fdd22bb7aa52 214 }
emilmont 1:fdd22bb7aa52 215
emilmont 1:fdd22bb7aa52 216 /**
emilmont 1:fdd22bb7aa52 217 * @} end of MatrixMult group
emilmont 1:fdd22bb7aa52 218 */