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CMSIS DSP library

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cmsis_dsp/FilteringFunctions/arm_fir_init_q15.c@1:fdd22bb7aa52, 2012-11-28 (annotated)

Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_fir_init_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Q15 FIR filter initialization function.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.5 2010/04/26
emilmont 1:fdd22bb7aa52 33 * incorporated review comments and updated with latest CMSIS layer
emilmont 1:fdd22bb7aa52 34 *
emilmont 1:fdd22bb7aa52 35 * Version 0.0.3 2010/03/10
emilmont 1:fdd22bb7aa52 36 * Initial version
emilmont 1:fdd22bb7aa52 37 * ------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 38
emilmont 1:fdd22bb7aa52 39 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 /**
emilmont 1:fdd22bb7aa52 42 * @ingroup groupFilters
emilmont 1:fdd22bb7aa52 43 */
emilmont 1:fdd22bb7aa52 44
emilmont 1:fdd22bb7aa52 45 /**
emilmont 1:fdd22bb7aa52 46 * @addtogroup FIR
emilmont 1:fdd22bb7aa52 47 * @{
emilmont 1:fdd22bb7aa52 48 */
emilmont 1:fdd22bb7aa52 49
emilmont 1:fdd22bb7aa52 50 /**
emilmont 1:fdd22bb7aa52 51 * @param[in,out] *S points to an instance of the Q15 FIR filter structure.
emilmont 1:fdd22bb7aa52 52 * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
emilmont 1:fdd22bb7aa52 53 * @param[in] *pCoeffs points to the filter coefficients buffer.
emilmont 1:fdd22bb7aa52 54 * @param[in] *pState points to the state buffer.
emilmont 1:fdd22bb7aa52 55 * @param[in] blockSize is number of samples processed per call.
emilmont 1:fdd22bb7aa52 56 * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if
emilmont 1:fdd22bb7aa52 57 * <code>numTaps</code> is not greater than or equal to 4 and even.
emilmont 1:fdd22bb7aa52 58 *
emilmont 1:fdd22bb7aa52 59 * <b>Description:</b>
emilmont 1:fdd22bb7aa52 60 * \par
emilmont 1:fdd22bb7aa52 61 * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
emilmont 1:fdd22bb7aa52 62 * <pre>
emilmont 1:fdd22bb7aa52 63 * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
emilmont 1:fdd22bb7aa52 64 * </pre>
emilmont 1:fdd22bb7aa52 65 * Note that <code>numTaps</code> must be even and greater than or equal to 4.
emilmont 1:fdd22bb7aa52 66 * To implement an odd length filter simply increase <code>numTaps</code> by 1 and set the last coefficient to zero.
emilmont 1:fdd22bb7aa52 67 * For example, to implement a filter with <code>numTaps=3</code> and coefficients
emilmont 1:fdd22bb7aa52 68 * <pre>
emilmont 1:fdd22bb7aa52 69 * {0.3, -0.8, 0.3}
emilmont 1:fdd22bb7aa52 70 * </pre>
emilmont 1:fdd22bb7aa52 71 * set <code>numTaps=4</code> and use the coefficients:
emilmont 1:fdd22bb7aa52 72 * <pre>
emilmont 1:fdd22bb7aa52 73 * {0.3, -0.8, 0.3, 0}.
emilmont 1:fdd22bb7aa52 74 * </pre>
emilmont 1:fdd22bb7aa52 75 * Similarly, to implement a two point filter
emilmont 1:fdd22bb7aa52 76 * <pre>
emilmont 1:fdd22bb7aa52 77 * {0.3, -0.3}
emilmont 1:fdd22bb7aa52 78 * </pre>
emilmont 1:fdd22bb7aa52 79 * set <code>numTaps=4</code> and use the coefficients:
emilmont 1:fdd22bb7aa52 80 * <pre>
emilmont 1:fdd22bb7aa52 81 * {0.3, -0.3, 0, 0}.
emilmont 1:fdd22bb7aa52 82 * </pre>
emilmont 1:fdd22bb7aa52 83 * \par
emilmont 1:fdd22bb7aa52 84 * <code>pState</code> points to the array of state variables.
emilmont 1:fdd22bb7aa52 85 * <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3 and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q15()</code>.
emilmont 1:fdd22bb7aa52 86 */
emilmont 1:fdd22bb7aa52 87
emilmont 1:fdd22bb7aa52 88 arm_status arm_fir_init_q15(
emilmont 1:fdd22bb7aa52 89 arm_fir_instance_q15 * S,
emilmont 1:fdd22bb7aa52 90 uint16_t numTaps,
emilmont 1:fdd22bb7aa52 91 q15_t * pCoeffs,
emilmont 1:fdd22bb7aa52 92 q15_t * pState,
emilmont 1:fdd22bb7aa52 93 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 94 {
emilmont 1:fdd22bb7aa52 95 arm_status status;
emilmont 1:fdd22bb7aa52 96
emilmont 1:fdd22bb7aa52 97
emilmont 1:fdd22bb7aa52 98 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 /* The Number of filter coefficients in the filter must be even and at least 4 */
emilmont 1:fdd22bb7aa52 103 if(numTaps & 0x1u)
emilmont 1:fdd22bb7aa52 104 {
emilmont 1:fdd22bb7aa52 105 status = ARM_MATH_ARGUMENT_ERROR;
emilmont 1:fdd22bb7aa52 106 }
emilmont 1:fdd22bb7aa52 107 else
emilmont 1:fdd22bb7aa52 108 {
emilmont 1:fdd22bb7aa52 109 /* Assign filter taps */
emilmont 1:fdd22bb7aa52 110 S->numTaps = numTaps;
emilmont 1:fdd22bb7aa52 111
emilmont 1:fdd22bb7aa52 112 /* Assign coefficient pointer */
emilmont 1:fdd22bb7aa52 113 S->pCoeffs = pCoeffs;
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 /* Clear the state buffer. The size is always (blockSize + numTaps ) */
emilmont 1:fdd22bb7aa52 116 memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t));
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 /* Assign state pointer */
emilmont 1:fdd22bb7aa52 119 S->pState = pState;
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 status = ARM_MATH_SUCCESS;
emilmont 1:fdd22bb7aa52 122 }
emilmont 1:fdd22bb7aa52 123
emilmont 1:fdd22bb7aa52 124 return (status);
emilmont 1:fdd22bb7aa52 125
emilmont 1:fdd22bb7aa52 126 #else
emilmont 1:fdd22bb7aa52 127
emilmont 1:fdd22bb7aa52 128 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 129
emilmont 1:fdd22bb7aa52 130 /* Assign filter taps */
emilmont 1:fdd22bb7aa52 131 S->numTaps = numTaps;
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 /* Assign coefficient pointer */
emilmont 1:fdd22bb7aa52 134 S->pCoeffs = pCoeffs;
emilmont 1:fdd22bb7aa52 135
emilmont 1:fdd22bb7aa52 136 /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
emilmont 1:fdd22bb7aa52 137 memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139 /* Assign state pointer */
emilmont 1:fdd22bb7aa52 140 S->pState = pState;
emilmont 1:fdd22bb7aa52 141
emilmont 1:fdd22bb7aa52 142 status = ARM_MATH_SUCCESS;
emilmont 1:fdd22bb7aa52 143
emilmont 1:fdd22bb7aa52 144 return (status);
emilmont 1:fdd22bb7aa52 145
emilmont 1:fdd22bb7aa52 146 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 147
emilmont 1:fdd22bb7aa52 148 }
emilmont 1:fdd22bb7aa52 149
emilmont 1:fdd22bb7aa52 150 /**
emilmont 1:fdd22bb7aa52 151 * @} end of FIR group
emilmont 1:fdd22bb7aa52 152 */