mbed official / mbed-dsp

CMSIS DSP library

Dependents:   performance_timer Surfboard_ gps2rtty Capstone ... more

Legacy Warning

This is an mbed 2 library. To learn more about mbed OS 5, visit the docs.

cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c@1:fdd22bb7aa52, 2012-11-28 (annotated)

Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_cmplx_dot_prod_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Q31 complex dot product
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 32
emilmont 1:fdd22bb7aa52 33 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 34
emilmont 1:fdd22bb7aa52 35 /**
emilmont 1:fdd22bb7aa52 36 * @ingroup groupCmplxMath
emilmont 1:fdd22bb7aa52 37 */
emilmont 1:fdd22bb7aa52 38
emilmont 1:fdd22bb7aa52 39 /**
emilmont 1:fdd22bb7aa52 40 * @addtogroup cmplx_dot_prod
emilmont 1:fdd22bb7aa52 41 * @{
emilmont 1:fdd22bb7aa52 42 */
emilmont 1:fdd22bb7aa52 43
emilmont 1:fdd22bb7aa52 44 /**
emilmont 1:fdd22bb7aa52 45 * @brief Q31 complex dot product
emilmont 1:fdd22bb7aa52 46 * @param *pSrcA points to the first input vector
emilmont 1:fdd22bb7aa52 47 * @param *pSrcB points to the second input vector
emilmont 1:fdd22bb7aa52 48 * @param numSamples number of complex samples in each vector
emilmont 1:fdd22bb7aa52 49 * @param *realResult real part of the result returned here
emilmont 1:fdd22bb7aa52 50 * @param *imagResult imaginary part of the result returned here
emilmont 1:fdd22bb7aa52 51 * @return none.
emilmont 1:fdd22bb7aa52 52 *
emilmont 1:fdd22bb7aa52 53 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 54 * \par
emilmont 1:fdd22bb7aa52 55 * The function is implemented using an internal 64-bit accumulator.
emilmont 1:fdd22bb7aa52 56 * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
emilmont 1:fdd22bb7aa52 57 * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
emilmont 1:fdd22bb7aa52 58 * Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
emilmont 1:fdd22bb7aa52 59 * The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
emilmont 1:fdd22bb7aa52 60 * Input down scaling is not required.
emilmont 1:fdd22bb7aa52 61 */
emilmont 1:fdd22bb7aa52 62
emilmont 1:fdd22bb7aa52 63 void arm_cmplx_dot_prod_q31(
emilmont 1:fdd22bb7aa52 64 q31_t * pSrcA,
emilmont 1:fdd22bb7aa52 65 q31_t * pSrcB,
emilmont 1:fdd22bb7aa52 66 uint32_t numSamples,
emilmont 1:fdd22bb7aa52 67 q63_t * realResult,
emilmont 1:fdd22bb7aa52 68 q63_t * imagResult)
emilmont 1:fdd22bb7aa52 69 {
emilmont 1:fdd22bb7aa52 70 q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
emilmont 1:fdd22bb7aa52 71
emilmont 1:fdd22bb7aa52 72 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 73
emilmont 1:fdd22bb7aa52 74 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 75 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 76
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 79 blkCnt = numSamples >> 2u;
emilmont 1:fdd22bb7aa52 80
emilmont 1:fdd22bb7aa52 81 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 82 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 83 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 84 {
emilmont 1:fdd22bb7aa52 85 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
emilmont 1:fdd22bb7aa52 86 /* Convert real data in 2.62 to 16.48 by 14 right shifts */
emilmont 1:fdd22bb7aa52 87 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 88 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
emilmont 1:fdd22bb7aa52 89 /* Convert imag data in 2.62 to 16.48 by 14 right shifts */
emilmont 1:fdd22bb7aa52 90 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 91
emilmont 1:fdd22bb7aa52 92 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 93 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 94
emilmont 1:fdd22bb7aa52 95 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 96 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 97
emilmont 1:fdd22bb7aa52 98 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 99 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 100
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 103 blkCnt--;
emilmont 1:fdd22bb7aa52 104 }
emilmont 1:fdd22bb7aa52 105
emilmont 1:fdd22bb7aa52 106 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 107 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 108 blkCnt = numSamples % 0x4u;
emilmont 1:fdd22bb7aa52 109
emilmont 1:fdd22bb7aa52 110 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 111 {
emilmont 1:fdd22bb7aa52 112 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
emilmont 1:fdd22bb7aa52 113 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 114 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
emilmont 1:fdd22bb7aa52 115 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 116
emilmont 1:fdd22bb7aa52 117 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 118 blkCnt--;
emilmont 1:fdd22bb7aa52 119 }
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 #else
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 while(numSamples > 0u)
emilmont 1:fdd22bb7aa52 126 {
emilmont 1:fdd22bb7aa52 127 /* outReal = realA[0]* realB[0] + realA[2]* realB[2] + realA[4]* realB[4] + .....+ realA[numSamples-2]* realB[numSamples-2] */
emilmont 1:fdd22bb7aa52 128 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 129 /* outImag = imagA[1]* imagB[1] + imagA[3]* imagB[3] + imagA[5]* imagB[5] + .....+ imagA[numSamples-1]* imagB[numSamples-1] */
emilmont 1:fdd22bb7aa52 130 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 133 numSamples--;
emilmont 1:fdd22bb7aa52 134 }
emilmont 1:fdd22bb7aa52 135
emilmont 1:fdd22bb7aa52 136 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 137
emilmont 1:fdd22bb7aa52 138 /* Store the real and imaginary results in 16.48 format */
emilmont 1:fdd22bb7aa52 139 *realResult = real_sum;
emilmont 1:fdd22bb7aa52 140 *imagResult = imag_sum;
emilmont 1:fdd22bb7aa52 141 }
emilmont 1:fdd22bb7aa52 142
emilmont 1:fdd22bb7aa52 143 /**
emilmont 1:fdd22bb7aa52 144 * @} end of cmplx_dot_prod group
emilmont 1:fdd22bb7aa52 145 */