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CMSIS DSP library

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cmsis_dsp/BasicMathFunctions/arm_offset_q15.c@1:fdd22bb7aa52, 2012-11-28 (annotated)

Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_offset_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Q15 vector offset.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.7 2010/06/10
emilmont 1:fdd22bb7aa52 33 * Misra-C changes done
emilmont 1:fdd22bb7aa52 34 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 35
emilmont 1:fdd22bb7aa52 36 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 37
emilmont 1:fdd22bb7aa52 38 /**
emilmont 1:fdd22bb7aa52 39 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 40 */
emilmont 1:fdd22bb7aa52 41
emilmont 1:fdd22bb7aa52 42 /**
emilmont 1:fdd22bb7aa52 43 * @addtogroup offset
emilmont 1:fdd22bb7aa52 44 * @{
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @brief Adds a constant offset to a Q15 vector.
emilmont 1:fdd22bb7aa52 49 * @param[in] *pSrc points to the input vector
emilmont 1:fdd22bb7aa52 50 * @param[in] offset is the offset to be added
emilmont 1:fdd22bb7aa52 51 * @param[out] *pDst points to the output vector
emilmont 1:fdd22bb7aa52 52 * @param[in] blockSize number of samples in the vector
emilmont 1:fdd22bb7aa52 53 * @return none.
emilmont 1:fdd22bb7aa52 54 *
emilmont 1:fdd22bb7aa52 55 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 56 * \par
emilmont 1:fdd22bb7aa52 57 * The function uses saturating arithmetic.
emilmont 1:fdd22bb7aa52 58 * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
emilmont 1:fdd22bb7aa52 59 */
emilmont 1:fdd22bb7aa52 60
emilmont 1:fdd22bb7aa52 61 void arm_offset_q15(
emilmont 1:fdd22bb7aa52 62 q15_t * pSrc,
emilmont 1:fdd22bb7aa52 63 q15_t offset,
emilmont 1:fdd22bb7aa52 64 q15_t * pDst,
emilmont 1:fdd22bb7aa52 65 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 66 {
emilmont 1:fdd22bb7aa52 67 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 68
emilmont 1:fdd22bb7aa52 69 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 70
emilmont 1:fdd22bb7aa52 71 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 72 q31_t offset_packed; /* Offset packed to 32 bit */
emilmont 1:fdd22bb7aa52 73
emilmont 1:fdd22bb7aa52 74
emilmont 1:fdd22bb7aa52 75 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 76 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 /* Offset is packed to 32 bit in order to use SIMD32 for addition */
emilmont 1:fdd22bb7aa52 79 offset_packed = __PKHBT(offset, offset, 16);
emilmont 1:fdd22bb7aa52 80
emilmont 1:fdd22bb7aa52 81 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 82 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 83 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 84 {
emilmont 1:fdd22bb7aa52 85 /* C = A + offset */
emilmont 1:fdd22bb7aa52 86 /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
emilmont 1:fdd22bb7aa52 87 *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
emilmont 1:fdd22bb7aa52 88 *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
emilmont 1:fdd22bb7aa52 89
emilmont 1:fdd22bb7aa52 90 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 91 blkCnt--;
emilmont 1:fdd22bb7aa52 92 }
emilmont 1:fdd22bb7aa52 93
emilmont 1:fdd22bb7aa52 94 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 95 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 96 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 97
emilmont 1:fdd22bb7aa52 98 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 99 {
emilmont 1:fdd22bb7aa52 100 /* C = A + offset */
emilmont 1:fdd22bb7aa52 101 /* Add offset and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 102 *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
emilmont 1:fdd22bb7aa52 103
emilmont 1:fdd22bb7aa52 104 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 105 blkCnt--;
emilmont 1:fdd22bb7aa52 106 }
emilmont 1:fdd22bb7aa52 107
emilmont 1:fdd22bb7aa52 108 #else
emilmont 1:fdd22bb7aa52 109
emilmont 1:fdd22bb7aa52 110 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 111
emilmont 1:fdd22bb7aa52 112 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 113 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 116 {
emilmont 1:fdd22bb7aa52 117 /* C = A + offset */
emilmont 1:fdd22bb7aa52 118 /* Add offset and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 119 *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 122 blkCnt--;
emilmont 1:fdd22bb7aa52 123 }
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 }
emilmont 1:fdd22bb7aa52 128
emilmont 1:fdd22bb7aa52 129 /**
emilmont 1:fdd22bb7aa52 130 * @} end of offset group
emilmont 1:fdd22bb7aa52 131 */