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CMSIS DSP library

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cmsis_dsp/BasicMathFunctions/arm_negate_q15.c@1:fdd22bb7aa52, 2012-11-28 (annotated)

Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_negate_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Negates Q15 vectors.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.7 2010/06/10
emilmont 1:fdd22bb7aa52 33 * Misra-C changes done
emilmont 1:fdd22bb7aa52 34 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 35 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 36
emilmont 1:fdd22bb7aa52 37 /**
emilmont 1:fdd22bb7aa52 38 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 39 */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 /**
emilmont 1:fdd22bb7aa52 42 * @addtogroup negate
emilmont 1:fdd22bb7aa52 43 * @{
emilmont 1:fdd22bb7aa52 44 */
emilmont 1:fdd22bb7aa52 45
emilmont 1:fdd22bb7aa52 46 /**
emilmont 1:fdd22bb7aa52 47 * @brief Negates the elements of a Q15 vector.
emilmont 1:fdd22bb7aa52 48 * @param[in] *pSrc points to the input vector
emilmont 1:fdd22bb7aa52 49 * @param[out] *pDst points to the output vector
emilmont 1:fdd22bb7aa52 50 * @param[in] blockSize number of samples in the vector
emilmont 1:fdd22bb7aa52 51 * @return none.
emilmont 1:fdd22bb7aa52 52 *
emilmont 1:fdd22bb7aa52 53 * \par Conditions for optimum performance
emilmont 1:fdd22bb7aa52 54 * Input and output buffers should be aligned by 32-bit
emilmont 1:fdd22bb7aa52 55 *
emilmont 1:fdd22bb7aa52 56 *
emilmont 1:fdd22bb7aa52 57 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 58 * \par
emilmont 1:fdd22bb7aa52 59 * The function uses saturating arithmetic.
emilmont 1:fdd22bb7aa52 60 * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
emilmont 1:fdd22bb7aa52 61 */
emilmont 1:fdd22bb7aa52 62
emilmont 1:fdd22bb7aa52 63 void arm_negate_q15(
emilmont 1:fdd22bb7aa52 64 q15_t * pSrc,
emilmont 1:fdd22bb7aa52 65 q15_t * pDst,
emilmont 1:fdd22bb7aa52 66 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 67 {
emilmont 1:fdd22bb7aa52 68 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 69 q15_t in;
emilmont 1:fdd22bb7aa52 70
emilmont 1:fdd22bb7aa52 71 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 72
emilmont 1:fdd22bb7aa52 73 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 74
emilmont 1:fdd22bb7aa52 75 q31_t in1, in2; /* Temporary variables */
emilmont 1:fdd22bb7aa52 76
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 79 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 80
emilmont 1:fdd22bb7aa52 81 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 82 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 83 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 84 {
emilmont 1:fdd22bb7aa52 85 /* C = -A */
emilmont 1:fdd22bb7aa52 86 /* Read two inputs at a time */
emilmont 1:fdd22bb7aa52 87 in1 = _SIMD32_OFFSET(pSrc);
emilmont 1:fdd22bb7aa52 88 in2 = _SIMD32_OFFSET(pSrc + 2);
emilmont 1:fdd22bb7aa52 89
emilmont 1:fdd22bb7aa52 90 /* negate two samples at a time */
emilmont 1:fdd22bb7aa52 91 in1 = __QSUB16(0, in1);
emilmont 1:fdd22bb7aa52 92
emilmont 1:fdd22bb7aa52 93 /* negate two samples at a time */
emilmont 1:fdd22bb7aa52 94 in2 = __QSUB16(0, in2);
emilmont 1:fdd22bb7aa52 95
emilmont 1:fdd22bb7aa52 96 /* store the result to destination 2 samples at a time */
emilmont 1:fdd22bb7aa52 97 _SIMD32_OFFSET(pDst) = in1;
emilmont 1:fdd22bb7aa52 98 /* store the result to destination 2 samples at a time */
emilmont 1:fdd22bb7aa52 99 _SIMD32_OFFSET(pDst + 2) = in2;
emilmont 1:fdd22bb7aa52 100
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 /* update pointers to process next samples */
emilmont 1:fdd22bb7aa52 103 pSrc += 4u;
emilmont 1:fdd22bb7aa52 104 pDst += 4u;
emilmont 1:fdd22bb7aa52 105
emilmont 1:fdd22bb7aa52 106 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 107 blkCnt--;
emilmont 1:fdd22bb7aa52 108 }
emilmont 1:fdd22bb7aa52 109
emilmont 1:fdd22bb7aa52 110 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 111 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 112 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 #else
emilmont 1:fdd22bb7aa52 115
emilmont 1:fdd22bb7aa52 116 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 119 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 124 {
emilmont 1:fdd22bb7aa52 125 /* C = -A */
emilmont 1:fdd22bb7aa52 126 /* Negate and then store the result in the destination buffer. */
emilmont 1:fdd22bb7aa52 127 in = *pSrc++;
emilmont 1:fdd22bb7aa52 128 *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
emilmont 1:fdd22bb7aa52 129
emilmont 1:fdd22bb7aa52 130 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 131 blkCnt--;
emilmont 1:fdd22bb7aa52 132 }
emilmont 1:fdd22bb7aa52 133 }
emilmont 1:fdd22bb7aa52 134
emilmont 1:fdd22bb7aa52 135 /**
emilmont 1:fdd22bb7aa52 136 * @} end of negate group
emilmont 1:fdd22bb7aa52 137 */