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CMSIS DSP library

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cmsis_dsp/BasicMathFunctions/arm_abs_q15.c@1:fdd22bb7aa52, 2012-11-28 (annotated)

Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_abs_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Q15 vector absolute value.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.7 2010/06/10
emilmont 1:fdd22bb7aa52 33 * Misra-C changes done
emilmont 1:fdd22bb7aa52 34 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 35
emilmont 1:fdd22bb7aa52 36 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 37
emilmont 1:fdd22bb7aa52 38 /**
emilmont 1:fdd22bb7aa52 39 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 40 */
emilmont 1:fdd22bb7aa52 41
emilmont 1:fdd22bb7aa52 42 /**
emilmont 1:fdd22bb7aa52 43 * @addtogroup BasicAbs
emilmont 1:fdd22bb7aa52 44 * @{
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @brief Q15 vector absolute value.
emilmont 1:fdd22bb7aa52 49 * @param[in] *pSrc points to the input buffer
emilmont 1:fdd22bb7aa52 50 * @param[out] *pDst points to the output buffer
emilmont 1:fdd22bb7aa52 51 * @param[in] blockSize number of samples in each vector
emilmont 1:fdd22bb7aa52 52 * @return none.
emilmont 1:fdd22bb7aa52 53 *
emilmont 1:fdd22bb7aa52 54 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 55 * \par
emilmont 1:fdd22bb7aa52 56 * The function uses saturating arithmetic.
emilmont 1:fdd22bb7aa52 57 * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
emilmont 1:fdd22bb7aa52 58 */
emilmont 1:fdd22bb7aa52 59
emilmont 1:fdd22bb7aa52 60 void arm_abs_q15(
emilmont 1:fdd22bb7aa52 61 q15_t * pSrc,
emilmont 1:fdd22bb7aa52 62 q15_t * pDst,
emilmont 1:fdd22bb7aa52 63 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 64 {
emilmont 1:fdd22bb7aa52 65 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 66
emilmont 1:fdd22bb7aa52 67 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 68
emilmont 1:fdd22bb7aa52 69 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 70
emilmont 1:fdd22bb7aa52 71 q15_t in1; /* Input value1 */
emilmont 1:fdd22bb7aa52 72 q15_t in2; /* Input value2 */
emilmont 1:fdd22bb7aa52 73
emilmont 1:fdd22bb7aa52 74
emilmont 1:fdd22bb7aa52 75 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 76 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 79 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 80 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 81 {
emilmont 1:fdd22bb7aa52 82 /* C = |A| */
emilmont 1:fdd22bb7aa52 83 /* Read two inputs */
emilmont 1:fdd22bb7aa52 84 in1 = *pSrc++;
emilmont 1:fdd22bb7aa52 85 in2 = *pSrc++;
emilmont 1:fdd22bb7aa52 86
emilmont 1:fdd22bb7aa52 87
emilmont 1:fdd22bb7aa52 88 /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
emilmont 1:fdd22bb7aa52 89
emilmont 1:fdd22bb7aa52 90 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 91
emilmont 1:fdd22bb7aa52 92 *__SIMD32(pDst)++ =
emilmont 1:fdd22bb7aa52 93 __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)),
emilmont 1:fdd22bb7aa52 94 ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16);
emilmont 1:fdd22bb7aa52 95
emilmont 1:fdd22bb7aa52 96 #else
emilmont 1:fdd22bb7aa52 97
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 *__SIMD32(pDst)++ =
emilmont 1:fdd22bb7aa52 100 __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)),
emilmont 1:fdd22bb7aa52 101 ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16);
emilmont 1:fdd22bb7aa52 102
emilmont 1:fdd22bb7aa52 103 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 104
emilmont 1:fdd22bb7aa52 105 in1 = *pSrc++;
emilmont 1:fdd22bb7aa52 106 in2 = *pSrc++;
emilmont 1:fdd22bb7aa52 107
emilmont 1:fdd22bb7aa52 108
emilmont 1:fdd22bb7aa52 109 #ifndef ARM_MATH_BIG_ENDIAN
emilmont 1:fdd22bb7aa52 110
emilmont 1:fdd22bb7aa52 111 *__SIMD32(pDst)++ =
emilmont 1:fdd22bb7aa52 112 __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)),
emilmont 1:fdd22bb7aa52 113 ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16);
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 #else
emilmont 1:fdd22bb7aa52 116
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 *__SIMD32(pDst)++ =
emilmont 1:fdd22bb7aa52 119 __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)),
emilmont 1:fdd22bb7aa52 120 ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16);
emilmont 1:fdd22bb7aa52 121
emilmont 1:fdd22bb7aa52 122 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emilmont 1:fdd22bb7aa52 123
emilmont 1:fdd22bb7aa52 124 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 125 blkCnt--;
emilmont 1:fdd22bb7aa52 126 }
emilmont 1:fdd22bb7aa52 127
emilmont 1:fdd22bb7aa52 128 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 129 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 130 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 133 {
emilmont 1:fdd22bb7aa52 134 /* C = |A| */
emilmont 1:fdd22bb7aa52 135 /* Read the input */
emilmont 1:fdd22bb7aa52 136 in1 = *pSrc++;
emilmont 1:fdd22bb7aa52 137
emilmont 1:fdd22bb7aa52 138 /* Calculate absolute value of input and then store the result in the destination buffer. */
emilmont 1:fdd22bb7aa52 139 *pDst++ = (in1 > 0) ? in1 : __QSUB16(0, in1);
emilmont 1:fdd22bb7aa52 140
emilmont 1:fdd22bb7aa52 141 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 142 blkCnt--;
emilmont 1:fdd22bb7aa52 143 }
emilmont 1:fdd22bb7aa52 144
emilmont 1:fdd22bb7aa52 145 #else
emilmont 1:fdd22bb7aa52 146
emilmont 1:fdd22bb7aa52 147 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 148
emilmont 1:fdd22bb7aa52 149 q15_t in; /* Temporary input variable */
emilmont 1:fdd22bb7aa52 150
emilmont 1:fdd22bb7aa52 151 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 152 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 153
emilmont 1:fdd22bb7aa52 154 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 155 {
emilmont 1:fdd22bb7aa52 156 /* C = |A| */
emilmont 1:fdd22bb7aa52 157 /* Read the input */
emilmont 1:fdd22bb7aa52 158 in = *pSrc++;
emilmont 1:fdd22bb7aa52 159
emilmont 1:fdd22bb7aa52 160 /* Calculate absolute value of input and then store the result in the destination buffer. */
emilmont 1:fdd22bb7aa52 161 *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
emilmont 1:fdd22bb7aa52 162
emilmont 1:fdd22bb7aa52 163 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 164 blkCnt--;
emilmont 1:fdd22bb7aa52 165 }
emilmont 1:fdd22bb7aa52 166
emilmont 1:fdd22bb7aa52 167 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 168
emilmont 1:fdd22bb7aa52 169 }
emilmont 1:fdd22bb7aa52 170
emilmont 1:fdd22bb7aa52 171 /**
emilmont 1:fdd22bb7aa52 172 * @} end of BasicAbs group
emilmont 1:fdd22bb7aa52 173 */