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CMSIS DSP library

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cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_f32.c@2:da51fb522205, 2013-05-30 (annotated)

Committer:
emilmont
Date:
Thu May 30 17:10:11 2013 +0100
Revision:
2:da51fb522205
Parent:
1:fdd22bb7aa52
Child:
3:7a284390b0ce
Keep "cmsis-dsp" module in synch with its source

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 2:da51fb522205 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_fir_sparse_init_f32.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Floating-point sparse FIR filter initialization function.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.7 2010/06/10
emilmont 1:fdd22bb7aa52 33 * Misra-C changes done
emilmont 1:fdd22bb7aa52 34 * ---------------------------------------------------------------------------*/
emilmont 1:fdd22bb7aa52 35
emilmont 1:fdd22bb7aa52 36 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 37
emilmont 1:fdd22bb7aa52 38 /**
emilmont 1:fdd22bb7aa52 39 * @ingroup groupFilters
emilmont 1:fdd22bb7aa52 40 */
emilmont 1:fdd22bb7aa52 41
emilmont 1:fdd22bb7aa52 42 /**
emilmont 1:fdd22bb7aa52 43 * @addtogroup FIR_Sparse
emilmont 1:fdd22bb7aa52 44 * @{
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @brief Initialization function for the floating-point sparse FIR filter.
emilmont 1:fdd22bb7aa52 49 * @param[in,out] *S points to an instance of the floating-point sparse FIR structure.
emilmont 1:fdd22bb7aa52 50 * @param[in] numTaps number of nonzero coefficients in the filter.
emilmont 1:fdd22bb7aa52 51 * @param[in] *pCoeffs points to the array of filter coefficients.
emilmont 1:fdd22bb7aa52 52 * @param[in] *pState points to the state buffer.
emilmont 1:fdd22bb7aa52 53 * @param[in] *pTapDelay points to the array of offset times.
emilmont 1:fdd22bb7aa52 54 * @param[in] maxDelay maximum offset time supported.
emilmont 1:fdd22bb7aa52 55 * @param[in] blockSize number of samples that will be processed per block.
emilmont 1:fdd22bb7aa52 56 * @return none
emilmont 1:fdd22bb7aa52 57 *
emilmont 1:fdd22bb7aa52 58 * <b>Description:</b>
emilmont 1:fdd22bb7aa52 59 * \par
emilmont 1:fdd22bb7aa52 60 * <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
emilmont 1:fdd22bb7aa52 61 * <code>pState</code> holds the filter's state variables and must be of length
emilmont 1:fdd22bb7aa52 62 * <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
emilmont 1:fdd22bb7aa52 63 * is the maximum number of delay line values.
emilmont 1:fdd22bb7aa52 64 * <code>blockSize</code> is the
emilmont 1:fdd22bb7aa52 65 * number of samples processed by the <code>arm_fir_sparse_f32()</code> function.
emilmont 1:fdd22bb7aa52 66 */
emilmont 1:fdd22bb7aa52 67
emilmont 1:fdd22bb7aa52 68 void arm_fir_sparse_init_f32(
emilmont 1:fdd22bb7aa52 69 arm_fir_sparse_instance_f32 * S,
emilmont 1:fdd22bb7aa52 70 uint16_t numTaps,
emilmont 1:fdd22bb7aa52 71 float32_t * pCoeffs,
emilmont 1:fdd22bb7aa52 72 float32_t * pState,
emilmont 1:fdd22bb7aa52 73 int32_t * pTapDelay,
emilmont 1:fdd22bb7aa52 74 uint16_t maxDelay,
emilmont 1:fdd22bb7aa52 75 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 76 {
emilmont 1:fdd22bb7aa52 77 /* Assign filter taps */
emilmont 1:fdd22bb7aa52 78 S->numTaps = numTaps;
emilmont 1:fdd22bb7aa52 79
emilmont 1:fdd22bb7aa52 80 /* Assign coefficient pointer */
emilmont 1:fdd22bb7aa52 81 S->pCoeffs = pCoeffs;
emilmont 1:fdd22bb7aa52 82
emilmont 1:fdd22bb7aa52 83 /* Assign TapDelay pointer */
emilmont 1:fdd22bb7aa52 84 S->pTapDelay = pTapDelay;
emilmont 1:fdd22bb7aa52 85
emilmont 1:fdd22bb7aa52 86 /* Assign MaxDelay */
emilmont 1:fdd22bb7aa52 87 S->maxDelay = maxDelay;
emilmont 1:fdd22bb7aa52 88
emilmont 1:fdd22bb7aa52 89 /* reset the stateIndex to 0 */
emilmont 1:fdd22bb7aa52 90 S->stateIndex = 0u;
emilmont 1:fdd22bb7aa52 91
emilmont 1:fdd22bb7aa52 92 /* Clear state buffer and size is always maxDelay + blockSize */
emilmont 1:fdd22bb7aa52 93 memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
emilmont 1:fdd22bb7aa52 94
emilmont 1:fdd22bb7aa52 95 /* Assign state pointer */
emilmont 1:fdd22bb7aa52 96 S->pState = pState;
emilmont 1:fdd22bb7aa52 97
emilmont 1:fdd22bb7aa52 98 }
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 /**
emilmont 1:fdd22bb7aa52 101 * @} end of FIR_Sparse group
emilmont 1:fdd22bb7aa52 102 */