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CMSIS DSP library

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cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c@2:da51fb522205, 2013-05-30 (annotated)

Committer:
emilmont
Date:
Thu May 30 17:10:11 2013 +0100
Revision:
2:da51fb522205
Parent:
1:fdd22bb7aa52
Child:
3:7a284390b0ce
Keep "cmsis-dsp" module in synch with its source

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 2:da51fb522205 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_biquad_cascade_df1_init_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q31 Biquad cascade DirectFormI(DF1) filter initialization function.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 *
emilmont 1:fdd22bb7aa52 13 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 14 *
emilmont 1:fdd22bb7aa52 15 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 16 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 17 *
emilmont 1:fdd22bb7aa52 18 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 19 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 20 *
emilmont 1:fdd22bb7aa52 21 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 22 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 23 *
emilmont 1:fdd22bb7aa52 24 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 25 * Documentation updated.
emilmont 1:fdd22bb7aa52 26 *
emilmont 1:fdd22bb7aa52 27 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 28 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 29 *
emilmont 1:fdd22bb7aa52 30 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 31 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 32 *
emilmont 1:fdd22bb7aa52 33 * Version 0.0.5 2010/04/26
emilmont 2:da51fb522205 34 * incorporated review comments and updated with latest CMSIS layer
emilmont 1:fdd22bb7aa52 35 *
emilmont 1:fdd22bb7aa52 36 * Version 0.0.3 2010/03/10
emilmont 1:fdd22bb7aa52 37 * Initial version
emilmont 1:fdd22bb7aa52 38 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 39
emilmont 1:fdd22bb7aa52 40 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 41
emilmont 1:fdd22bb7aa52 42 /**
emilmont 1:fdd22bb7aa52 43 * @ingroup groupFilters
emilmont 1:fdd22bb7aa52 44 */
emilmont 1:fdd22bb7aa52 45
emilmont 1:fdd22bb7aa52 46 /**
emilmont 1:fdd22bb7aa52 47 * @addtogroup BiquadCascadeDF1
emilmont 1:fdd22bb7aa52 48 * @{
emilmont 1:fdd22bb7aa52 49 */
emilmont 1:fdd22bb7aa52 50
emilmont 1:fdd22bb7aa52 51 /**
emilmont 1:fdd22bb7aa52 52 * @details
emilmont 1:fdd22bb7aa52 53 *
emilmont 1:fdd22bb7aa52 54 * @param[in,out] *S points to an instance of the Q31 Biquad cascade structure.
emilmont 1:fdd22bb7aa52 55 * @param[in] numStages number of 2nd order stages in the filter.
emilmont 1:fdd22bb7aa52 56 * @param[in] *pCoeffs points to the filter coefficients buffer.
emilmont 1:fdd22bb7aa52 57 * @param[in] *pState points to the state buffer.
emilmont 1:fdd22bb7aa52 58 * @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format
emilmont 1:fdd22bb7aa52 59 * @return none
emilmont 1:fdd22bb7aa52 60 *
emilmont 1:fdd22bb7aa52 61 * <b>Coefficient and State Ordering:</b>
emilmont 1:fdd22bb7aa52 62 *
emilmont 1:fdd22bb7aa52 63 * \par
emilmont 1:fdd22bb7aa52 64 * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
emilmont 1:fdd22bb7aa52 65 * <pre>
emilmont 1:fdd22bb7aa52 66 * {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
emilmont 1:fdd22bb7aa52 67 * </pre>
emilmont 1:fdd22bb7aa52 68 * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
emilmont 1:fdd22bb7aa52 69 * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
emilmont 1:fdd22bb7aa52 70 * and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
emilmont 1:fdd22bb7aa52 71 *
emilmont 1:fdd22bb7aa52 72 * \par
emilmont 1:fdd22bb7aa52 73 * The <code>pState</code> points to state variables array.
emilmont 1:fdd22bb7aa52 74 * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
emilmont 1:fdd22bb7aa52 75 * The state variables are arranged in the <code>pState</code> array as:
emilmont 1:fdd22bb7aa52 76 * <pre>
emilmont 1:fdd22bb7aa52 77 * {x[n-1], x[n-2], y[n-1], y[n-2]}
emilmont 1:fdd22bb7aa52 78 * </pre>
emilmont 1:fdd22bb7aa52 79 * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
emilmont 1:fdd22bb7aa52 80 * The state array has a total length of <code>4*numStages</code> values.
emilmont 1:fdd22bb7aa52 81 * The state variables are updated after each block of data is processed; the coefficients are untouched.
emilmont 1:fdd22bb7aa52 82 */
emilmont 1:fdd22bb7aa52 83
emilmont 1:fdd22bb7aa52 84 void arm_biquad_cascade_df1_init_q31(
emilmont 1:fdd22bb7aa52 85 arm_biquad_casd_df1_inst_q31 * S,
emilmont 1:fdd22bb7aa52 86 uint8_t numStages,
emilmont 1:fdd22bb7aa52 87 q31_t * pCoeffs,
emilmont 1:fdd22bb7aa52 88 q31_t * pState,
emilmont 1:fdd22bb7aa52 89 int8_t postShift)
emilmont 1:fdd22bb7aa52 90 {
emilmont 1:fdd22bb7aa52 91 /* Assign filter stages */
emilmont 1:fdd22bb7aa52 92 S->numStages = numStages;
emilmont 1:fdd22bb7aa52 93
emilmont 1:fdd22bb7aa52 94 /* Assign postShift to be applied to the output */
emilmont 1:fdd22bb7aa52 95 S->postShift = postShift;
emilmont 1:fdd22bb7aa52 96
emilmont 1:fdd22bb7aa52 97 /* Assign coefficient pointer */
emilmont 1:fdd22bb7aa52 98 S->pCoeffs = pCoeffs;
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 /* Clear state buffer and size is always 4 * numStages */
emilmont 1:fdd22bb7aa52 101 memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q31_t));
emilmont 1:fdd22bb7aa52 102
emilmont 1:fdd22bb7aa52 103 /* Assign state pointer */
emilmont 1:fdd22bb7aa52 104 S->pState = pState;
emilmont 1:fdd22bb7aa52 105 }
emilmont 1:fdd22bb7aa52 106
emilmont 1:fdd22bb7aa52 107 /**
emilmont 1:fdd22bb7aa52 108 * @} end of BiquadCascadeDF1 group
emilmont 1:fdd22bb7aa52 109 */