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CMSIS DSP library

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cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_cmplx_mult_cmplx_f32.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Floating-point complex-by-complex multiplication
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 41
emilmont 1:fdd22bb7aa52 42 /**
emilmont 1:fdd22bb7aa52 43 * @ingroup groupCmplxMath
emilmont 1:fdd22bb7aa52 44 */
emilmont 1:fdd22bb7aa52 45
emilmont 1:fdd22bb7aa52 46 /**
emilmont 1:fdd22bb7aa52 47 * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
emilmont 1:fdd22bb7aa52 48 *
emilmont 1:fdd22bb7aa52 49 * Multiplies a complex vector by another complex vector and generates a complex result.
emilmont 1:fdd22bb7aa52 50 * The data in the complex arrays is stored in an interleaved fashion
emilmont 1:fdd22bb7aa52 51 * (real, imag, real, imag, ...).
emilmont 1:fdd22bb7aa52 52 * The parameter <code>numSamples</code> represents the number of complex
emilmont 1:fdd22bb7aa52 53 * samples processed. The complex arrays have a total of <code>2*numSamples</code>
emilmont 1:fdd22bb7aa52 54 * real values.
emilmont 1:fdd22bb7aa52 55 *
emilmont 1:fdd22bb7aa52 56 * The underlying algorithm is used:
emilmont 1:fdd22bb7aa52 57 *
emilmont 1:fdd22bb7aa52 58 * <pre>
emilmont 1:fdd22bb7aa52 59 * for(n=0; n<numSamples; n++) {
emilmont 1:fdd22bb7aa52 60 * pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
emilmont 1:fdd22bb7aa52 61 * pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
emilmont 1:fdd22bb7aa52 62 * }
emilmont 1:fdd22bb7aa52 63 * </pre>
emilmont 1:fdd22bb7aa52 64 *
emilmont 1:fdd22bb7aa52 65 * There are separate functions for floating-point, Q15, and Q31 data types.
emilmont 1:fdd22bb7aa52 66 */
emilmont 1:fdd22bb7aa52 67
emilmont 1:fdd22bb7aa52 68 /**
emilmont 1:fdd22bb7aa52 69 * @addtogroup CmplxByCmplxMult
emilmont 1:fdd22bb7aa52 70 * @{
emilmont 1:fdd22bb7aa52 71 */
emilmont 1:fdd22bb7aa52 72
emilmont 1:fdd22bb7aa52 73
emilmont 1:fdd22bb7aa52 74 /**
emilmont 1:fdd22bb7aa52 75 * @brief Floating-point complex-by-complex multiplication
emilmont 1:fdd22bb7aa52 76 * @param[in] *pSrcA points to the first input vector
emilmont 1:fdd22bb7aa52 77 * @param[in] *pSrcB points to the second input vector
emilmont 1:fdd22bb7aa52 78 * @param[out] *pDst points to the output vector
emilmont 1:fdd22bb7aa52 79 * @param[in] numSamples number of complex samples in each vector
emilmont 1:fdd22bb7aa52 80 * @return none.
emilmont 1:fdd22bb7aa52 81 */
emilmont 1:fdd22bb7aa52 82
emilmont 1:fdd22bb7aa52 83 void arm_cmplx_mult_cmplx_f32(
emilmont 1:fdd22bb7aa52 84 float32_t * pSrcA,
emilmont 1:fdd22bb7aa52 85 float32_t * pSrcB,
emilmont 1:fdd22bb7aa52 86 float32_t * pDst,
emilmont 1:fdd22bb7aa52 87 uint32_t numSamples)
emilmont 1:fdd22bb7aa52 88 {
emilmont 1:fdd22bb7aa52 89 float32_t a1, b1, c1, d1; /* Temporary variables to store real and imaginary values */
emilmont 1:fdd22bb7aa52 90 uint32_t blkCnt; /* loop counters */
emilmont 1:fdd22bb7aa52 91
mbed_official 3:7a284390b0ce 92 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 93
emilmont 1:fdd22bb7aa52 94 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 95 float32_t a2, b2, c2, d2; /* Temporary variables to store real and imaginary values */
emilmont 1:fdd22bb7aa52 96 float32_t acc1, acc2, acc3, acc4;
emilmont 1:fdd22bb7aa52 97
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 /* loop Unrolling */
emilmont 1:fdd22bb7aa52 100 blkCnt = numSamples >> 2u;
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 103 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 104 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 105 {
emilmont 1:fdd22bb7aa52 106 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
emilmont 1:fdd22bb7aa52 107 /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
emilmont 1:fdd22bb7aa52 108 a1 = *pSrcA; /* A[2 * i] */
emilmont 1:fdd22bb7aa52 109 c1 = *pSrcB; /* B[2 * i] */
emilmont 1:fdd22bb7aa52 110
emilmont 1:fdd22bb7aa52 111 b1 = *(pSrcA + 1); /* A[2 * i + 1] */
emilmont 1:fdd22bb7aa52 112 acc1 = a1 * c1; /* acc1 = A[2 * i] * B[2 * i] */
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 a2 = *(pSrcA + 2); /* A[2 * i + 2] */
emilmont 1:fdd22bb7aa52 115 acc2 = (b1 * c1); /* acc2 = A[2 * i + 1] * B[2 * i] */
emilmont 1:fdd22bb7aa52 116
emilmont 1:fdd22bb7aa52 117 d1 = *(pSrcB + 1); /* B[2 * i + 1] */
emilmont 1:fdd22bb7aa52 118 c2 = *(pSrcB + 2); /* B[2 * i + 2] */
emilmont 1:fdd22bb7aa52 119 acc1 -= b1 * d1; /* acc1 = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 d2 = *(pSrcB + 3); /* B[2 * i + 3] */
emilmont 1:fdd22bb7aa52 122 acc3 = a2 * c2; /* acc3 = A[2 * i + 2] * B[2 * i + 2] */
emilmont 1:fdd22bb7aa52 123
emilmont 1:fdd22bb7aa52 124 b2 = *(pSrcA + 3); /* A[2 * i + 3] */
emilmont 1:fdd22bb7aa52 125 acc2 += (a1 * d1); /* acc2 = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 a1 = *(pSrcA + 4); /* A[2 * i + 4] */
emilmont 1:fdd22bb7aa52 128 acc4 = (a2 * d2); /* acc4 = A[2 * i + 2] * B[2 * i + 3] */
emilmont 1:fdd22bb7aa52 129
emilmont 1:fdd22bb7aa52 130 c1 = *(pSrcB + 4); /* B[2 * i + 4] */
emilmont 1:fdd22bb7aa52 131 acc3 -= (b2 * d2); /* acc3 = A[2 * i + 2] * B[2 * i + 2] - A[2 * i + 3] * B[2 * i + 3] */
emilmont 1:fdd22bb7aa52 132 *pDst = acc1; /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
emilmont 1:fdd22bb7aa52 133
emilmont 1:fdd22bb7aa52 134 b1 = *(pSrcA + 5); /* A[2 * i + 5] */
emilmont 1:fdd22bb7aa52 135 acc4 += b2 * c2; /* acc4 = A[2 * i + 2] * B[2 * i + 3] + A[2 * i + 3] * B[2 * i + 2] */
emilmont 1:fdd22bb7aa52 136
emilmont 1:fdd22bb7aa52 137 *(pDst + 1) = acc2; /* C[2 * i + 1] = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
emilmont 1:fdd22bb7aa52 138 acc1 = (a1 * c1);
emilmont 1:fdd22bb7aa52 139
emilmont 1:fdd22bb7aa52 140 d1 = *(pSrcB + 5);
emilmont 1:fdd22bb7aa52 141 acc2 = (b1 * c1);
emilmont 1:fdd22bb7aa52 142
emilmont 1:fdd22bb7aa52 143 *(pDst + 2) = acc3;
emilmont 1:fdd22bb7aa52 144 *(pDst + 3) = acc4;
emilmont 1:fdd22bb7aa52 145
emilmont 1:fdd22bb7aa52 146 a2 = *(pSrcA + 6);
emilmont 1:fdd22bb7aa52 147 acc1 -= (b1 * d1);
emilmont 1:fdd22bb7aa52 148
emilmont 1:fdd22bb7aa52 149 c2 = *(pSrcB + 6);
emilmont 1:fdd22bb7aa52 150 acc2 += (a1 * d1);
emilmont 1:fdd22bb7aa52 151
emilmont 1:fdd22bb7aa52 152 b2 = *(pSrcA + 7);
emilmont 1:fdd22bb7aa52 153 acc3 = (a2 * c2);
emilmont 1:fdd22bb7aa52 154
emilmont 1:fdd22bb7aa52 155 d2 = *(pSrcB + 7);
emilmont 1:fdd22bb7aa52 156 acc4 = (b2 * c2);
emilmont 1:fdd22bb7aa52 157
emilmont 1:fdd22bb7aa52 158 *(pDst + 4) = acc1;
emilmont 1:fdd22bb7aa52 159 pSrcA += 8u;
emilmont 1:fdd22bb7aa52 160
emilmont 1:fdd22bb7aa52 161 acc3 -= (b2 * d2);
emilmont 1:fdd22bb7aa52 162 acc4 += (a2 * d2);
emilmont 1:fdd22bb7aa52 163
emilmont 1:fdd22bb7aa52 164 *(pDst + 5) = acc2;
emilmont 1:fdd22bb7aa52 165 pSrcB += 8u;
emilmont 1:fdd22bb7aa52 166
emilmont 1:fdd22bb7aa52 167 *(pDst + 6) = acc3;
emilmont 1:fdd22bb7aa52 168 *(pDst + 7) = acc4;
emilmont 1:fdd22bb7aa52 169
emilmont 1:fdd22bb7aa52 170 pDst += 8u;
emilmont 1:fdd22bb7aa52 171
emilmont 1:fdd22bb7aa52 172 /* Decrement the numSamples loop counter */
emilmont 1:fdd22bb7aa52 173 blkCnt--;
emilmont 1:fdd22bb7aa52 174 }
emilmont 1:fdd22bb7aa52 175
emilmont 1:fdd22bb7aa52 176 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 177 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 178 blkCnt = numSamples % 0x4u;
emilmont 1:fdd22bb7aa52 179
emilmont 1:fdd22bb7aa52 180 #else
emilmont 1:fdd22bb7aa52 181
emilmont 1:fdd22bb7aa52 182 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 183 blkCnt = numSamples;
emilmont 1:fdd22bb7aa52 184
mbed_official 3:7a284390b0ce 185 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 186
emilmont 1:fdd22bb7aa52 187 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 188 {
emilmont 1:fdd22bb7aa52 189 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
emilmont 1:fdd22bb7aa52 190 /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
emilmont 1:fdd22bb7aa52 191 a1 = *pSrcA++;
emilmont 1:fdd22bb7aa52 192 b1 = *pSrcA++;
emilmont 1:fdd22bb7aa52 193 c1 = *pSrcB++;
emilmont 1:fdd22bb7aa52 194 d1 = *pSrcB++;
emilmont 1:fdd22bb7aa52 195
emilmont 1:fdd22bb7aa52 196 /* store the result in the destination buffer. */
emilmont 1:fdd22bb7aa52 197 *pDst++ = (a1 * c1) - (b1 * d1);
emilmont 1:fdd22bb7aa52 198 *pDst++ = (a1 * d1) + (b1 * c1);
emilmont 1:fdd22bb7aa52 199
emilmont 1:fdd22bb7aa52 200 /* Decrement the numSamples loop counter */
emilmont 1:fdd22bb7aa52 201 blkCnt--;
emilmont 1:fdd22bb7aa52 202 }
emilmont 1:fdd22bb7aa52 203 }
emilmont 1:fdd22bb7aa52 204
emilmont 1:fdd22bb7aa52 205 /**
emilmont 1:fdd22bb7aa52 206 * @} end of CmplxByCmplxMult group
emilmont 1:fdd22bb7aa52 207 */