CMSIS DSP library

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Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b

Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/

Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_cmplx_conj_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q31 complex conjugate.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * ---------------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 41
emilmont 1:fdd22bb7aa52 42 /**
emilmont 1:fdd22bb7aa52 43 * @ingroup groupCmplxMath
emilmont 1:fdd22bb7aa52 44 */
emilmont 1:fdd22bb7aa52 45
emilmont 1:fdd22bb7aa52 46 /**
emilmont 1:fdd22bb7aa52 47 * @addtogroup cmplx_conj
emilmont 1:fdd22bb7aa52 48 * @{
emilmont 1:fdd22bb7aa52 49 */
emilmont 1:fdd22bb7aa52 50
emilmont 1:fdd22bb7aa52 51 /**
emilmont 1:fdd22bb7aa52 52 * @brief Q31 complex conjugate.
emilmont 1:fdd22bb7aa52 53 * @param *pSrc points to the input vector
emilmont 1:fdd22bb7aa52 54 * @param *pDst points to the output vector
emilmont 1:fdd22bb7aa52 55 * @param numSamples number of complex samples in each vector
emilmont 1:fdd22bb7aa52 56 * @return none.
emilmont 1:fdd22bb7aa52 57 *
emilmont 1:fdd22bb7aa52 58 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 59 * \par
emilmont 1:fdd22bb7aa52 60 * The function uses saturating arithmetic.
emilmont 1:fdd22bb7aa52 61 * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
emilmont 1:fdd22bb7aa52 62 */
emilmont 1:fdd22bb7aa52 63
emilmont 1:fdd22bb7aa52 64 void arm_cmplx_conj_q31(
emilmont 1:fdd22bb7aa52 65 q31_t * pSrc,
emilmont 1:fdd22bb7aa52 66 q31_t * pDst,
emilmont 1:fdd22bb7aa52 67 uint32_t numSamples)
emilmont 1:fdd22bb7aa52 68 {
emilmont 1:fdd22bb7aa52 69 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 70 q31_t in; /* Input value */
emilmont 1:fdd22bb7aa52 71
mbed_official 3:7a284390b0ce 72 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 73
emilmont 1:fdd22bb7aa52 74 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 75 q31_t inR1, inR2, inR3, inR4; /* Temporary real variables */
emilmont 1:fdd22bb7aa52 76 q31_t inI1, inI2, inI3, inI4; /* Temporary imaginary variables */
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 79 blkCnt = numSamples >> 2u;
emilmont 1:fdd22bb7aa52 80
emilmont 1:fdd22bb7aa52 81 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 82 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 83 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 84 {
emilmont 1:fdd22bb7aa52 85 /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
emilmont 1:fdd22bb7aa52 86 /* Calculate Complex Conjugate and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 87 /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
emilmont 1:fdd22bb7aa52 88 /* read real input sample */
emilmont 1:fdd22bb7aa52 89 inR1 = pSrc[0];
emilmont 1:fdd22bb7aa52 90 /* store real input sample */
emilmont 1:fdd22bb7aa52 91 pDst[0] = inR1;
emilmont 1:fdd22bb7aa52 92
emilmont 1:fdd22bb7aa52 93 /* read imaginary input sample */
emilmont 1:fdd22bb7aa52 94 inI1 = pSrc[1];
emilmont 1:fdd22bb7aa52 95
emilmont 1:fdd22bb7aa52 96 /* read real input sample */
emilmont 1:fdd22bb7aa52 97 inR2 = pSrc[2];
emilmont 1:fdd22bb7aa52 98 /* store real input sample */
emilmont 1:fdd22bb7aa52 99 pDst[2] = inR2;
emilmont 1:fdd22bb7aa52 100
emilmont 1:fdd22bb7aa52 101 /* read imaginary input sample */
emilmont 1:fdd22bb7aa52 102 inI2 = pSrc[3];
emilmont 1:fdd22bb7aa52 103
emilmont 1:fdd22bb7aa52 104 /* negate imaginary input sample */
emilmont 1:fdd22bb7aa52 105 inI1 = __QSUB(0, inI1);
emilmont 1:fdd22bb7aa52 106
emilmont 1:fdd22bb7aa52 107 /* read real input sample */
emilmont 1:fdd22bb7aa52 108 inR3 = pSrc[4];
emilmont 1:fdd22bb7aa52 109 /* store real input sample */
emilmont 1:fdd22bb7aa52 110 pDst[4] = inR3;
emilmont 1:fdd22bb7aa52 111
emilmont 1:fdd22bb7aa52 112 /* read imaginary input sample */
emilmont 1:fdd22bb7aa52 113 inI3 = pSrc[5];
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 /* negate imaginary input sample */
emilmont 1:fdd22bb7aa52 116 inI2 = __QSUB(0, inI2);
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 /* read real input sample */
emilmont 1:fdd22bb7aa52 119 inR4 = pSrc[6];
emilmont 1:fdd22bb7aa52 120 /* store real input sample */
emilmont 1:fdd22bb7aa52 121 pDst[6] = inR4;
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 /* negate imaginary input sample */
emilmont 1:fdd22bb7aa52 124 inI3 = __QSUB(0, inI3);
emilmont 1:fdd22bb7aa52 125
emilmont 1:fdd22bb7aa52 126 /* store imaginary input sample */
emilmont 1:fdd22bb7aa52 127 inI4 = pSrc[7];
emilmont 1:fdd22bb7aa52 128
emilmont 1:fdd22bb7aa52 129 /* store imaginary input samples */
emilmont 1:fdd22bb7aa52 130 pDst[1] = inI1;
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 /* negate imaginary input sample */
emilmont 1:fdd22bb7aa52 133 inI4 = __QSUB(0, inI4);
emilmont 1:fdd22bb7aa52 134
emilmont 1:fdd22bb7aa52 135 /* store imaginary input samples */
emilmont 1:fdd22bb7aa52 136 pDst[3] = inI2;
emilmont 1:fdd22bb7aa52 137
emilmont 1:fdd22bb7aa52 138 /* increment source pointer by 8 to proecess next samples */
emilmont 1:fdd22bb7aa52 139 pSrc += 8u;
emilmont 1:fdd22bb7aa52 140
emilmont 1:fdd22bb7aa52 141 /* store imaginary input samples */
emilmont 1:fdd22bb7aa52 142 pDst[5] = inI3;
emilmont 1:fdd22bb7aa52 143 pDst[7] = inI4;
emilmont 1:fdd22bb7aa52 144
emilmont 1:fdd22bb7aa52 145 /* increment destination pointer by 8 to process next samples */
emilmont 1:fdd22bb7aa52 146 pDst += 8u;
emilmont 1:fdd22bb7aa52 147
emilmont 1:fdd22bb7aa52 148 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 149 blkCnt--;
emilmont 1:fdd22bb7aa52 150 }
emilmont 1:fdd22bb7aa52 151
emilmont 1:fdd22bb7aa52 152 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 153 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 154 blkCnt = numSamples % 0x4u;
emilmont 1:fdd22bb7aa52 155
emilmont 1:fdd22bb7aa52 156 #else
emilmont 1:fdd22bb7aa52 157
emilmont 1:fdd22bb7aa52 158 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 159 blkCnt = numSamples;
emilmont 1:fdd22bb7aa52 160
emilmont 1:fdd22bb7aa52 161
mbed_official 3:7a284390b0ce 162 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 163
emilmont 1:fdd22bb7aa52 164 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 165 {
emilmont 1:fdd22bb7aa52 166 /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
emilmont 1:fdd22bb7aa52 167 /* Calculate Complex Conjugate and then store the results in the destination buffer. */
emilmont 1:fdd22bb7aa52 168 /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
emilmont 1:fdd22bb7aa52 169 *pDst++ = *pSrc++;
emilmont 1:fdd22bb7aa52 170 in = *pSrc++;
mbed_official 3:7a284390b0ce 171 *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
emilmont 1:fdd22bb7aa52 172
emilmont 1:fdd22bb7aa52 173 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 174 blkCnt--;
emilmont 1:fdd22bb7aa52 175 }
emilmont 1:fdd22bb7aa52 176 }
emilmont 1:fdd22bb7aa52 177
emilmont 1:fdd22bb7aa52 178 /**
emilmont 1:fdd22bb7aa52 179 * @} end of cmplx_conj group
emilmont 1:fdd22bb7aa52 180 */