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CMSIS DSP library

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cmsis_dsp/BasicMathFunctions/arm_dot_prod_q7.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_dot_prod_q7.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q7 dot product.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup dot_prod
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /**
emilmont 1:fdd22bb7aa52 53 * @brief Dot product of Q7 vectors.
emilmont 1:fdd22bb7aa52 54 * @param[in] *pSrcA points to the first input vector
emilmont 1:fdd22bb7aa52 55 * @param[in] *pSrcB points to the second input vector
emilmont 1:fdd22bb7aa52 56 * @param[in] blockSize number of samples in each vector
emilmont 1:fdd22bb7aa52 57 * @param[out] *result output result returned here
emilmont 1:fdd22bb7aa52 58 * @return none.
emilmont 1:fdd22bb7aa52 59 *
emilmont 1:fdd22bb7aa52 60 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 61 * \par
emilmont 1:fdd22bb7aa52 62 * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
emilmont 1:fdd22bb7aa52 63 * results are added to an accumulator in 18.14 format.
emilmont 1:fdd22bb7aa52 64 * Nonsaturating additions are used and there is no danger of wrap around as long as
emilmont 1:fdd22bb7aa52 65 * the vectors are less than 2^18 elements long.
emilmont 1:fdd22bb7aa52 66 * The return result is in 18.14 format.
emilmont 1:fdd22bb7aa52 67 */
emilmont 1:fdd22bb7aa52 68
emilmont 1:fdd22bb7aa52 69 void arm_dot_prod_q7(
emilmont 1:fdd22bb7aa52 70 q7_t * pSrcA,
emilmont 1:fdd22bb7aa52 71 q7_t * pSrcB,
emilmont 1:fdd22bb7aa52 72 uint32_t blockSize,
emilmont 1:fdd22bb7aa52 73 q31_t * result)
emilmont 1:fdd22bb7aa52 74 {
emilmont 1:fdd22bb7aa52 75 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 76
emilmont 1:fdd22bb7aa52 77 q31_t sum = 0; /* Temporary variables to store output */
emilmont 1:fdd22bb7aa52 78
mbed_official 3:7a284390b0ce 79 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 80
emilmont 1:fdd22bb7aa52 81 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 82
emilmont 1:fdd22bb7aa52 83 q31_t input1, input2; /* Temporary variables to store input */
emilmont 1:fdd22bb7aa52 84 q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */
emilmont 1:fdd22bb7aa52 85
emilmont 1:fdd22bb7aa52 86
emilmont 1:fdd22bb7aa52 87
emilmont 1:fdd22bb7aa52 88 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 89 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 90
emilmont 1:fdd22bb7aa52 91 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 92 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 93 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 94 {
emilmont 1:fdd22bb7aa52 95 /* read 4 samples at a time from sourceA */
emilmont 1:fdd22bb7aa52 96 input1 = *__SIMD32(pSrcA)++;
emilmont 1:fdd22bb7aa52 97 /* read 4 samples at a time from sourceB */
emilmont 1:fdd22bb7aa52 98 input2 = *__SIMD32(pSrcB)++;
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 /* extract two q7_t samples to q15_t samples */
emilmont 1:fdd22bb7aa52 101 inA1 = __SXTB16(__ROR(input1, 8));
emilmont 1:fdd22bb7aa52 102 /* extract reminaing two samples */
emilmont 1:fdd22bb7aa52 103 inA2 = __SXTB16(input1);
emilmont 1:fdd22bb7aa52 104 /* extract two q7_t samples to q15_t samples */
emilmont 1:fdd22bb7aa52 105 inB1 = __SXTB16(__ROR(input2, 8));
emilmont 1:fdd22bb7aa52 106 /* extract reminaing two samples */
emilmont 1:fdd22bb7aa52 107 inB2 = __SXTB16(input2);
emilmont 1:fdd22bb7aa52 108
emilmont 1:fdd22bb7aa52 109 /* multiply and accumulate two samples at a time */
emilmont 1:fdd22bb7aa52 110 sum = __SMLAD(inA1, inB1, sum);
emilmont 1:fdd22bb7aa52 111 sum = __SMLAD(inA2, inB2, sum);
emilmont 1:fdd22bb7aa52 112
emilmont 1:fdd22bb7aa52 113 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 114 blkCnt--;
emilmont 1:fdd22bb7aa52 115 }
emilmont 1:fdd22bb7aa52 116
emilmont 1:fdd22bb7aa52 117 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 118 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 119 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 122 {
emilmont 1:fdd22bb7aa52 123 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
emilmont 1:fdd22bb7aa52 124 /* Dot product and then store the results in a temporary buffer. */
emilmont 1:fdd22bb7aa52 125 sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 128 blkCnt--;
emilmont 1:fdd22bb7aa52 129 }
emilmont 1:fdd22bb7aa52 130
emilmont 1:fdd22bb7aa52 131 #else
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 134
emilmont 1:fdd22bb7aa52 135
emilmont 1:fdd22bb7aa52 136
emilmont 1:fdd22bb7aa52 137 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 138 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 139
emilmont 1:fdd22bb7aa52 140 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 141 {
emilmont 1:fdd22bb7aa52 142 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
emilmont 1:fdd22bb7aa52 143 /* Dot product and then store the results in a temporary buffer. */
emilmont 1:fdd22bb7aa52 144 sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 145
emilmont 1:fdd22bb7aa52 146 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 147 blkCnt--;
emilmont 1:fdd22bb7aa52 148 }
emilmont 1:fdd22bb7aa52 149
mbed_official 3:7a284390b0ce 150 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 151
emilmont 1:fdd22bb7aa52 152
emilmont 1:fdd22bb7aa52 153 /* Store the result in the destination buffer in 18.14 format */
emilmont 1:fdd22bb7aa52 154 *result = sum;
emilmont 1:fdd22bb7aa52 155 }
emilmont 1:fdd22bb7aa52 156
emilmont 1:fdd22bb7aa52 157 /**
emilmont 1:fdd22bb7aa52 158 * @} end of dot_prod group
emilmont 1:fdd22bb7aa52 159 */