USB device stack

Dependents:   mbed-mX-USB-TEST1 USBMSD_SD_HID_HelloWorld HidTest MIDI_usb_bridge ... more

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This is an mbed 2 library. To learn more about mbed OS 5, visit the docs.

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Committer:
Kojto
Date:
Thu Jul 27 12:14:04 2017 +0100
Revision:
71:53949e6131f6
Update libraries

Fixes the previous commmit, as some devices were not copied. USBDevice contains
now targets directory with all targets implementations

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 71:53949e6131f6 1 /*******************************************************************************
Kojto 71:53949e6131f6 2 * DISCLAIMER
Kojto 71:53949e6131f6 3 * This software is supplied by Renesas Electronics Corporation and is only
Kojto 71:53949e6131f6 4 * intended for use with Renesas products. No other uses are authorized. This
Kojto 71:53949e6131f6 5 * software is owned by Renesas Electronics Corporation and is protected under
Kojto 71:53949e6131f6 6 * all applicable laws, including copyright laws.
Kojto 71:53949e6131f6 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
Kojto 71:53949e6131f6 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
Kojto 71:53949e6131f6 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
Kojto 71:53949e6131f6 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
Kojto 71:53949e6131f6 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
Kojto 71:53949e6131f6 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
Kojto 71:53949e6131f6 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
Kojto 71:53949e6131f6 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
Kojto 71:53949e6131f6 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Kojto 71:53949e6131f6 16 * Renesas reserves the right, without notice, to make changes to this software
Kojto 71:53949e6131f6 17 * and to discontinue the availability of this software. By using this software,
Kojto 71:53949e6131f6 18 * you agree to the additional terms and conditions found by accessing the
Kojto 71:53949e6131f6 19 * following link:
Kojto 71:53949e6131f6 20 * http://www.renesas.com/disclaimer
Kojto 71:53949e6131f6 21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
Kojto 71:53949e6131f6 22 *******************************************************************************/
Kojto 71:53949e6131f6 23 /*******************************************************************************
Kojto 71:53949e6131f6 24 * File Name : usb1_function_dmacdrv.c
Kojto 71:53949e6131f6 25 * $Rev: 1116 $
Kojto 71:53949e6131f6 26 * $Date:: 2014-07-09 16:29:19 +0900#$
Kojto 71:53949e6131f6 27 * Device(s) : RZ/A1H
Kojto 71:53949e6131f6 28 * Tool-Chain :
Kojto 71:53949e6131f6 29 * OS : None
Kojto 71:53949e6131f6 30 * H/W Platform :
Kojto 71:53949e6131f6 31 * Description : RZ/A1H R7S72100 USB Sample Program
Kojto 71:53949e6131f6 32 * Operation :
Kojto 71:53949e6131f6 33 * Limitations :
Kojto 71:53949e6131f6 34 *******************************************************************************/
Kojto 71:53949e6131f6 35
Kojto 71:53949e6131f6 36
Kojto 71:53949e6131f6 37 /*******************************************************************************
Kojto 71:53949e6131f6 38 Includes <System Includes> , "Project Includes"
Kojto 71:53949e6131f6 39 *******************************************************************************/
Kojto 71:53949e6131f6 40 #include <stdio.h>
Kojto 71:53949e6131f6 41 #include "r_typedefs.h"
Kojto 71:53949e6131f6 42 #include "iodefine.h"
Kojto 71:53949e6131f6 43 #include "rza_io_regrw.h"
Kojto 71:53949e6131f6 44 #include "usb1_function_dmacdrv.h"
Kojto 71:53949e6131f6 45
Kojto 71:53949e6131f6 46
Kojto 71:53949e6131f6 47 /*******************************************************************************
Kojto 71:53949e6131f6 48 Typedef definitions
Kojto 71:53949e6131f6 49 *******************************************************************************/
Kojto 71:53949e6131f6 50
Kojto 71:53949e6131f6 51
Kojto 71:53949e6131f6 52 /*******************************************************************************
Kojto 71:53949e6131f6 53 Macro definitions
Kojto 71:53949e6131f6 54 *******************************************************************************/
Kojto 71:53949e6131f6 55 #define DMAC_INDEFINE (255) /* Macro definition when REQD bit is not used */
Kojto 71:53949e6131f6 56
Kojto 71:53949e6131f6 57 /* ==== Request setting information for on-chip peripheral module ==== */
Kojto 71:53949e6131f6 58 typedef enum dmac_peri_req_reg_type
Kojto 71:53949e6131f6 59 {
Kojto 71:53949e6131f6 60 DMAC_REQ_MID,
Kojto 71:53949e6131f6 61 DMAC_REQ_RID,
Kojto 71:53949e6131f6 62 DMAC_REQ_AM,
Kojto 71:53949e6131f6 63 DMAC_REQ_LVL,
Kojto 71:53949e6131f6 64 DMAC_REQ_REQD
Kojto 71:53949e6131f6 65 } dmac_peri_req_reg_type_t;
Kojto 71:53949e6131f6 66
Kojto 71:53949e6131f6 67
Kojto 71:53949e6131f6 68 /*******************************************************************************
Kojto 71:53949e6131f6 69 Imported global variables and functions (from other files)
Kojto 71:53949e6131f6 70 *******************************************************************************/
Kojto 71:53949e6131f6 71
Kojto 71:53949e6131f6 72
Kojto 71:53949e6131f6 73 /*******************************************************************************
Kojto 71:53949e6131f6 74 Exported global variables and functions (to be accessed by other files)
Kojto 71:53949e6131f6 75 *******************************************************************************/
Kojto 71:53949e6131f6 76
Kojto 71:53949e6131f6 77
Kojto 71:53949e6131f6 78 /*******************************************************************************
Kojto 71:53949e6131f6 79 Private global variables and functions
Kojto 71:53949e6131f6 80 *******************************************************************************/
Kojto 71:53949e6131f6 81 /* ==== Prototype declaration ==== */
Kojto 71:53949e6131f6 82
Kojto 71:53949e6131f6 83 /* ==== Global variable ==== */
Kojto 71:53949e6131f6 84 /* On-chip peripheral module request setting table */
Kojto 71:53949e6131f6 85 static const uint8_t usb1_function_dmac_peri_req_init_table[8][5] =
Kojto 71:53949e6131f6 86 {
Kojto 71:53949e6131f6 87 /* MID,RID,AM,LVL,REQD */
Kojto 71:53949e6131f6 88 {32, 3, 2, 1, 1}, /* USB_0 channel 0 transmit FIFO empty */
Kojto 71:53949e6131f6 89 {32, 3, 2, 1, 0}, /* USB_0 channel 0 receive FIFO full */
Kojto 71:53949e6131f6 90 {33, 3, 2, 1, 1}, /* USB_0 channel 1 transmit FIFO empty */
Kojto 71:53949e6131f6 91 {33, 3, 2, 1, 0}, /* USB_0 channel 1 receive FIFO full */
Kojto 71:53949e6131f6 92 {34, 3, 2, 1, 1}, /* USB_1 channel 0 transmit FIFO empty */
Kojto 71:53949e6131f6 93 {34, 3, 2, 1, 0}, /* USB_1 channel 0 receive FIFO full */
Kojto 71:53949e6131f6 94 {35, 3, 2, 1, 1}, /* USB_1 channel 1 transmit FIFO empty */
Kojto 71:53949e6131f6 95 {35, 3, 2, 1, 0}, /* USB_1 channel 1 receive FIFO full */
Kojto 71:53949e6131f6 96 };
Kojto 71:53949e6131f6 97
Kojto 71:53949e6131f6 98
Kojto 71:53949e6131f6 99 /*******************************************************************************
Kojto 71:53949e6131f6 100 * Function Name: usb1_function_DMAC3_PeriReqInit
Kojto 71:53949e6131f6 101 * Description : Sets the register mode for DMA mode and the on-chip peripheral
Kojto 71:53949e6131f6 102 * : module request for transfer request for DMAC channel 1.
Kojto 71:53949e6131f6 103 * : Executes DMAC initial setting using the DMA information
Kojto 71:53949e6131f6 104 * : specified by the argument *trans_info and the enabled/disabled
Kojto 71:53949e6131f6 105 * : continuous transfer specified by the argument continuation.
Kojto 71:53949e6131f6 106 * : Registers DMAC channel 1 interrupt handler function and sets
Kojto 71:53949e6131f6 107 * : the interrupt priority level. Then enables transfer completion
Kojto 71:53949e6131f6 108 * : interrupt.
Kojto 71:53949e6131f6 109 * Arguments : dmac_transinfo_t *trans_info : Setting information to DMAC register
Kojto 71:53949e6131f6 110 * : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
Kojto 71:53949e6131f6 111 * : uint32_t continuation : Set continuous transfer to be valid
Kojto 71:53949e6131f6 112 * : after DMA transfer has been completed
Kojto 71:53949e6131f6 113 * : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
Kojto 71:53949e6131f6 114 * : DMAC_SAMPLE_SINGLE : Do not execute continuous transfer
Kojto 71:53949e6131f6 115 * : uint32_t request_factor : Factor for on-chip peripheral module request
Kojto 71:53949e6131f6 116 * : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
Kojto 71:53949e6131f6 117 * : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
Kojto 71:53949e6131f6 118 * : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
Kojto 71:53949e6131f6 119 * : :
Kojto 71:53949e6131f6 120 * : uint32_t req_direction: Setting value of CHCFG_n register REQD bit
Kojto 71:53949e6131f6 121 * Return Value : none
Kojto 71:53949e6131f6 122 *******************************************************************************/
Kojto 71:53949e6131f6 123 void usb1_function_DMAC3_PeriReqInit (const dmac_transinfo_t * trans_info,
Kojto 71:53949e6131f6 124 uint32_t dmamode, uint32_t continuation,
Kojto 71:53949e6131f6 125 uint32_t request_factor, uint32_t req_direction)
Kojto 71:53949e6131f6 126 {
Kojto 71:53949e6131f6 127 /* ==== Register mode ==== */
Kojto 71:53949e6131f6 128 if (DMAC_MODE_REGISTER == dmamode)
Kojto 71:53949e6131f6 129 {
Kojto 71:53949e6131f6 130 /* ==== Next0 register set ==== */
Kojto 71:53949e6131f6 131 DMAC3.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
Kojto 71:53949e6131f6 132 DMAC3.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
Kojto 71:53949e6131f6 133 DMAC3.N0TB_n = trans_info->count; /* Total transfer byte count */
Kojto 71:53949e6131f6 134
Kojto 71:53949e6131f6 135 /* DAD : Transfer destination address counting direction */
Kojto 71:53949e6131f6 136 /* SAD : Transfer source address counting direction */
Kojto 71:53949e6131f6 137 /* DDS : Transfer destination transfer size */
Kojto 71:53949e6131f6 138 /* SDS : Transfer source transfer size */
Kojto 71:53949e6131f6 139 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 140 trans_info->daddr_dir,
Kojto 71:53949e6131f6 141 DMAC3_CHCFG_n_DAD_SHIFT,
Kojto 71:53949e6131f6 142 DMAC3_CHCFG_n_DAD);
Kojto 71:53949e6131f6 143 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 144 trans_info->saddr_dir,
Kojto 71:53949e6131f6 145 DMAC3_CHCFG_n_SAD_SHIFT,
Kojto 71:53949e6131f6 146 DMAC3_CHCFG_n_SAD);
Kojto 71:53949e6131f6 147 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 148 trans_info->dst_size,
Kojto 71:53949e6131f6 149 DMAC3_CHCFG_n_DDS_SHIFT,
Kojto 71:53949e6131f6 150 DMAC3_CHCFG_n_DDS);
Kojto 71:53949e6131f6 151 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 152 trans_info->src_size,
Kojto 71:53949e6131f6 153 DMAC3_CHCFG_n_SDS_SHIFT,
Kojto 71:53949e6131f6 154 DMAC3_CHCFG_n_SDS);
Kojto 71:53949e6131f6 155
Kojto 71:53949e6131f6 156 /* DMS : Register mode */
Kojto 71:53949e6131f6 157 /* RSEL : Select Next0 register set */
Kojto 71:53949e6131f6 158 /* SBE : No discharge of buffer data when aborted */
Kojto 71:53949e6131f6 159 /* DEM : No DMA interrupt mask */
Kojto 71:53949e6131f6 160 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 161 0,
Kojto 71:53949e6131f6 162 DMAC3_CHCFG_n_DMS_SHIFT,
Kojto 71:53949e6131f6 163 DMAC3_CHCFG_n_DMS);
Kojto 71:53949e6131f6 164 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 165 0,
Kojto 71:53949e6131f6 166 DMAC3_CHCFG_n_RSEL_SHIFT,
Kojto 71:53949e6131f6 167 DMAC3_CHCFG_n_RSEL);
Kojto 71:53949e6131f6 168 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 169 0,
Kojto 71:53949e6131f6 170 DMAC3_CHCFG_n_SBE_SHIFT,
Kojto 71:53949e6131f6 171 DMAC3_CHCFG_n_SBE);
Kojto 71:53949e6131f6 172 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 173 0,
Kojto 71:53949e6131f6 174 DMAC3_CHCFG_n_DEM_SHIFT,
Kojto 71:53949e6131f6 175 DMAC3_CHCFG_n_DEM);
Kojto 71:53949e6131f6 176
Kojto 71:53949e6131f6 177 /* ---- Continuous transfer ---- */
Kojto 71:53949e6131f6 178 if (DMAC_SAMPLE_CONTINUATION == continuation)
Kojto 71:53949e6131f6 179 {
Kojto 71:53949e6131f6 180 /* REN : Execute continuous transfer */
Kojto 71:53949e6131f6 181 /* RSW : Change register set when DMA transfer is completed. */
Kojto 71:53949e6131f6 182 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 183 1,
Kojto 71:53949e6131f6 184 DMAC3_CHCFG_n_REN_SHIFT,
Kojto 71:53949e6131f6 185 DMAC3_CHCFG_n_REN);
Kojto 71:53949e6131f6 186 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 187 1,
Kojto 71:53949e6131f6 188 DMAC3_CHCFG_n_RSW_SHIFT,
Kojto 71:53949e6131f6 189 DMAC3_CHCFG_n_RSW);
Kojto 71:53949e6131f6 190 }
Kojto 71:53949e6131f6 191 /* ---- Single transfer ---- */
Kojto 71:53949e6131f6 192 else
Kojto 71:53949e6131f6 193 {
Kojto 71:53949e6131f6 194 /* REN : Do not execute continuous transfer */
Kojto 71:53949e6131f6 195 /* RSW : Do not change register set when DMA transfer is completed. */
Kojto 71:53949e6131f6 196 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 197 0,
Kojto 71:53949e6131f6 198 DMAC3_CHCFG_n_REN_SHIFT,
Kojto 71:53949e6131f6 199 DMAC3_CHCFG_n_REN);
Kojto 71:53949e6131f6 200 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 201 0,
Kojto 71:53949e6131f6 202 DMAC3_CHCFG_n_RSW_SHIFT,
Kojto 71:53949e6131f6 203 DMAC3_CHCFG_n_RSW);
Kojto 71:53949e6131f6 204 }
Kojto 71:53949e6131f6 205
Kojto 71:53949e6131f6 206 /* TM : Single transfer */
Kojto 71:53949e6131f6 207 /* SEL : Channel setting */
Kojto 71:53949e6131f6 208 /* HIEN, LOEN : On-chip peripheral module request */
Kojto 71:53949e6131f6 209 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 210 0,
Kojto 71:53949e6131f6 211 DMAC3_CHCFG_n_TM_SHIFT,
Kojto 71:53949e6131f6 212 DMAC3_CHCFG_n_TM);
Kojto 71:53949e6131f6 213 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 214 3,
Kojto 71:53949e6131f6 215 DMAC3_CHCFG_n_SEL_SHIFT,
Kojto 71:53949e6131f6 216 DMAC3_CHCFG_n_SEL);
Kojto 71:53949e6131f6 217 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 218 1,
Kojto 71:53949e6131f6 219 DMAC3_CHCFG_n_HIEN_SHIFT,
Kojto 71:53949e6131f6 220 DMAC3_CHCFG_n_HIEN);
Kojto 71:53949e6131f6 221 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 222 0,
Kojto 71:53949e6131f6 223 DMAC3_CHCFG_n_LOEN_SHIFT,
Kojto 71:53949e6131f6 224 DMAC3_CHCFG_n_LOEN);
Kojto 71:53949e6131f6 225
Kojto 71:53949e6131f6 226 /* ---- Set factor by specified on-chip peripheral module request ---- */
Kojto 71:53949e6131f6 227 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 228 usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
Kojto 71:53949e6131f6 229 DMAC3_CHCFG_n_AM_SHIFT,
Kojto 71:53949e6131f6 230 DMAC3_CHCFG_n_AM);
Kojto 71:53949e6131f6 231 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 232 usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
Kojto 71:53949e6131f6 233 DMAC3_CHCFG_n_LVL_SHIFT,
Kojto 71:53949e6131f6 234 DMAC3_CHCFG_n_LVL);
Kojto 71:53949e6131f6 235
Kojto 71:53949e6131f6 236 if (usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
Kojto 71:53949e6131f6 237 {
Kojto 71:53949e6131f6 238 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 239 usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
Kojto 71:53949e6131f6 240 DMAC3_CHCFG_n_REQD_SHIFT,
Kojto 71:53949e6131f6 241 DMAC3_CHCFG_n_REQD);
Kojto 71:53949e6131f6 242 }
Kojto 71:53949e6131f6 243 else
Kojto 71:53949e6131f6 244 {
Kojto 71:53949e6131f6 245 RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
Kojto 71:53949e6131f6 246 req_direction,
Kojto 71:53949e6131f6 247 DMAC3_CHCFG_n_REQD_SHIFT,
Kojto 71:53949e6131f6 248 DMAC3_CHCFG_n_REQD);
Kojto 71:53949e6131f6 249 }
Kojto 71:53949e6131f6 250
Kojto 71:53949e6131f6 251 RZA_IO_RegWrite_32(&DMAC23.DMARS,
Kojto 71:53949e6131f6 252 usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
Kojto 71:53949e6131f6 253 DMAC23_DMARS_CH3_RID_SHIFT,
Kojto 71:53949e6131f6 254 DMAC23_DMARS_CH3_RID);
Kojto 71:53949e6131f6 255 RZA_IO_RegWrite_32(&DMAC23.DMARS,
Kojto 71:53949e6131f6 256 usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
Kojto 71:53949e6131f6 257 DMAC23_DMARS_CH3_MID_SHIFT,
Kojto 71:53949e6131f6 258 DMAC23_DMARS_CH3_MID);
Kojto 71:53949e6131f6 259
Kojto 71:53949e6131f6 260 /* PR : Round robin mode */
Kojto 71:53949e6131f6 261 RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
Kojto 71:53949e6131f6 262 1,
Kojto 71:53949e6131f6 263 DMAC07_DCTRL_0_7_PR_SHIFT,
Kojto 71:53949e6131f6 264 DMAC07_DCTRL_0_7_PR);
Kojto 71:53949e6131f6 265 }
Kojto 71:53949e6131f6 266 }
Kojto 71:53949e6131f6 267
Kojto 71:53949e6131f6 268 /*******************************************************************************
Kojto 71:53949e6131f6 269 * Function Name: usb1_function_DMAC3_Open
Kojto 71:53949e6131f6 270 * Description : Enables DMAC channel 3 transfer.
Kojto 71:53949e6131f6 271 * Arguments : uint32_t req : DMAC request mode
Kojto 71:53949e6131f6 272 * Return Value : 0 : Succeeded in enabling DMA transfer
Kojto 71:53949e6131f6 273 * : -1 : Failed to enable DMA transfer (due to DMA operation)
Kojto 71:53949e6131f6 274 *******************************************************************************/
Kojto 71:53949e6131f6 275 int32_t usb1_function_DMAC3_Open (uint32_t req)
Kojto 71:53949e6131f6 276 {
Kojto 71:53949e6131f6 277 int32_t ret;
Kojto 71:53949e6131f6 278 volatile uint8_t dummy;
Kojto 71:53949e6131f6 279
Kojto 71:53949e6131f6 280 /* Transferable? */
Kojto 71:53949e6131f6 281 if ((0 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
Kojto 71:53949e6131f6 282 DMAC3_CHSTAT_n_EN_SHIFT,
Kojto 71:53949e6131f6 283 DMAC3_CHSTAT_n_EN)) &&
Kojto 71:53949e6131f6 284 (0 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
Kojto 71:53949e6131f6 285 DMAC3_CHSTAT_n_TACT_SHIFT,
Kojto 71:53949e6131f6 286 DMAC3_CHSTAT_n_TACT)))
Kojto 71:53949e6131f6 287 {
Kojto 71:53949e6131f6 288 /* Clear Channel Status Register */
Kojto 71:53949e6131f6 289 RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
Kojto 71:53949e6131f6 290 1,
Kojto 71:53949e6131f6 291 DMAC3_CHCTRL_n_SWRST_SHIFT,
Kojto 71:53949e6131f6 292 DMAC3_CHCTRL_n_SWRST);
Kojto 71:53949e6131f6 293 dummy = RZA_IO_RegRead_32(&DMAC3.CHCTRL_n,
Kojto 71:53949e6131f6 294 DMAC3_CHCTRL_n_SWRST_SHIFT,
Kojto 71:53949e6131f6 295 DMAC3_CHCTRL_n_SWRST);
Kojto 71:53949e6131f6 296 /* Enable DMA transfer */
Kojto 71:53949e6131f6 297 RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
Kojto 71:53949e6131f6 298 1,
Kojto 71:53949e6131f6 299 DMAC3_CHCTRL_n_SETEN_SHIFT,
Kojto 71:53949e6131f6 300 DMAC3_CHCTRL_n_SETEN);
Kojto 71:53949e6131f6 301
Kojto 71:53949e6131f6 302 /* ---- Request by software ---- */
Kojto 71:53949e6131f6 303 if (DMAC_REQ_MODE_SOFT == req)
Kojto 71:53949e6131f6 304 {
Kojto 71:53949e6131f6 305 /* DMA transfer Request by software */
Kojto 71:53949e6131f6 306 RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
Kojto 71:53949e6131f6 307 1,
Kojto 71:53949e6131f6 308 DMAC3_CHCTRL_n_STG_SHIFT,
Kojto 71:53949e6131f6 309 DMAC3_CHCTRL_n_STG);
Kojto 71:53949e6131f6 310 }
Kojto 71:53949e6131f6 311
Kojto 71:53949e6131f6 312 ret = 0;
Kojto 71:53949e6131f6 313 }
Kojto 71:53949e6131f6 314 else
Kojto 71:53949e6131f6 315 {
Kojto 71:53949e6131f6 316 ret = -1;
Kojto 71:53949e6131f6 317 }
Kojto 71:53949e6131f6 318
Kojto 71:53949e6131f6 319 return ret;
Kojto 71:53949e6131f6 320 }
Kojto 71:53949e6131f6 321
Kojto 71:53949e6131f6 322 /*******************************************************************************
Kojto 71:53949e6131f6 323 * Function Name: usb1_function_DMAC3_Close
Kojto 71:53949e6131f6 324 * Description : Aborts DMAC channel 3 transfer. Returns the remaining transfer
Kojto 71:53949e6131f6 325 * : byte count at the time of DMA transfer abort to the argument
Kojto 71:53949e6131f6 326 * : *remain.
Kojto 71:53949e6131f6 327 * Arguments : uint32_t * remain : Remaining transfer byte count when
Kojto 71:53949e6131f6 328 * : : DMA transfer is aborted
Kojto 71:53949e6131f6 329 * Return Value : none
Kojto 71:53949e6131f6 330 *******************************************************************************/
Kojto 71:53949e6131f6 331 void usb1_function_DMAC3_Close (uint32_t * remain)
Kojto 71:53949e6131f6 332 {
Kojto 71:53949e6131f6 333
Kojto 71:53949e6131f6 334 /* ==== Abort transfer ==== */
Kojto 71:53949e6131f6 335 RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
Kojto 71:53949e6131f6 336 1,
Kojto 71:53949e6131f6 337 DMAC3_CHCTRL_n_CLREN_SHIFT,
Kojto 71:53949e6131f6 338 DMAC3_CHCTRL_n_CLREN);
Kojto 71:53949e6131f6 339
Kojto 71:53949e6131f6 340 while (1 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
Kojto 71:53949e6131f6 341 DMAC3_CHSTAT_n_TACT_SHIFT,
Kojto 71:53949e6131f6 342 DMAC3_CHSTAT_n_TACT))
Kojto 71:53949e6131f6 343 {
Kojto 71:53949e6131f6 344 /* Loop until transfer is aborted */
Kojto 71:53949e6131f6 345 }
Kojto 71:53949e6131f6 346
Kojto 71:53949e6131f6 347 while (1 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
Kojto 71:53949e6131f6 348 DMAC3_CHSTAT_n_EN_SHIFT,
Kojto 71:53949e6131f6 349 DMAC3_CHSTAT_n_EN))
Kojto 71:53949e6131f6 350 {
Kojto 71:53949e6131f6 351 /* Loop until 0 is set in EN before checking the remaining transfer byte count */
Kojto 71:53949e6131f6 352 }
Kojto 71:53949e6131f6 353 /* ==== Obtain remaining transfer byte count ==== */
Kojto 71:53949e6131f6 354 *remain = DMAC3.CRTB_n;
Kojto 71:53949e6131f6 355 }
Kojto 71:53949e6131f6 356
Kojto 71:53949e6131f6 357 /*******************************************************************************
Kojto 71:53949e6131f6 358 * Function Name: usb1_function_DMAC3_Load_Set
Kojto 71:53949e6131f6 359 * Description : Sets the transfer source address, transfer destination
Kojto 71:53949e6131f6 360 * : address, and total transfer byte count respectively
Kojto 71:53949e6131f6 361 * : specified by the argument src_addr, dst_addr, and count to
Kojto 71:53949e6131f6 362 * : DMAC channel 3 as DMA transfer information.
Kojto 71:53949e6131f6 363 * : Sets the register set selected by the CHCFG_n register
Kojto 71:53949e6131f6 364 * : RSEL bit from the Next0 or Next1 register set.
Kojto 71:53949e6131f6 365 * : This function should be called when DMA transfer of DMAC
Kojto 71:53949e6131f6 366 * : channel 3 is aboted.
Kojto 71:53949e6131f6 367 * Arguments : uint32_t src_addr : Transfer source address
Kojto 71:53949e6131f6 368 * : uint32_t dst_addr : Transfer destination address
Kojto 71:53949e6131f6 369 * : uint32_t count : Total transfer byte count
Kojto 71:53949e6131f6 370 * Return Value : none
Kojto 71:53949e6131f6 371 *******************************************************************************/
Kojto 71:53949e6131f6 372 void usb1_function_DMAC3_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
Kojto 71:53949e6131f6 373 {
Kojto 71:53949e6131f6 374 uint8_t reg_set;
Kojto 71:53949e6131f6 375
Kojto 71:53949e6131f6 376 /* Obtain register set in use */
Kojto 71:53949e6131f6 377 reg_set = RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
Kojto 71:53949e6131f6 378 DMAC3_CHSTAT_n_SR_SHIFT,
Kojto 71:53949e6131f6 379 DMAC3_CHSTAT_n_SR);
Kojto 71:53949e6131f6 380
Kojto 71:53949e6131f6 381 /* ==== Load ==== */
Kojto 71:53949e6131f6 382 if (0 == reg_set)
Kojto 71:53949e6131f6 383 {
Kojto 71:53949e6131f6 384 /* ---- Next0 Register Set ---- */
Kojto 71:53949e6131f6 385 DMAC3.N0SA_n = src_addr; /* Start address of transfer source */
Kojto 71:53949e6131f6 386 DMAC3.N0DA_n = dst_addr; /* Start address of transfer destination */
Kojto 71:53949e6131f6 387 DMAC3.N0TB_n = count; /* Total transfer byte count */
Kojto 71:53949e6131f6 388 }
Kojto 71:53949e6131f6 389 else
Kojto 71:53949e6131f6 390 {
Kojto 71:53949e6131f6 391 /* ---- Next1 Register Set ---- */
Kojto 71:53949e6131f6 392 DMAC3.N1SA_n = src_addr; /* Start address of transfer source */
Kojto 71:53949e6131f6 393 DMAC3.N1DA_n = dst_addr; /* Start address of transfer destination */
Kojto 71:53949e6131f6 394 DMAC3.N1TB_n = count; /* Total transfer byte count */
Kojto 71:53949e6131f6 395 }
Kojto 71:53949e6131f6 396 }
Kojto 71:53949e6131f6 397
Kojto 71:53949e6131f6 398 /*******************************************************************************
Kojto 71:53949e6131f6 399 * Function Name: usb1_function_DMAC4_PeriReqInit
Kojto 71:53949e6131f6 400 * Description : Sets the register mode for DMA mode and the on-chip peripheral
Kojto 71:53949e6131f6 401 * : module request for transfer request for DMAC channel 2.
Kojto 71:53949e6131f6 402 * : Executes DMAC initial setting using the DMA information
Kojto 71:53949e6131f6 403 * : specified by the argument *trans_info and the enabled/disabled
Kojto 71:53949e6131f6 404 * : continuous transfer specified by the argument continuation.
Kojto 71:53949e6131f6 405 * : Registers DMAC channel 2 interrupt handler function and sets
Kojto 71:53949e6131f6 406 * : the interrupt priority level. Then enables transfer completion
Kojto 71:53949e6131f6 407 * : interrupt.
Kojto 71:53949e6131f6 408 * Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
Kojto 71:53949e6131f6 409 * : : register
Kojto 71:53949e6131f6 410 * : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
Kojto 71:53949e6131f6 411 * : uint32_t continuation : Set continuous transfer to be valid
Kojto 71:53949e6131f6 412 * : : after DMA transfer has been completed
Kojto 71:53949e6131f6 413 * : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
Kojto 71:53949e6131f6 414 * : DMAC_SAMPLE_SINGLE : Do not execute continuous
Kojto 71:53949e6131f6 415 * : : transfer
Kojto 71:53949e6131f6 416 * : uint32_t request_factor : Factor for on-chip peripheral module
Kojto 71:53949e6131f6 417 * : : request
Kojto 71:53949e6131f6 418 * : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
Kojto 71:53949e6131f6 419 * : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
Kojto 71:53949e6131f6 420 * : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
Kojto 71:53949e6131f6 421 * : :
Kojto 71:53949e6131f6 422 * : uint32_t req_direction : Setting value of CHCFG_n register
Kojto 71:53949e6131f6 423 * : : REQD bit
Kojto 71:53949e6131f6 424 *******************************************************************************/
Kojto 71:53949e6131f6 425 void usb1_function_DMAC4_PeriReqInit (const dmac_transinfo_t * trans_info,
Kojto 71:53949e6131f6 426 uint32_t dmamode, uint32_t continuation,
Kojto 71:53949e6131f6 427 uint32_t request_factor, uint32_t req_direction)
Kojto 71:53949e6131f6 428 {
Kojto 71:53949e6131f6 429 /* ==== Register mode ==== */
Kojto 71:53949e6131f6 430 if (DMAC_MODE_REGISTER == dmamode)
Kojto 71:53949e6131f6 431 {
Kojto 71:53949e6131f6 432 /* ==== Next0 register set ==== */
Kojto 71:53949e6131f6 433 DMAC4.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
Kojto 71:53949e6131f6 434 DMAC4.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
Kojto 71:53949e6131f6 435 DMAC4.N0TB_n = trans_info->count; /* Total transfer byte count */
Kojto 71:53949e6131f6 436
Kojto 71:53949e6131f6 437 /* DAD : Transfer destination address counting direction */
Kojto 71:53949e6131f6 438 /* SAD : Transfer source address counting direction */
Kojto 71:53949e6131f6 439 /* DDS : Transfer destination transfer size */
Kojto 71:53949e6131f6 440 /* SDS : Transfer source transfer size */
Kojto 71:53949e6131f6 441 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 442 trans_info->daddr_dir,
Kojto 71:53949e6131f6 443 DMAC4_CHCFG_n_DAD_SHIFT,
Kojto 71:53949e6131f6 444 DMAC4_CHCFG_n_DAD);
Kojto 71:53949e6131f6 445 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 446 trans_info->saddr_dir,
Kojto 71:53949e6131f6 447 DMAC4_CHCFG_n_SAD_SHIFT,
Kojto 71:53949e6131f6 448 DMAC4_CHCFG_n_SAD);
Kojto 71:53949e6131f6 449 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 450 trans_info->dst_size,
Kojto 71:53949e6131f6 451 DMAC4_CHCFG_n_DDS_SHIFT,
Kojto 71:53949e6131f6 452 DMAC4_CHCFG_n_DDS);
Kojto 71:53949e6131f6 453 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 454 trans_info->src_size,
Kojto 71:53949e6131f6 455 DMAC4_CHCFG_n_SDS_SHIFT,
Kojto 71:53949e6131f6 456 DMAC4_CHCFG_n_SDS);
Kojto 71:53949e6131f6 457
Kojto 71:53949e6131f6 458 /* DMS : Register mode */
Kojto 71:53949e6131f6 459 /* RSEL : Select Next0 register set */
Kojto 71:53949e6131f6 460 /* SBE : No discharge of buffer data when aborted */
Kojto 71:53949e6131f6 461 /* DEM : No DMA interrupt mask */
Kojto 71:53949e6131f6 462 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 463 0,
Kojto 71:53949e6131f6 464 DMAC4_CHCFG_n_DMS_SHIFT,
Kojto 71:53949e6131f6 465 DMAC4_CHCFG_n_DMS);
Kojto 71:53949e6131f6 466 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 467 0,
Kojto 71:53949e6131f6 468 DMAC4_CHCFG_n_RSEL_SHIFT,
Kojto 71:53949e6131f6 469 DMAC4_CHCFG_n_RSEL);
Kojto 71:53949e6131f6 470 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 471 0,
Kojto 71:53949e6131f6 472 DMAC4_CHCFG_n_SBE_SHIFT,
Kojto 71:53949e6131f6 473 DMAC4_CHCFG_n_SBE);
Kojto 71:53949e6131f6 474 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 475 0,
Kojto 71:53949e6131f6 476 DMAC4_CHCFG_n_DEM_SHIFT,
Kojto 71:53949e6131f6 477 DMAC4_CHCFG_n_DEM);
Kojto 71:53949e6131f6 478
Kojto 71:53949e6131f6 479 /* ---- Continuous transfer ---- */
Kojto 71:53949e6131f6 480 if (DMAC_SAMPLE_CONTINUATION == continuation)
Kojto 71:53949e6131f6 481 {
Kojto 71:53949e6131f6 482 /* REN : Execute continuous transfer */
Kojto 71:53949e6131f6 483 /* RSW : Change register set when DMA transfer is completed. */
Kojto 71:53949e6131f6 484 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 485 1,
Kojto 71:53949e6131f6 486 DMAC4_CHCFG_n_REN_SHIFT,
Kojto 71:53949e6131f6 487 DMAC4_CHCFG_n_REN);
Kojto 71:53949e6131f6 488 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 489 1,
Kojto 71:53949e6131f6 490 DMAC4_CHCFG_n_RSW_SHIFT,
Kojto 71:53949e6131f6 491 DMAC4_CHCFG_n_RSW);
Kojto 71:53949e6131f6 492 }
Kojto 71:53949e6131f6 493 /* ---- Single transfer ---- */
Kojto 71:53949e6131f6 494 else
Kojto 71:53949e6131f6 495 {
Kojto 71:53949e6131f6 496 /* REN : Do not execute continuous transfer */
Kojto 71:53949e6131f6 497 /* RSW : Do not change register set when DMA transfer is completed. */
Kojto 71:53949e6131f6 498 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 499 0,
Kojto 71:53949e6131f6 500 DMAC4_CHCFG_n_REN_SHIFT,
Kojto 71:53949e6131f6 501 DMAC4_CHCFG_n_REN);
Kojto 71:53949e6131f6 502 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 503 0,
Kojto 71:53949e6131f6 504 DMAC4_CHCFG_n_RSW_SHIFT,
Kojto 71:53949e6131f6 505 DMAC4_CHCFG_n_RSW);
Kojto 71:53949e6131f6 506 }
Kojto 71:53949e6131f6 507
Kojto 71:53949e6131f6 508 /* TM : Single transfer */
Kojto 71:53949e6131f6 509 /* SEL : Channel setting */
Kojto 71:53949e6131f6 510 /* HIEN, LOEN : On-chip peripheral module request */
Kojto 71:53949e6131f6 511 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 512 0,
Kojto 71:53949e6131f6 513 DMAC4_CHCFG_n_TM_SHIFT,
Kojto 71:53949e6131f6 514 DMAC4_CHCFG_n_TM);
Kojto 71:53949e6131f6 515 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 516 4,
Kojto 71:53949e6131f6 517 DMAC4_CHCFG_n_SEL_SHIFT,
Kojto 71:53949e6131f6 518 DMAC4_CHCFG_n_SEL);
Kojto 71:53949e6131f6 519 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 520 1,
Kojto 71:53949e6131f6 521 DMAC4_CHCFG_n_HIEN_SHIFT,
Kojto 71:53949e6131f6 522 DMAC4_CHCFG_n_HIEN);
Kojto 71:53949e6131f6 523 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 524 0,
Kojto 71:53949e6131f6 525 DMAC4_CHCFG_n_LOEN_SHIFT,
Kojto 71:53949e6131f6 526 DMAC4_CHCFG_n_LOEN);
Kojto 71:53949e6131f6 527
Kojto 71:53949e6131f6 528 /* ---- Set factor by specified on-chip peripheral module request ---- */
Kojto 71:53949e6131f6 529 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 530 usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
Kojto 71:53949e6131f6 531 DMAC4_CHCFG_n_AM_SHIFT,
Kojto 71:53949e6131f6 532 DMAC4_CHCFG_n_AM);
Kojto 71:53949e6131f6 533 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 534 usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
Kojto 71:53949e6131f6 535 DMAC4_CHCFG_n_LVL_SHIFT,
Kojto 71:53949e6131f6 536 DMAC4_CHCFG_n_LVL);
Kojto 71:53949e6131f6 537 if (usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
Kojto 71:53949e6131f6 538 {
Kojto 71:53949e6131f6 539 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 540 usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
Kojto 71:53949e6131f6 541 DMAC4_CHCFG_n_REQD_SHIFT,
Kojto 71:53949e6131f6 542 DMAC4_CHCFG_n_REQD);
Kojto 71:53949e6131f6 543 }
Kojto 71:53949e6131f6 544 else
Kojto 71:53949e6131f6 545 {
Kojto 71:53949e6131f6 546 RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
Kojto 71:53949e6131f6 547 req_direction,
Kojto 71:53949e6131f6 548 DMAC4_CHCFG_n_REQD_SHIFT,
Kojto 71:53949e6131f6 549 DMAC4_CHCFG_n_REQD);
Kojto 71:53949e6131f6 550 }
Kojto 71:53949e6131f6 551 RZA_IO_RegWrite_32(&DMAC45.DMARS,
Kojto 71:53949e6131f6 552 usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
Kojto 71:53949e6131f6 553 DMAC45_DMARS_CH4_RID_SHIFT,
Kojto 71:53949e6131f6 554 DMAC45_DMARS_CH4_RID);
Kojto 71:53949e6131f6 555 RZA_IO_RegWrite_32(&DMAC45.DMARS,
Kojto 71:53949e6131f6 556 usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
Kojto 71:53949e6131f6 557 DMAC45_DMARS_CH4_MID_SHIFT,
Kojto 71:53949e6131f6 558 DMAC45_DMARS_CH4_MID);
Kojto 71:53949e6131f6 559
Kojto 71:53949e6131f6 560 /* PR : Round robin mode */
Kojto 71:53949e6131f6 561 RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
Kojto 71:53949e6131f6 562 1,
Kojto 71:53949e6131f6 563 DMAC07_DCTRL_0_7_PR_SHIFT,
Kojto 71:53949e6131f6 564 DMAC07_DCTRL_0_7_PR);
Kojto 71:53949e6131f6 565 }
Kojto 71:53949e6131f6 566 }
Kojto 71:53949e6131f6 567
Kojto 71:53949e6131f6 568 /*******************************************************************************
Kojto 71:53949e6131f6 569 * Function Name: usb1_function_DMAC4_Open
Kojto 71:53949e6131f6 570 * Description : Enables DMAC channel 4 transfer.
Kojto 71:53949e6131f6 571 * Arguments : uint32_t req : DMAC request mode
Kojto 71:53949e6131f6 572 * Return Value : 0 : Succeeded in enabling DMA transfer
Kojto 71:53949e6131f6 573 * : -1 : Failed to enable DMA transfer (due to DMA operation)
Kojto 71:53949e6131f6 574 *******************************************************************************/
Kojto 71:53949e6131f6 575 int32_t usb1_function_DMAC4_Open (uint32_t req)
Kojto 71:53949e6131f6 576 {
Kojto 71:53949e6131f6 577 int32_t ret;
Kojto 71:53949e6131f6 578 volatile uint8_t dummy;
Kojto 71:53949e6131f6 579
Kojto 71:53949e6131f6 580 /* Transferable? */
Kojto 71:53949e6131f6 581 if ((0 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
Kojto 71:53949e6131f6 582 DMAC4_CHSTAT_n_EN_SHIFT,
Kojto 71:53949e6131f6 583 DMAC4_CHSTAT_n_EN)) &&
Kojto 71:53949e6131f6 584 (0 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
Kojto 71:53949e6131f6 585 DMAC4_CHSTAT_n_TACT_SHIFT,
Kojto 71:53949e6131f6 586 DMAC4_CHSTAT_n_TACT)))
Kojto 71:53949e6131f6 587 {
Kojto 71:53949e6131f6 588 /* Clear Channel Status Register */
Kojto 71:53949e6131f6 589 RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
Kojto 71:53949e6131f6 590 1,
Kojto 71:53949e6131f6 591 DMAC4_CHCTRL_n_SWRST_SHIFT,
Kojto 71:53949e6131f6 592 DMAC4_CHCTRL_n_SWRST);
Kojto 71:53949e6131f6 593 dummy = RZA_IO_RegRead_32(&DMAC4.CHCTRL_n,
Kojto 71:53949e6131f6 594 DMAC4_CHCTRL_n_SWRST_SHIFT,
Kojto 71:53949e6131f6 595 DMAC4_CHCTRL_n_SWRST);
Kojto 71:53949e6131f6 596 /* Enable DMA transfer */
Kojto 71:53949e6131f6 597 RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
Kojto 71:53949e6131f6 598 1,
Kojto 71:53949e6131f6 599 DMAC4_CHCTRL_n_SETEN_SHIFT,
Kojto 71:53949e6131f6 600 DMAC4_CHCTRL_n_SETEN);
Kojto 71:53949e6131f6 601
Kojto 71:53949e6131f6 602 /* ---- Request by software ---- */
Kojto 71:53949e6131f6 603 if (DMAC_REQ_MODE_SOFT == req)
Kojto 71:53949e6131f6 604 {
Kojto 71:53949e6131f6 605 /* DMA transfer Request by software */
Kojto 71:53949e6131f6 606 RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
Kojto 71:53949e6131f6 607 1,
Kojto 71:53949e6131f6 608 DMAC4_CHCTRL_n_STG_SHIFT,
Kojto 71:53949e6131f6 609 DMAC4_CHCTRL_n_STG);
Kojto 71:53949e6131f6 610 }
Kojto 71:53949e6131f6 611
Kojto 71:53949e6131f6 612 ret = 0;
Kojto 71:53949e6131f6 613 }
Kojto 71:53949e6131f6 614 else
Kojto 71:53949e6131f6 615 {
Kojto 71:53949e6131f6 616 ret = -1;
Kojto 71:53949e6131f6 617 }
Kojto 71:53949e6131f6 618
Kojto 71:53949e6131f6 619 return ret;
Kojto 71:53949e6131f6 620 }
Kojto 71:53949e6131f6 621
Kojto 71:53949e6131f6 622 /*******************************************************************************
Kojto 71:53949e6131f6 623 * Function Name: usb1_function_DMAC4_Close
Kojto 71:53949e6131f6 624 * Description : Aborts DMAC channel 4 transfer. Returns the remaining transfer
Kojto 71:53949e6131f6 625 * : byte count at the time of DMA transfer abort to the argument
Kojto 71:53949e6131f6 626 * : *remain.
Kojto 71:53949e6131f6 627 * Arguments : uint32_t * remain : Remaining transfer byte count when
Kojto 71:53949e6131f6 628 * : : DMA transfer is aborted
Kojto 71:53949e6131f6 629 * Return Value : none
Kojto 71:53949e6131f6 630 *******************************************************************************/
Kojto 71:53949e6131f6 631 void usb1_function_DMAC4_Close (uint32_t * remain)
Kojto 71:53949e6131f6 632 {
Kojto 71:53949e6131f6 633
Kojto 71:53949e6131f6 634 /* ==== Abort transfer ==== */
Kojto 71:53949e6131f6 635 RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
Kojto 71:53949e6131f6 636 1,
Kojto 71:53949e6131f6 637 DMAC4_CHCTRL_n_CLREN_SHIFT,
Kojto 71:53949e6131f6 638 DMAC4_CHCTRL_n_CLREN);
Kojto 71:53949e6131f6 639
Kojto 71:53949e6131f6 640 while (1 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
Kojto 71:53949e6131f6 641 DMAC4_CHSTAT_n_TACT_SHIFT,
Kojto 71:53949e6131f6 642 DMAC4_CHSTAT_n_TACT))
Kojto 71:53949e6131f6 643 {
Kojto 71:53949e6131f6 644 /* Loop until transfer is aborted */
Kojto 71:53949e6131f6 645 }
Kojto 71:53949e6131f6 646
Kojto 71:53949e6131f6 647 while (1 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
Kojto 71:53949e6131f6 648 DMAC4_CHSTAT_n_EN_SHIFT,
Kojto 71:53949e6131f6 649 DMAC4_CHSTAT_n_EN))
Kojto 71:53949e6131f6 650 {
Kojto 71:53949e6131f6 651 /* Loop until 0 is set in EN before checking the remaining transfer byte count */
Kojto 71:53949e6131f6 652 }
Kojto 71:53949e6131f6 653 /* ==== Obtain remaining transfer byte count ==== */
Kojto 71:53949e6131f6 654 *remain = DMAC4.CRTB_n;
Kojto 71:53949e6131f6 655 }
Kojto 71:53949e6131f6 656
Kojto 71:53949e6131f6 657 /*******************************************************************************
Kojto 71:53949e6131f6 658 * Function Name: usb1_function_DMAC4_Load_Set
Kojto 71:53949e6131f6 659 * Description : Sets the transfer source address, transfer destination
Kojto 71:53949e6131f6 660 * : address, and total transfer byte count respectively
Kojto 71:53949e6131f6 661 * : specified by the argument src_addr, dst_addr, and count to
Kojto 71:53949e6131f6 662 * : DMAC channel 4 as DMA transfer information.
Kojto 71:53949e6131f6 663 * : Sets the register set selected by the CHCFG_n register
Kojto 71:53949e6131f6 664 * : RSEL bit from the Next0 or Next1 register set.
Kojto 71:53949e6131f6 665 * : This function should be called when DMA transfer of DMAC
Kojto 71:53949e6131f6 666 * : channel 4 is aboted.
Kojto 71:53949e6131f6 667 * Arguments : uint32_t src_addr : Transfer source address
Kojto 71:53949e6131f6 668 * : uint32_t dst_addr : Transfer destination address
Kojto 71:53949e6131f6 669 * : uint32_t count : Total transfer byte count
Kojto 71:53949e6131f6 670 * Return Value : none
Kojto 71:53949e6131f6 671 *******************************************************************************/
Kojto 71:53949e6131f6 672 void usb1_function_DMAC4_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
Kojto 71:53949e6131f6 673 {
Kojto 71:53949e6131f6 674 uint8_t reg_set;
Kojto 71:53949e6131f6 675
Kojto 71:53949e6131f6 676 /* Obtain register set in use */
Kojto 71:53949e6131f6 677 reg_set = RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
Kojto 71:53949e6131f6 678 DMAC4_CHSTAT_n_SR_SHIFT,
Kojto 71:53949e6131f6 679 DMAC4_CHSTAT_n_SR);
Kojto 71:53949e6131f6 680
Kojto 71:53949e6131f6 681 /* ==== Load ==== */
Kojto 71:53949e6131f6 682 if (0 == reg_set)
Kojto 71:53949e6131f6 683 {
Kojto 71:53949e6131f6 684 /* ---- Next0 Register Set ---- */
Kojto 71:53949e6131f6 685 DMAC4.N0SA_n = src_addr; /* Start address of transfer source */
Kojto 71:53949e6131f6 686 DMAC4.N0DA_n = dst_addr; /* Start address of transfer destination */
Kojto 71:53949e6131f6 687 DMAC4.N0TB_n = count; /* Total transfer byte count */
Kojto 71:53949e6131f6 688 }
Kojto 71:53949e6131f6 689 else
Kojto 71:53949e6131f6 690 {
Kojto 71:53949e6131f6 691 /* ---- Next1 Register Set ---- */
Kojto 71:53949e6131f6 692 DMAC4.N1SA_n = src_addr; /* Start address of transfer source */
Kojto 71:53949e6131f6 693 DMAC4.N1DA_n = dst_addr; /* Start address of transfer destination */
Kojto 71:53949e6131f6 694 DMAC4.N1TB_n = count; /* Total transfer byte count */
Kojto 71:53949e6131f6 695 }
Kojto 71:53949e6131f6 696 }
Kojto 71:53949e6131f6 697
Kojto 71:53949e6131f6 698 /* End of File */