MRD Lab / SpindleBot_1_5b

A code for the spindling of bots.

Dependencies:   MX12 ServoRingBuffer mbed-src

Fork of SpindleBot by MRD Lab

SDFileSystem/SDFileSystem.cpp@14:7c5beaa9fb01, 2015-08-13 (annotated)

Committer:
labmrd
Date:
Thu Aug 13 17:55:40 2015 +0000
Revision:
14:7c5beaa9fb01
Parent:
4:e44ac08027bd 
This revision marks Mark's mark of resignation from the labmrd mbed account.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
labmrd 4:e44ac08027bd 1 /* mbed Microcontroller Library
labmrd 4:e44ac08027bd 2 * Copyright (c) 2006-2012 ARM Limited
labmrd 4:e44ac08027bd 3 *
labmrd 4:e44ac08027bd 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
labmrd 4:e44ac08027bd 5 * of this software and associated documentation files (the "Software"), to deal
labmrd 4:e44ac08027bd 6 * in the Software without restriction, including without limitation the rights
labmrd 4:e44ac08027bd 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
labmrd 4:e44ac08027bd 8 * copies of the Software, and to permit persons to whom the Software is
labmrd 4:e44ac08027bd 9 * furnished to do so, subject to the following conditions:
labmrd 4:e44ac08027bd 10 *
labmrd 4:e44ac08027bd 11 * The above copyright notice and this permission notice shall be included in
labmrd 4:e44ac08027bd 12 * all copies or substantial portions of the Software.
labmrd 4:e44ac08027bd 13 *
labmrd 4:e44ac08027bd 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
labmrd 4:e44ac08027bd 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
labmrd 4:e44ac08027bd 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
labmrd 4:e44ac08027bd 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
labmrd 4:e44ac08027bd 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
labmrd 4:e44ac08027bd 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
labmrd 4:e44ac08027bd 20 * SOFTWARE.
labmrd 4:e44ac08027bd 21 */
labmrd 4:e44ac08027bd 22
labmrd 4:e44ac08027bd 23 /* Introduction
labmrd 4:e44ac08027bd 24 * ------------
labmrd 4:e44ac08027bd 25 * SD and MMC cards support a number of interfaces, but common to them all
labmrd 4:e44ac08027bd 26 * is one based on SPI. This is the one I'm implmenting because it means
labmrd 4:e44ac08027bd 27 * it is much more portable even though not so performant, and we already
labmrd 4:e44ac08027bd 28 * have the mbed SPI Interface!
labmrd 4:e44ac08027bd 29 *
labmrd 4:e44ac08027bd 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
labmrd 4:e44ac08027bd 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
labmrd 4:e44ac08027bd 32 *
labmrd 4:e44ac08027bd 33 * SPI Startup
labmrd 4:e44ac08027bd 34 * -----------
labmrd 4:e44ac08027bd 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
labmrd 4:e44ac08027bd 36 * asserting CS low and sending the reset command (CMD0). The card will
labmrd 4:e44ac08027bd 37 * respond with a (R1) response.
labmrd 4:e44ac08027bd 38 *
labmrd 4:e44ac08027bd 39 * CMD8 is optionally sent to determine the voltage range supported, and
labmrd 4:e44ac08027bd 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
labmrd 4:e44ac08027bd 41 * version 2.x. I'll just ignore this for now.
labmrd 4:e44ac08027bd 42 *
labmrd 4:e44ac08027bd 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
labmrd 4:e44ac08027bd 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
labmrd 4:e44ac08027bd 45 *
labmrd 4:e44ac08027bd 46 * You should also indicate whether the host supports High Capicity cards,
labmrd 4:e44ac08027bd 47 * and check whether the card is high capacity - i'll also ignore this
labmrd 4:e44ac08027bd 48 *
labmrd 4:e44ac08027bd 49 * SPI Protocol
labmrd 4:e44ac08027bd 50 * ------------
labmrd 4:e44ac08027bd 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
labmrd 4:e44ac08027bd 52 * the host starting every bus transaction by asserting the CS signal low. The
labmrd 4:e44ac08027bd 53 * card always responds to commands, data blocks and errors.
labmrd 4:e44ac08027bd 54 *
labmrd 4:e44ac08027bd 55 * The protocol supports a CRC, but by default it is off (except for the
labmrd 4:e44ac08027bd 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
labmrd 4:e44ac08027bd 57 * I'll leave the CRC off I think!
labmrd 4:e44ac08027bd 58 *
labmrd 4:e44ac08027bd 59 * Standard capacity cards have variable data block sizes, whereas High
labmrd 4:e44ac08027bd 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
labmrd 4:e44ac08027bd 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
labmrd 4:e44ac08027bd 62 * This is set with CMD16.
labmrd 4:e44ac08027bd 63 *
labmrd 4:e44ac08027bd 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
labmrd 4:e44ac08027bd 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
labmrd 4:e44ac08027bd 66 * the card gets a read command, it responds with a response token, and then
labmrd 4:e44ac08027bd 67 * a data token or an error.
labmrd 4:e44ac08027bd 68 *
labmrd 4:e44ac08027bd 69 * SPI Command Format
labmrd 4:e44ac08027bd 70 * ------------------
labmrd 4:e44ac08027bd 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
labmrd 4:e44ac08027bd 72 *
labmrd 4:e44ac08027bd 73 * +---------------+------------+------------+-----------+----------+--------------+
labmrd 4:e44ac08027bd 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
labmrd 4:e44ac08027bd 75 * +---------------+------------+------------+-----------+----------+--------------+
labmrd 4:e44ac08027bd 76 *
labmrd 4:e44ac08027bd 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
labmrd 4:e44ac08027bd 78 *
labmrd 4:e44ac08027bd 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
labmrd 4:e44ac08027bd 80 *
labmrd 4:e44ac08027bd 81 * SPI Response Format
labmrd 4:e44ac08027bd 82 * -------------------
labmrd 4:e44ac08027bd 83 * The main response format (R1) is a status byte (normally zero). Key flags:
labmrd 4:e44ac08027bd 84 * idle - 1 if the card is in an idle state/initialising
labmrd 4:e44ac08027bd 85 * cmd - 1 if an illegal command code was detected
labmrd 4:e44ac08027bd 86 *
labmrd 4:e44ac08027bd 87 * +-------------------------------------------------+
labmrd 4:e44ac08027bd 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
labmrd 4:e44ac08027bd 89 * +-------------------------------------------------+
labmrd 4:e44ac08027bd 90 *
labmrd 4:e44ac08027bd 91 * R1b is the same, except it is followed by a busy signal (zeros) until
labmrd 4:e44ac08027bd 92 * the first non-zero byte when it is ready again.
labmrd 4:e44ac08027bd 93 *
labmrd 4:e44ac08027bd 94 * Data Response Token
labmrd 4:e44ac08027bd 95 * -------------------
labmrd 4:e44ac08027bd 96 * Every data block written to the card is acknowledged by a byte
labmrd 4:e44ac08027bd 97 * response token
labmrd 4:e44ac08027bd 98 *
labmrd 4:e44ac08027bd 99 * +----------------------+
labmrd 4:e44ac08027bd 100 * | xxx | 0 | status | 1 |
labmrd 4:e44ac08027bd 101 * +----------------------+
labmrd 4:e44ac08027bd 102 * 010 - OK!
labmrd 4:e44ac08027bd 103 * 101 - CRC Error
labmrd 4:e44ac08027bd 104 * 110 - Write Error
labmrd 4:e44ac08027bd 105 *
labmrd 4:e44ac08027bd 106 * Single Block Read and Write
labmrd 4:e44ac08027bd 107 * ---------------------------
labmrd 4:e44ac08027bd 108 *
labmrd 4:e44ac08027bd 109 * Block transfers have a byte header, followed by the data, followed
labmrd 4:e44ac08027bd 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
labmrd 4:e44ac08027bd 111 *
labmrd 4:e44ac08027bd 112 * +------+---------+---------+- - - -+---------+-----------+----------+
labmrd 4:e44ac08027bd 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
labmrd 4:e44ac08027bd 114 * +------+---------+---------+- - - -+---------+-----------+----------+
labmrd 4:e44ac08027bd 115 */
labmrd 4:e44ac08027bd 116 #include "SDFileSystem.h"
labmrd 4:e44ac08027bd 117 #include "mbed_debug.h"
labmrd 4:e44ac08027bd 118
labmrd 4:e44ac08027bd 119 #define SD_COMMAND_TIMEOUT 5000
labmrd 4:e44ac08027bd 120
labmrd 4:e44ac08027bd 121 #define SD_DBG 0
labmrd 4:e44ac08027bd 122
labmrd 4:e44ac08027bd 123 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
labmrd 4:e44ac08027bd 124 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
labmrd 4:e44ac08027bd 125 _cs = 1;
labmrd 4:e44ac08027bd 126 }
labmrd 4:e44ac08027bd 127
labmrd 4:e44ac08027bd 128 #define R1_IDLE_STATE (1 << 0)
labmrd 4:e44ac08027bd 129 #define R1_ERASE_RESET (1 << 1)
labmrd 4:e44ac08027bd 130 #define R1_ILLEGAL_COMMAND (1 << 2)
labmrd 4:e44ac08027bd 131 #define R1_COM_CRC_ERROR (1 << 3)
labmrd 4:e44ac08027bd 132 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
labmrd 4:e44ac08027bd 133 #define R1_ADDRESS_ERROR (1 << 5)
labmrd 4:e44ac08027bd 134 #define R1_PARAMETER_ERROR (1 << 6)
labmrd 4:e44ac08027bd 135
labmrd 4:e44ac08027bd 136 // Types
labmrd 4:e44ac08027bd 137 #define SDCARD_FAIL 0 //!< v1.x Standard Capacity
labmrd 4:e44ac08027bd 138 #define SDCARD_V1 1 //!< v2.x Standard Capacity
labmrd 4:e44ac08027bd 139 #define SDCARD_V2 2 //!< v2.x High Capacity
labmrd 4:e44ac08027bd 140 #define SDCARD_V2HC 3 //!< Not recognised as an SD Card
labmrd 4:e44ac08027bd 141
labmrd 4:e44ac08027bd 142 int SDFileSystem::initialise_card() {
labmrd 4:e44ac08027bd 143 // Set to 100kHz for initialisation, and clock card with cs = 1
labmrd 4:e44ac08027bd 144 _spi.frequency(100000);
labmrd 4:e44ac08027bd 145 _cs = 1;
labmrd 4:e44ac08027bd 146 for (int i = 0; i < 16; i++) {
labmrd 4:e44ac08027bd 147 _spi.write(0xFF);
labmrd 4:e44ac08027bd 148 }
labmrd 4:e44ac08027bd 149
labmrd 4:e44ac08027bd 150 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
labmrd 4:e44ac08027bd 151 if (_cmd(0, 0) != R1_IDLE_STATE) {
labmrd 4:e44ac08027bd 152 debug("No disk, or could not put SD card in to SPI idle state\n");
labmrd 4:e44ac08027bd 153 return SDCARD_FAIL;
labmrd 4:e44ac08027bd 154 }
labmrd 4:e44ac08027bd 155
labmrd 4:e44ac08027bd 156 // send CMD8 to determine whther it is ver 2.x
labmrd 4:e44ac08027bd 157 int r = _cmd8();
labmrd 4:e44ac08027bd 158 if (r == R1_IDLE_STATE) {
labmrd 4:e44ac08027bd 159 return initialise_card_v2();
labmrd 4:e44ac08027bd 160 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
labmrd 4:e44ac08027bd 161 return initialise_card_v1();
labmrd 4:e44ac08027bd 162 } else {
labmrd 4:e44ac08027bd 163 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
labmrd 4:e44ac08027bd 164 return SDCARD_FAIL;
labmrd 4:e44ac08027bd 165 }
labmrd 4:e44ac08027bd 166 }
labmrd 4:e44ac08027bd 167
labmrd 4:e44ac08027bd 168 int SDFileSystem::initialise_card_v1() {
labmrd 4:e44ac08027bd 169 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
labmrd 4:e44ac08027bd 170 _cmd(55, 0);
labmrd 4:e44ac08027bd 171 if (_cmd(41, 0) == 0) {
labmrd 4:e44ac08027bd 172 cdv = 512;
labmrd 4:e44ac08027bd 173 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
labmrd 4:e44ac08027bd 174 return SDCARD_V1;
labmrd 4:e44ac08027bd 175 }
labmrd 4:e44ac08027bd 176 }
labmrd 4:e44ac08027bd 177
labmrd 4:e44ac08027bd 178 debug("Timeout waiting for v1.x card\n");
labmrd 4:e44ac08027bd 179 return SDCARD_FAIL;
labmrd 4:e44ac08027bd 180 }
labmrd 4:e44ac08027bd 181
labmrd 4:e44ac08027bd 182 int SDFileSystem::initialise_card_v2() {
labmrd 4:e44ac08027bd 183 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
labmrd 4:e44ac08027bd 184 wait_ms(50);
labmrd 4:e44ac08027bd 185 _cmd58();
labmrd 4:e44ac08027bd 186 _cmd(55, 0);
labmrd 4:e44ac08027bd 187 if (_cmd(41, 0x40000000) == 0) {
labmrd 4:e44ac08027bd 188 _cmd58();
labmrd 4:e44ac08027bd 189 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
labmrd 4:e44ac08027bd 190 cdv = 1;
labmrd 4:e44ac08027bd 191 return SDCARD_V2;
labmrd 4:e44ac08027bd 192 }
labmrd 4:e44ac08027bd 193 }
labmrd 4:e44ac08027bd 194
labmrd 4:e44ac08027bd 195 debug("Timeout waiting for v2.x card\n");
labmrd 4:e44ac08027bd 196 return SDCARD_FAIL;
labmrd 4:e44ac08027bd 197 }
labmrd 4:e44ac08027bd 198
labmrd 4:e44ac08027bd 199 int SDFileSystem::disk_initialize() {
labmrd 4:e44ac08027bd 200 int i = initialise_card();
labmrd 4:e44ac08027bd 201 debug_if(SD_DBG, "init card = %d\n", i);
labmrd 4:e44ac08027bd 202 _sectors = _sd_sectors();
labmrd 4:e44ac08027bd 203
labmrd 4:e44ac08027bd 204 // Set block length to 512 (CMD16)
labmrd 4:e44ac08027bd 205 if (_cmd(16, 512) != 0) {
labmrd 4:e44ac08027bd 206 debug("Set 512-byte block timed out\n");
labmrd 4:e44ac08027bd 207 return 1;
labmrd 4:e44ac08027bd 208 }
labmrd 4:e44ac08027bd 209
labmrd 4:e44ac08027bd 210 _spi.frequency(8000000); // Set to 8MHz for data transfer
labmrd 4:e44ac08027bd 211 return 0;
labmrd 4:e44ac08027bd 212 }
labmrd 4:e44ac08027bd 213
labmrd 4:e44ac08027bd 214 int SDFileSystem::disk_write(const uint8_t *buffer, uint64_t block_number) {
labmrd 4:e44ac08027bd 215 // set write address for single block (CMD24)
labmrd 4:e44ac08027bd 216 if (_cmd(24, block_number * cdv) != 0) {
labmrd 4:e44ac08027bd 217 return 1;
labmrd 4:e44ac08027bd 218 }
labmrd 4:e44ac08027bd 219
labmrd 4:e44ac08027bd 220 // send the data block
labmrd 4:e44ac08027bd 221 _write(buffer, 512);
labmrd 4:e44ac08027bd 222 return 0;
labmrd 4:e44ac08027bd 223 }
labmrd 4:e44ac08027bd 224
labmrd 4:e44ac08027bd 225 int SDFileSystem::disk_read(uint8_t *buffer, uint64_t block_number) {
labmrd 4:e44ac08027bd 226 // set read address for single block (CMD17)
labmrd 4:e44ac08027bd 227 if (_cmd(17, block_number * cdv) != 0) {
labmrd 4:e44ac08027bd 228 return 1;
labmrd 4:e44ac08027bd 229 }
labmrd 4:e44ac08027bd 230
labmrd 4:e44ac08027bd 231 // receive the data
labmrd 4:e44ac08027bd 232 _read(buffer, 512);
labmrd 4:e44ac08027bd 233 return 0;
labmrd 4:e44ac08027bd 234 }
labmrd 4:e44ac08027bd 235
labmrd 4:e44ac08027bd 236 int SDFileSystem::disk_status() { return 0; }
labmrd 4:e44ac08027bd 237 int SDFileSystem::disk_sync() { return 0; }
labmrd 4:e44ac08027bd 238 uint64_t SDFileSystem::disk_sectors() { return _sectors; }
labmrd 4:e44ac08027bd 239
labmrd 4:e44ac08027bd 240
labmrd 4:e44ac08027bd 241 // PRIVATE FUNCTIONS
labmrd 4:e44ac08027bd 242 int SDFileSystem::_cmd(int cmd, int arg) {
labmrd 4:e44ac08027bd 243 _cs = 0;
labmrd 4:e44ac08027bd 244
labmrd 4:e44ac08027bd 245 // send a command
labmrd 4:e44ac08027bd 246 _spi.write(0x40 | cmd);
labmrd 4:e44ac08027bd 247 _spi.write(arg >> 24);
labmrd 4:e44ac08027bd 248 _spi.write(arg >> 16);
labmrd 4:e44ac08027bd 249 _spi.write(arg >> 8);
labmrd 4:e44ac08027bd 250 _spi.write(arg >> 0);
labmrd 4:e44ac08027bd 251 _spi.write(0x95);
labmrd 4:e44ac08027bd 252
labmrd 4:e44ac08027bd 253 // wait for the repsonse (response[7] == 0)
labmrd 4:e44ac08027bd 254 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
labmrd 4:e44ac08027bd 255 int response = _spi.write(0xFF);
labmrd 4:e44ac08027bd 256 if (!(response & 0x80)) {
labmrd 4:e44ac08027bd 257 _cs = 1;
labmrd 4:e44ac08027bd 258 _spi.write(0xFF);
labmrd 4:e44ac08027bd 259 return response;
labmrd 4:e44ac08027bd 260 }
labmrd 4:e44ac08027bd 261 }
labmrd 4:e44ac08027bd 262 _cs = 1;
labmrd 4:e44ac08027bd 263 _spi.write(0xFF);
labmrd 4:e44ac08027bd 264 return -1; // timeout
labmrd 4:e44ac08027bd 265 }
labmrd 4:e44ac08027bd 266 int SDFileSystem::_cmdx(int cmd, int arg) {
labmrd 4:e44ac08027bd 267 _cs = 0;
labmrd 4:e44ac08027bd 268
labmrd 4:e44ac08027bd 269 // send a command
labmrd 4:e44ac08027bd 270 _spi.write(0x40 | cmd);
labmrd 4:e44ac08027bd 271 _spi.write(arg >> 24);
labmrd 4:e44ac08027bd 272 _spi.write(arg >> 16);
labmrd 4:e44ac08027bd 273 _spi.write(arg >> 8);
labmrd 4:e44ac08027bd 274 _spi.write(arg >> 0);
labmrd 4:e44ac08027bd 275 _spi.write(0x95);
labmrd 4:e44ac08027bd 276
labmrd 4:e44ac08027bd 277 // wait for the repsonse (response[7] == 0)
labmrd 4:e44ac08027bd 278 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
labmrd 4:e44ac08027bd 279 int response = _spi.write(0xFF);
labmrd 4:e44ac08027bd 280 if (!(response & 0x80)) {
labmrd 4:e44ac08027bd 281 return response;
labmrd 4:e44ac08027bd 282 }
labmrd 4:e44ac08027bd 283 }
labmrd 4:e44ac08027bd 284 _cs = 1;
labmrd 4:e44ac08027bd 285 _spi.write(0xFF);
labmrd 4:e44ac08027bd 286 return -1; // timeout
labmrd 4:e44ac08027bd 287 }
labmrd 4:e44ac08027bd 288
labmrd 4:e44ac08027bd 289
labmrd 4:e44ac08027bd 290 int SDFileSystem::_cmd58() {
labmrd 4:e44ac08027bd 291 _cs = 0;
labmrd 4:e44ac08027bd 292 int arg = 0;
labmrd 4:e44ac08027bd 293
labmrd 4:e44ac08027bd 294 // send a command
labmrd 4:e44ac08027bd 295 _spi.write(0x40 | 58);
labmrd 4:e44ac08027bd 296 _spi.write(arg >> 24);
labmrd 4:e44ac08027bd 297 _spi.write(arg >> 16);
labmrd 4:e44ac08027bd 298 _spi.write(arg >> 8);
labmrd 4:e44ac08027bd 299 _spi.write(arg >> 0);
labmrd 4:e44ac08027bd 300 _spi.write(0x95);
labmrd 4:e44ac08027bd 301
labmrd 4:e44ac08027bd 302 // wait for the repsonse (response[7] == 0)
labmrd 4:e44ac08027bd 303 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
labmrd 4:e44ac08027bd 304 int response = _spi.write(0xFF);
labmrd 4:e44ac08027bd 305 if (!(response & 0x80)) {
labmrd 4:e44ac08027bd 306 int ocr = _spi.write(0xFF) << 24;
labmrd 4:e44ac08027bd 307 ocr |= _spi.write(0xFF) << 16;
labmrd 4:e44ac08027bd 308 ocr |= _spi.write(0xFF) << 8;
labmrd 4:e44ac08027bd 309 ocr |= _spi.write(0xFF) << 0;
labmrd 4:e44ac08027bd 310 _cs = 1;
labmrd 4:e44ac08027bd 311 _spi.write(0xFF);
labmrd 4:e44ac08027bd 312 return response;
labmrd 4:e44ac08027bd 313 }
labmrd 4:e44ac08027bd 314 }
labmrd 4:e44ac08027bd 315 _cs = 1;
labmrd 4:e44ac08027bd 316 _spi.write(0xFF);
labmrd 4:e44ac08027bd 317 return -1; // timeout
labmrd 4:e44ac08027bd 318 }
labmrd 4:e44ac08027bd 319
labmrd 4:e44ac08027bd 320 int SDFileSystem::_cmd8() {
labmrd 4:e44ac08027bd 321 _cs = 0;
labmrd 4:e44ac08027bd 322
labmrd 4:e44ac08027bd 323 // send a command
labmrd 4:e44ac08027bd 324 _spi.write(0x40 | 8); // CMD8
labmrd 4:e44ac08027bd 325 _spi.write(0x00); // reserved
labmrd 4:e44ac08027bd 326 _spi.write(0x00); // reserved
labmrd 4:e44ac08027bd 327 _spi.write(0x01); // 3.3v
labmrd 4:e44ac08027bd 328 _spi.write(0xAA); // check pattern
labmrd 4:e44ac08027bd 329 _spi.write(0x87); // crc
labmrd 4:e44ac08027bd 330
labmrd 4:e44ac08027bd 331 // wait for the repsonse (response[7] == 0)
labmrd 4:e44ac08027bd 332 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
labmrd 4:e44ac08027bd 333 char response[5];
labmrd 4:e44ac08027bd 334 response[0] = _spi.write(0xFF);
labmrd 4:e44ac08027bd 335 if (!(response[0] & 0x80)) {
labmrd 4:e44ac08027bd 336 for (int j = 1; j < 5; j++) {
labmrd 4:e44ac08027bd 337 response[i] = _spi.write(0xFF);
labmrd 4:e44ac08027bd 338 }
labmrd 4:e44ac08027bd 339 _cs = 1;
labmrd 4:e44ac08027bd 340 _spi.write(0xFF);
labmrd 4:e44ac08027bd 341 return response[0];
labmrd 4:e44ac08027bd 342 }
labmrd 4:e44ac08027bd 343 }
labmrd 4:e44ac08027bd 344 _cs = 1;
labmrd 4:e44ac08027bd 345 _spi.write(0xFF);
labmrd 4:e44ac08027bd 346 return -1; // timeout
labmrd 4:e44ac08027bd 347 }
labmrd 4:e44ac08027bd 348
labmrd 4:e44ac08027bd 349 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
labmrd 4:e44ac08027bd 350 _cs = 0;
labmrd 4:e44ac08027bd 351
labmrd 4:e44ac08027bd 352 // read until start byte (0xFF)
labmrd 4:e44ac08027bd 353 while (_spi.write(0xFF) != 0xFE);
labmrd 4:e44ac08027bd 354
labmrd 4:e44ac08027bd 355 // read data
labmrd 4:e44ac08027bd 356 for (int i = 0; i < length; i++) {
labmrd 4:e44ac08027bd 357 buffer[i] = _spi.write(0xFF);
labmrd 4:e44ac08027bd 358 }
labmrd 4:e44ac08027bd 359 _spi.write(0xFF); // checksum
labmrd 4:e44ac08027bd 360 _spi.write(0xFF);
labmrd 4:e44ac08027bd 361
labmrd 4:e44ac08027bd 362 _cs = 1;
labmrd 4:e44ac08027bd 363 _spi.write(0xFF);
labmrd 4:e44ac08027bd 364 return 0;
labmrd 4:e44ac08027bd 365 }
labmrd 4:e44ac08027bd 366
labmrd 4:e44ac08027bd 367 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
labmrd 4:e44ac08027bd 368 _cs = 0;
labmrd 4:e44ac08027bd 369
labmrd 4:e44ac08027bd 370 // indicate start of block
labmrd 4:e44ac08027bd 371 _spi.write(0xFE);
labmrd 4:e44ac08027bd 372
labmrd 4:e44ac08027bd 373 // write the data
labmrd 4:e44ac08027bd 374 for (int i = 0; i < length; i++) {
labmrd 4:e44ac08027bd 375 _spi.write(buffer[i]);
labmrd 4:e44ac08027bd 376 }
labmrd 4:e44ac08027bd 377
labmrd 4:e44ac08027bd 378 // write the checksum
labmrd 4:e44ac08027bd 379 _spi.write(0xFF);
labmrd 4:e44ac08027bd 380 _spi.write(0xFF);
labmrd 4:e44ac08027bd 381
labmrd 4:e44ac08027bd 382 // check the response token
labmrd 4:e44ac08027bd 383 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
labmrd 4:e44ac08027bd 384 _cs = 1;
labmrd 4:e44ac08027bd 385 _spi.write(0xFF);
labmrd 4:e44ac08027bd 386 return 1;
labmrd 4:e44ac08027bd 387 }
labmrd 4:e44ac08027bd 388
labmrd 4:e44ac08027bd 389 // wait for write to finish
labmrd 4:e44ac08027bd 390 while (_spi.write(0xFF) == 0);
labmrd 4:e44ac08027bd 391
labmrd 4:e44ac08027bd 392 _cs = 1;
labmrd 4:e44ac08027bd 393 _spi.write(0xFF);
labmrd 4:e44ac08027bd 394 return 0;
labmrd 4:e44ac08027bd 395 }
labmrd 4:e44ac08027bd 396
labmrd 4:e44ac08027bd 397 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
labmrd 4:e44ac08027bd 398 uint32_t bits = 0;
labmrd 4:e44ac08027bd 399 uint32_t size = 1 + msb - lsb;
labmrd 4:e44ac08027bd 400 for (int i = 0; i < size; i++) {
labmrd 4:e44ac08027bd 401 uint32_t position = lsb + i;
labmrd 4:e44ac08027bd 402 uint32_t byte = 15 - (position >> 3);
labmrd 4:e44ac08027bd 403 uint32_t bit = position & 0x7;
labmrd 4:e44ac08027bd 404 uint32_t value = (data[byte] >> bit) & 1;
labmrd 4:e44ac08027bd 405 bits |= value << i;
labmrd 4:e44ac08027bd 406 }
labmrd 4:e44ac08027bd 407 return bits;
labmrd 4:e44ac08027bd 408 }
labmrd 4:e44ac08027bd 409
labmrd 4:e44ac08027bd 410 uint64_t SDFileSystem::_sd_sectors() {
labmrd 4:e44ac08027bd 411 uint32_t c_size, c_size_mult, read_bl_len;
labmrd 4:e44ac08027bd 412 uint32_t block_len, mult, blocknr, capacity;
labmrd 4:e44ac08027bd 413 uint32_t hc_c_size;
labmrd 4:e44ac08027bd 414 uint64_t blocks;
labmrd 4:e44ac08027bd 415
labmrd 4:e44ac08027bd 416 // CMD9, Response R2 (R1 byte + 16-byte block read)
labmrd 4:e44ac08027bd 417 if (_cmdx(9, 0) != 0) {
labmrd 4:e44ac08027bd 418 debug("Didn't get a response from the disk\n");
labmrd 4:e44ac08027bd 419 return 0;
labmrd 4:e44ac08027bd 420 }
labmrd 4:e44ac08027bd 421
labmrd 4:e44ac08027bd 422 uint8_t csd[16];
labmrd 4:e44ac08027bd 423 if (_read(csd, 16) != 0) {
labmrd 4:e44ac08027bd 424 debug("Couldn't read csd response from disk\n");
labmrd 4:e44ac08027bd 425 return 0;
labmrd 4:e44ac08027bd 426 }
labmrd 4:e44ac08027bd 427
labmrd 4:e44ac08027bd 428 // csd_structure : csd[127:126]
labmrd 4:e44ac08027bd 429 // c_size : csd[73:62]
labmrd 4:e44ac08027bd 430 // c_size_mult : csd[49:47]
labmrd 4:e44ac08027bd 431 // read_bl_len : csd[83:80] - the *maximum* read block length
labmrd 4:e44ac08027bd 432
labmrd 4:e44ac08027bd 433 int csd_structure = ext_bits(csd, 127, 126);
labmrd 4:e44ac08027bd 434
labmrd 4:e44ac08027bd 435 switch (csd_structure) {
labmrd 4:e44ac08027bd 436 case 0:
labmrd 4:e44ac08027bd 437 cdv = 512;
labmrd 4:e44ac08027bd 438 c_size = ext_bits(csd, 73, 62);
labmrd 4:e44ac08027bd 439 c_size_mult = ext_bits(csd, 49, 47);
labmrd 4:e44ac08027bd 440 read_bl_len = ext_bits(csd, 83, 80);
labmrd 4:e44ac08027bd 441
labmrd 4:e44ac08027bd 442 block_len = 1 << read_bl_len;
labmrd 4:e44ac08027bd 443 mult = 1 << (c_size_mult + 2);
labmrd 4:e44ac08027bd 444 blocknr = (c_size + 1) * mult;
labmrd 4:e44ac08027bd 445 capacity = blocknr * block_len;
labmrd 4:e44ac08027bd 446 blocks = capacity / 512;
labmrd 4:e44ac08027bd 447 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
labmrd 4:e44ac08027bd 448 break;
labmrd 4:e44ac08027bd 449
labmrd 4:e44ac08027bd 450 case 1:
labmrd 4:e44ac08027bd 451 cdv = 1;
labmrd 4:e44ac08027bd 452 hc_c_size = ext_bits(csd, 63, 48);
labmrd 4:e44ac08027bd 453 blocks = (hc_c_size+1)*1024;
labmrd 4:e44ac08027bd 454 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
labmrd 4:e44ac08027bd 455 break;
labmrd 4:e44ac08027bd 456
labmrd 4:e44ac08027bd 457 default:
labmrd 4:e44ac08027bd 458 debug("CSD struct unsupported\r\n");
labmrd 4:e44ac08027bd 459 return 0;
labmrd 4:e44ac08027bd 460 };
labmrd 4:e44ac08027bd 461 return blocks;
labmrd 4:e44ac08027bd 462 }