KENYA YANAGIHARA / Mbed 2 deprecated CQ_KIT_Ver1_5_IHM07M1

CQ_KIT_Ver1_5

Dependencies:   mbed RateLimiter BLDCmotorDriverCQ_KIT_Ver1_5

X_NUCLEO_IHM07M1/x_nucleo_ihm07m1_targets.h@10:5fbe1476624c, 2016-10-19 (annotated)

Committer:
avilei
Date:
Wed Oct 19 09:30:46 2016 +0000
Revision:
10:5fbe1476624c
Parent:
2:4ae769d0b112
Child:
13:038b62c7ac17
Add definitions for X-NUCLEO-IHM07M1 pins

Who changed what in which revision?

UserRevisionLine numberNew contents of line
avilei 2:4ae769d0b112 1 /* mbed Microcontroller Library
avilei 2:4ae769d0b112 2 * Copyright (c) 2006-2016 ARM Limited
avilei 2:4ae769d0b112 3 *
avilei 2:4ae769d0b112 4 * Licensed under the Apache License, Version 2.0 (the "License");
avilei 2:4ae769d0b112 5 * you may not use this file except in compliance with the License.
avilei 2:4ae769d0b112 6 * You may obtain a copy of the License at
avilei 2:4ae769d0b112 7 *
avilei 2:4ae769d0b112 8 * http://www.apache.org/licenses/LICENSE-2.0
avilei 2:4ae769d0b112 9 *
avilei 2:4ae769d0b112 10 * Unless required by applicable law or agreed to in writing, software
avilei 2:4ae769d0b112 11 * distributed under the License is distributed on an "AS IS" BASIS,
avilei 2:4ae769d0b112 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
avilei 2:4ae769d0b112 13 * See the License for the specific language governing permissions and
avilei 2:4ae769d0b112 14 * limitations under the License.
avilei 2:4ae769d0b112 15 */
avilei 2:4ae769d0b112 16
avilei 2:4ae769d0b112 17 /**
avilei 2:4ae769d0b112 18 ******************************************************************************
avilei 2:4ae769d0b112 19 * @file x_nucleo_ihm07m1_targets.h
avilei 2:4ae769d0b112 20 * @author STMicroelectronics
avilei 2:4ae769d0b112 21 * @brief Header file with pin definitions for X-NUCLEO-IHM07M1 board
avilei 2:4ae769d0b112 22 ******************************************************************************
avilei 2:4ae769d0b112 23 * @copy
avilei 2:4ae769d0b112 24 *
avilei 2:4ae769d0b112 25 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
avilei 2:4ae769d0b112 26 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
avilei 2:4ae769d0b112 27 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
avilei 2:4ae769d0b112 28 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
avilei 2:4ae769d0b112 29 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
avilei 2:4ae769d0b112 30 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
avilei 2:4ae769d0b112 31 *
avilei 2:4ae769d0b112 32 * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
avilei 2:4ae769d0b112 33 */
avilei 2:4ae769d0b112 34
avilei 2:4ae769d0b112 35 /* Define to prevent from recursive inclusion --------------------------------*/
avilei 2:4ae769d0b112 36 #ifndef __X_NUCLEO_IHM07M1_TARGETS_H_
avilei 2:4ae769d0b112 37 #define __X_NUCLEO_IHM07M1_TARGETS_H_
avilei 2:4ae769d0b112 38
avilei 10:5fbe1476624c 39 // Default pin configuration for X-NUCLEO-IHM07M1 with STM32 Nucleo-64 boards
avilei 10:5fbe1476624c 40
avilei 10:5fbe1476624c 41 // Logic input pins
avilei 2:4ae769d0b112 42 #define P_IN1 PA_8
avilei 2:4ae769d0b112 43 #define P_IN2 PA_9
avilei 2:4ae769d0b112 44 #define P_IN3 PA_10
avilei 10:5fbe1476624c 45
avilei 10:5fbe1476624c 46 // Enable channel pins
avilei 2:4ae769d0b112 47 #define P_EN1 PC_10
avilei 2:4ae769d0b112 48 #define P_EN2 PC_11
avilei 2:4ae769d0b112 49 #define P_EN3 PC_12
avilei 10:5fbe1476624c 50
avilei 10:5fbe1476624c 51 // Hall sensors pins
avilei 2:4ae769d0b112 52 #define P_HALL1 PA_15
avilei 2:4ae769d0b112 53 #define P_HALL2 PB_3
avilei 2:4ae769d0b112 54 #define P_HALL3 PB_10
avilei 10:5fbe1476624c 55
avilei 10:5fbe1476624c 56 // Temperature pin
avilei 10:5fbe1476624c 57 #define P_TEMP PC_2
avilei 10:5fbe1476624c 58
avilei 10:5fbe1476624c 59 // Fault LED
avilei 2:4ae769d0b112 60 #define P_FAULT PB_2
avilei 2:4ae769d0b112 61
avilei 10:5fbe1476624c 62 // Speed potentiometer
avilei 10:5fbe1476624c 63 #define P_SPEED PB_1
avilei 10:5fbe1476624c 64
avilei 10:5fbe1476624c 65 // Back EMF pins
avilei 10:5fbe1476624c 66 #define P_BEMF1 PC_3
avilei 10:5fbe1476624c 67 #define P_BEMF2 PB_0
avilei 10:5fbe1476624c 68 #define P_BEMF3 PA_7
avilei 10:5fbe1476624c 69
avilei 10:5fbe1476624c 70 // Current pins
avilei 10:5fbe1476624c 71 #define P_CURR1 PA_0
avilei 10:5fbe1476624c 72 #define P_CURR2 PC_1
avilei 10:5fbe1476624c 73 #define P_CURR3 PC_0
avilei 10:5fbe1476624c 74
avilei 10:5fbe1476624c 75 // Voltage bus pin
avilei 10:5fbe1476624c 76 #define P_VBUS PA_1
avilei 10:5fbe1476624c 77
avilei 2:4ae769d0b112 78 #endif // __X_NUCLEO_IHM07M1_TARGETS_H_