File content as of revision 13:d0d1da1fae4c:

/*
 * mbed Application program for the mbed
 *      Library differ part (This is only information document)
 *
 * Copyright (c) 2014,'15 Kenji Arai / JH1PJL
 *  http://www.page.sannet.ne.jp/kenjia/index.html
 *  http://mbed.org/users/kenjiArai/
 *      Created: May       14th, 2015
 *      Revised: May       20th, 2015
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
 * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
 
#if 0   ///////////////////////////////////////////////////////////////////////////////////////////

//-------------------------------------------------------------------------------------------------
// ----- Hardware configuration ---------------
//-------------------------------------------------------------------------------------------------
 
// Direct connection between below two pins.
//     DAC0 output connected to ADC1 input
PA_4 : PA_1
//     DAC1 to ADC3
PA_5 : PB_0
//     I2C1 master connected to I2C2 slave
PB_8 : PB_10  // Need 3.3Kohm pull-up
PB_9 : PB_11  // Need 3.3Kohm pull-up
// Connecetd with CR network
// LED's connected each pin with R=330Ohm to GND
PC_2
PC_3
PC_10
PC_11
PC_12

//-------------------------------------------------------------------------------------------------
// ----- Software Modification ---------------
//-------------------------------------------------------------------------------------------------
//  SUMMARY information
//  Nucleo_rtos_sample
    + debug_tools_L152_F4x1RE           <- Created as new lib.
        + SetRTC                        <- Lib. updated by myself
//      + files
    + mbed-rtos                         <- Rev.77 (checked on May 16, 2015)
//      + rtos
//      + rtx
//          + TARGET_CORTEX_M
                + RTX_Conf_CM.c         <- (1)  Need to modify before compile by yourself
//              + DIRs & Files
//      + DIRs & Files + DIRs & Files
    + mbe-src                           <- Rev.541 (checked on May 16, 2015)
//      + targets
//          + cmsis
//              + TARGET_STM
//                  + TARGET_STM32L1
//                      + TARGET_NUCLEO_L152RE
//                          + system_stm32l1xx.c
                                        <- (2)  Need to modify before compile by yourself
//                          + DIRs & Files
//          + hal
//              + TARGET_STM
//                  + TARGET_STM32F4
//                          + rtc_api.c
                                        <- (3)  Need to modify before compile by yourself
//                          + DIRs & Files
//                  + TARGET_NUCLEO_L152RE
//                          + rtc_api.c
                                        <- (4)  Need to modify before compile by yourself
//                          + DIRs & Files
//      + DIR & Files + DIRs & Files + DIRs & Files

(1) CAUTION!! for Nucleo L152RE mbed
L152 mbed has following setting both mbed lib. and mbed-src lib.
System Clock = 24 MHz (started as 32 MHz but due to USB clock creation, changed to 24 MHz)
If you would like to use 24 MHz, do NOT modify (1) and (2).

As of May 20th, 2015
Followings are investigation result.
 Case L152 (C-01 old ver with internal RC clock)
    before and rev.81 20140319  -> 16000000Hz
    rev.82 and after  20140407  -> 32000000Hz
 Case L152 (C-02 new ver)
    before and rev.81 20140319  -> 16000000Hz
    rev.82 and after  20140407  -> 24000000Hz

Currently L152RE has two type of operation, 24MHz and 32MHz.

-> Need to set below
Case: Use HSE 8MHz                      -> PLLMUL x 12
Case: Use HSI(internal RC clock) 16MHz  -> PLLMUL x 6

PLL VCO Frequency = 96MHz (8MHz x12 or 16MHz x 6)
PLLDIV /3
System Clock = 96/3 = 32MHz
USB Clock = 96/2(2 is fixed divider) = 48MHz


(2) CAUTION!! for Nucleo F411RE mbed
F411 med has been changed System clock = 96 MHz (former setting 100 MHz).
Please modify #ifndef OS_CLOCK related part.

//-------------------------------------------------------------------------------------------------
//  (1) /mbed-rtos/mbed-rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
//-------------------------------------------------------------------------------------------------
// Insert & Modifiy (from line 118)
/*
//  Insert (below 2 lines)
#elif defined(TARGET_STM32L152RE)
//#    define OS_CLOCK       24000000
#    define OS_CLOCK       32000000
//  Modify (100MHz to 96MHz)
#  elif defined(TARGET_STM32F411RE)
#     define OS_CLOCK      96000000
*/
// Copy & Paste from next line
#ifndef OS_CLOCK
#  if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
#    define OS_CLOCK       96000000

#  elif defined(TARGET_LPC1347) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) || defined(TARGET_STM32F303RE)
#    define OS_CLOCK       72000000

#  elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401)  || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO)  || defined(TARGET_LPC1114) || defined(TARGET_KL25Z) \
     || defined(TARGET_KL05Z) || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F051R8) || defined(TARGET_LPC11U68) || defined(TARGET_STM32F072RB) || defined(TARGET_STM32F091RC)
#    define OS_CLOCK       48000000

#  elif defined(TARGET_LPC812)
#    define OS_CLOCK       36000000

#  elif defined(TARGET_LPC824)
#    define OS_CLOCK       30000000

#  elif  defined(TARGET_STM32F100RB)
#    define OS_CLOCK       24000000

#  elif defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_K64F) || defined(TARGET_K22F)
#    define OS_CLOCK       120000000

#  elif defined(TARGET_LPC4330)
#    define OS_CLOCK       204000000

#  elif defined(TARGET_LPC4337)
#    define OS_CLOCK       204000000

#  elif defined(TARGET_STM32F407) || defined(TARGET_F407VG)
#    define OS_CLOCK       168000000

#  elif defined(TARGET_STM32F401RE)
#    define OS_CLOCK       84000000

#  elif defined(TARGET_STM32F411RE)
#     define OS_CLOCK      96000000

#elif defined(TARGET_STM32F103RB) 
#    define OS_CLOCK       72000000

#elif defined(TARGET_STM32F429ZI)
#    define OS_CLOCK       168000000

#elif defined(TARGET_STM32F302R8)
#    define OS_CLOCK       64000000

#elif defined(TARGET_STM32L053R8) || defined(TARGET_STM32L053C8)
#    define OS_CLOCK       32000000

#elif defined(TARGET_STM32F401VC)
#    define OS_CLOCK       84000000

#elif defined(TARGET_MAX32610) || defined(TARGET_MAX32600)
#    define OS_CLOCK       24000000

#elif defined(TARGET_STM32L152RE)
//#    define OS_CLOCK       24000000
#    define OS_CLOCK       32000000

#  else
#    error "no target defined"
#  endif
#endif

//   <o>Timer tick value [us] <1-1000000>
//   <i> Defines the timer tick value.
//   <i> Default: 1000  (1ms)
#ifndef OS_TICK
 #define OS_TICK        1000
#endif
// to above line

//-------------------------------------------------------------------------------------------------
//  (2) /mbed-src/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/system_stm32l1xx.c
//-------------------------------------------------------------------------------------------------
// Comment line
// Modify (from line 24)
// Copy & Paste from next line
#if 0
  *-----------------------------------------------------------------------------
  * System clock source                | 1- PLL_HSE_EXTC        | 3- PLL_HSI
  *                                    | (external 8 MHz clock) | (internal 16 MHz)
  *                                    | 2- PLL_HSE_XTAL        |
  *                                    | (external 8 MHz xtal)  |
  *-----------------------------------------------------------------------------
  * SYSCLK(MHz)                        | 24                     | 32
  *-----------------------------------------------------------------------------
  * AHBCLK (MHz)                       | 24                     | 32
  *-----------------------------------------------------------------------------
  * APB1CLK (MHz)                      | 24                     | 32
  *-----------------------------------------------------------------------------
  * APB2CLK (MHz)                      | 24                     | 32
  *-----------------------------------------------------------------------------
  * USB capable (48 MHz precise clock) | YES                    | NO
  *-----------------------------------------------------------------------------
#else
  *-----------------------------------------------------------------------------
  * System clock source                | 1- PLL_HSE_EXTC        | 3- PLL_HSI
  *                                    | (external 8 MHz clock) | (internal 16 MHz)
  *                                    | 2- PLL_HSE_XTAL        |
  *                                    | (external 8 MHz xtal)  |
  *-----------------------------------------------------------------------------
  * SYSCLK(MHz)                        | 32                     | 32
  *-----------------------------------------------------------------------------
  * AHBCLK (MHz)                       | 32                     | 32
  *-----------------------------------------------------------------------------
  * APB1CLK (MHz)                      | 32                     | 32
  *-----------------------------------------------------------------------------
  * APB2CLK (MHz)                      | 32                     | 32
  *-----------------------------------------------------------------------------
  * USB capable (48 MHz precise clock) | YES                    | ?(48MHz but?)
  *-----------------------------------------------------------------------------
#endif

// inside SetSysClock_PLL_HSE() function (line 483)
// Modify (from line 511)
// Copy & Paste from next line
#if 0   // Updated on May 20th, 2014
 #if 0   // Do NOT use!
  // SYSCLK = 24 MHz ((8 MHz * 6) / 2)
  // USBCLK = 48 MHz (8 MHz * 6) --> USB OK
  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL6;
  RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLL_DIV2;
 #else   // Do NOT use!
  // SYSCLK = 32 MHz ((8 MHz * 8) / 2)
  // USBCLK = 48 MHz (8 MHz * 8) --> USB NG
  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL8;
  RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLL_DIV2;
 #endif
#else   // following is best ?
  // SYSCLK = 32 MHz ((8 MHz * 12) / 3 )
  // USBCLK = 48 MHz ((8 MHz * 12) / 2 ) --> USB OK
  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL12;
  RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLL_DIV3;
#endif
// to above line

// inside SetSysClock_PLL_HSI() function (line 546)
// Modify (from line 561)
// Copy & Paste from next line
#if 0
  // SYSCLK = 32 MHz ((16 MHz * 4) / 2)
  // USBCLK = 64 MHz (16 MHz * 4) --> USB not possible
  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;
  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL4;
  RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLL_DIV2;
#else   // following is best ?
  // SYSCLK = 32 MHz ((16 MHz * 6) / 3)
  // USBCLK = 48 MHz ((16 MHz * 6) / 2) --> 48MHz but nobody know accuracy
  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;
  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL6;
  RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLL_DIV3;
#endif
// to above line
//-------------------------------------------------------------------------------------------------
//  (3) /mbed-src/targets/hal/TARGET_STM/TARGET_STM/TARGET_STM32F4/rtc_api.c
//-------------------------------------------------------------------------------------------------
Please see /debug_tools_L152_F4x1RE/SetRTC/modify_info_F4xx.h

//-------------------------------------------------------------------------------------------------
//  (4) /mbed-src/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/rtc_api.c
//-------------------------------------------------------------------------------------------------
Please see /debug_tools_L152_F4x1RE/SetRTC/modify_info_L152.h

#endif      ///////////////////////////////////////////////////////////////////////////////////////