This is sample program for Nucleo L152RE (and F401RE & F411RE) mbed-rtos. You need to modify mbed-src and mbed-rtos before compile it.
Dependencies: mbed-rtos mbed-src SetRTC
Fork of GR-PEACH_test_on_rtos_works_well by
Please refer below link.
/users/kenjiArai/notebook/necleo-l152re-rtos-sample-also-for-f401re--f411re-/
debug_tools_L152_F4x1RE/mon_hw_STM32.h@13:d0d1da1fae4c, 2015-05-20 (annotated)
- Committer:
- kenjiArai
- Date:
- Wed May 20 10:49:02 2015 +0000
- Revision:
- 13:d0d1da1fae4c
- Parent:
- 10:1c0f58b9c048
change L152 System clock (PLL VCO=96MHz) ->32MHz Clock
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
kenjiArai | 10:1c0f58b9c048 | 1 | /* |
kenjiArai | 10:1c0f58b9c048 | 2 | * mbed Application program for the ST NUCLEO Board |
kenjiArai | 10:1c0f58b9c048 | 3 | * |
kenjiArai | 10:1c0f58b9c048 | 4 | * Copyright (c) 2010-2015 Kenji Arai / JH1PJL |
kenjiArai | 10:1c0f58b9c048 | 5 | * http://www.page.sannet.ne.jp/kenjia/index.html |
kenjiArai | 10:1c0f58b9c048 | 6 | * http://mbed.org/users/kenjiArai/ |
kenjiArai | 10:1c0f58b9c048 | 7 | * Created: July 7th, 2014 |
kenjiArai | 10:1c0f58b9c048 | 8 | * Revised: May 16th, 2015 |
kenjiArai | 10:1c0f58b9c048 | 9 | * |
kenjiArai | 10:1c0f58b9c048 | 10 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, |
kenjiArai | 10:1c0f58b9c048 | 11 | * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE |
kenjiArai | 10:1c0f58b9c048 | 12 | * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, |
kenjiArai | 10:1c0f58b9c048 | 13 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
kenjiArai | 10:1c0f58b9c048 | 14 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
kenjiArai | 10:1c0f58b9c048 | 15 | */ |
kenjiArai | 10:1c0f58b9c048 | 16 | |
kenjiArai | 10:1c0f58b9c048 | 17 | // ROM / Constant data --------------------------------------------------------------------------- |
kenjiArai | 10:1c0f58b9c048 | 18 | char *const rgmsg0 = " 7, 6, 5, 4, 3, 2, 1, 0"; |
kenjiArai | 10:1c0f58b9c048 | 19 | char *const rgmsg1 = "15,14,13,12,11,10, 9, 8,"; |
kenjiArai | 10:1c0f58b9c048 | 20 | |
kenjiArai | 10:1c0f58b9c048 | 21 | char *const cmsg0 = "Use MSI(internal RC)"; |
kenjiArai | 10:1c0f58b9c048 | 22 | char *const cmsg1 = "freq="; |
kenjiArai | 10:1c0f58b9c048 | 23 | char *const cmsg2 = "Use HSI(internal RC/High speed)"; |
kenjiArai | 10:1c0f58b9c048 | 24 | char *const cmsg3 = "Use HSE(External Xtal)"; |
kenjiArai | 10:1c0f58b9c048 | 25 | char *const cmsg4 = "Use PLL with"; |
kenjiArai | 10:1c0f58b9c048 | 26 | char *const cmsg5 = "??? following infromation is not valid !"; |
kenjiArai | 10:1c0f58b9c048 | 27 | char *const cmsg6 = "clock freq. ="; |
kenjiArai | 10:1c0f58b9c048 | 28 | char *const cmsg7 = "No clock"; |
kenjiArai | 10:1c0f58b9c048 | 29 | char *const cmsg8 = "Use LSE(external Xtal)=32768Hz"; |
kenjiArai | 10:1c0f58b9c048 | 30 | char *const cmsg9 = "Use LSI(internal RC/Low speed), RC="; |
kenjiArai | 10:1c0f58b9c048 | 31 | char *const cmsg10= "Use HSE(external Xtal & prescaler)"; |
kenjiArai | 10:1c0f58b9c048 | 32 | char *const cmsg11= "Power Control"; |
kenjiArai | 10:1c0f58b9c048 | 33 | |
kenjiArai | 10:1c0f58b9c048 | 34 | char *const imsg2 = "-->Control Reg."; |
kenjiArai | 10:1c0f58b9c048 | 35 | char *const imsg3 = "-->Status Reg."; |
kenjiArai | 10:1c0f58b9c048 | 36 | char *const imsg4 = "-->Data Reg."; |
kenjiArai | 10:1c0f58b9c048 | 37 | char *const imsg5 = "-->Baud rate Reg."; |
kenjiArai | 10:1c0f58b9c048 | 38 | char *const imsg6 = "-->Own address Reg."; |
kenjiArai | 10:1c0f58b9c048 | 39 | char *const imsg7 = "-->Clock control Reg."; |
kenjiArai | 10:1c0f58b9c048 | 40 | char *const imsg8 = "-->TRISE Reg."; |
kenjiArai | 10:1c0f58b9c048 | 41 | |
kenjiArai | 10:1c0f58b9c048 | 42 | char *const rnmsg0 = " CR1--"; |
kenjiArai | 10:1c0f58b9c048 | 43 | char *const rnmsg1 = " CR2--"; |
kenjiArai | 10:1c0f58b9c048 | 44 | char *const rnmsg2 = " DR---"; |
kenjiArai | 10:1c0f58b9c048 | 45 | char *const rnmsg3 = " SR---"; |
kenjiArai | 10:1c0f58b9c048 | 46 | char *const rnmsg4 = " BRR--"; |
kenjiArai | 10:1c0f58b9c048 | 47 | char *const rnmsg5 = " SR1--"; |
kenjiArai | 10:1c0f58b9c048 | 48 | char *const rnmsg6 = " SR2--"; |
kenjiArai | 10:1c0f58b9c048 | 49 | char *const rnmsg7 = " OAR1-"; |
kenjiArai | 10:1c0f58b9c048 | 50 | char *const rnmsg8 = " OAR2-"; |
kenjiArai | 10:1c0f58b9c048 | 51 | char *const rnmsg9 = " CCR--"; |
kenjiArai | 10:1c0f58b9c048 | 52 | char *const rnmsg10 = " TRISE"; |
kenjiArai | 10:1c0f58b9c048 | 53 | |
kenjiArai | 10:1c0f58b9c048 | 54 | char *const pnmsg0 = "Port "; |
kenjiArai | 10:1c0f58b9c048 | 55 | // 0x00000000 0x0000 0x00000000 0x00000000 0x0000 0x0000 |
kenjiArai | 10:1c0f58b9c048 | 56 | char *const pnmsg1 = "Mode Out-type Out-speed Pup/dwn Input Output"; |
kenjiArai | 10:1c0f58b9c048 | 57 | char *const pnmsga = "GPIOA"; |
kenjiArai | 10:1c0f58b9c048 | 58 | char *const pnmsgb = "GPIOB"; |
kenjiArai | 10:1c0f58b9c048 | 59 | char *const pnmsgc = "GPIOC"; |
kenjiArai | 10:1c0f58b9c048 | 60 | char *const pnmsgd = "GPIOD"; |
kenjiArai | 10:1c0f58b9c048 | 61 | char *const pnmsge = "GPIOE"; |
kenjiArai | 10:1c0f58b9c048 | 62 | char *const pnmsgh = "GPIOH"; |
kenjiArai | 10:1c0f58b9c048 | 63 | char *const pnmsg2 = "Select GPIO"; |
kenjiArai | 10:1c0f58b9c048 | 64 | char *const pnmsg3 = " All"; |
kenjiArai | 10:1c0f58b9c048 | 65 | char *const pnmsg4 = "-->Output"; |
kenjiArai | 10:1c0f58b9c048 | 66 | char *const pnmsg5 = "-->Input"; |
kenjiArai | 10:1c0f58b9c048 | 67 | char *const pnmsg6 = "data"; |
kenjiArai | 10:1c0f58b9c048 | 68 | |
kenjiArai | 10:1c0f58b9c048 | 69 | // Here is redefine part (ST Nucleo F401RE needs here definition) |
kenjiArai | 10:1c0f58b9c048 | 70 | #ifndef GPIO_Mode_IN |
kenjiArai | 10:1c0f58b9c048 | 71 | #define GPIO_Mode_IN 0 |
kenjiArai | 10:1c0f58b9c048 | 72 | #define GPIO_Mode_OUT 1 |
kenjiArai | 10:1c0f58b9c048 | 73 | #define GPIO_Mode_AF 2 |
kenjiArai | 10:1c0f58b9c048 | 74 | #define GPIO_Mode_AN 3 |
kenjiArai | 10:1c0f58b9c048 | 75 | #endif |
kenjiArai | 10:1c0f58b9c048 | 76 | |
kenjiArai | 10:1c0f58b9c048 | 77 | #ifndef GPIO_Speed_400KHz |
kenjiArai | 10:1c0f58b9c048 | 78 | #define GPIO_Speed_400KHz 0 |
kenjiArai | 10:1c0f58b9c048 | 79 | #define GPIO_Speed_2MHz 1 |
kenjiArai | 10:1c0f58b9c048 | 80 | #define GPIO_Speed_10MHz 2 |
kenjiArai | 10:1c0f58b9c048 | 81 | #define GPIO_Speed_40MHz 3 |
kenjiArai | 10:1c0f58b9c048 | 82 | #endif |
kenjiArai | 10:1c0f58b9c048 | 83 | |
kenjiArai | 10:1c0f58b9c048 | 84 | #ifndef GPIO_PuPd_NOPULL |
kenjiArai | 10:1c0f58b9c048 | 85 | #define GPIO_PuPd_NOPULL 0 |
kenjiArai | 10:1c0f58b9c048 | 86 | #define GPIO_PuPd_UP 1 |
kenjiArai | 10:1c0f58b9c048 | 87 | #define GPIO_PuPd_DOWN 2 |
kenjiArai | 10:1c0f58b9c048 | 88 | #endif |