Revision 4:9d3b3f0a3882, committed 2015-01-01

Comitter:

kenjiArai

Date:

Thu Jan 01 05:04:20 2015 +0000

Parent:

3:339307e1dc0d

Commit message:

Modified comments

Changed in this revision

diff -r 339307e1dc0d -r 9d3b3f0a3882 frq_cuntr_full.cpp
--- a/frq_cuntr_full.cpp	Tue Dec 23 23:26:49 2014 +0000
+++ b/frq_cuntr_full.cpp	Thu Jan 01 05:04:20 2015 +0000
@@ -8,7 +8,7 @@
  *  http://mbed.org/users/kenjiArai/
  *      Additional functions and modification
  *      started: October   18th, 2014
- *      Revised: December  24th, 2014
+ *      Revised: January    1st, 2015
  *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
  * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
@@ -17,6 +17,8 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
+#if defined(TARGET_NUCLEO_F411RE)
+
 #include "frq_cuntr_full.h"
 
 #ifdef DEBUG
@@ -26,16 +28,10 @@
 
 #ifdef DEBUG
 #define BAUD(x)         pcm.baud(x)
-#define GETC(x)         pcm.getc(x)
-#define PUTC(x)         pcm.putc(x)
 #define PRINTF(...)     pcm.printf(__VA_ARGS__)
-#define READABLE(x)     pcm.readable(x)
 #else
 #define BAUD(x)         {;}
-#define GETC(x)         {;}
-#define PUTC(x)         {;}
 #define PRINTF(...)     {;}
-#define READABLE(x)     {;}
 #endif
 
 namespace Frequency_counter
@@ -69,7 +65,7 @@
         tim2_ready_flg = 1;
 #if defined(DEBUG)
         debug_led = !debug_led;
-#endif
+#endif // defined(DEBUG)
     } else if (reg & TIM_SR_CC3IF) {    // Output Compare
         TIM2->SR &= ~TIM_SR_CC3IF;      // clear IC flag
         if (GPIOB->IDR & 0x0400) {      // Check PB10 status
@@ -84,7 +80,7 @@
         }
 #if defined(DEBUG)
         debug_led = !debug_led;
-#endif
+#endif // defined(DEBUG)
     }
 }
 
@@ -97,7 +93,7 @@
     tim3p4_ready_flg = 1;
 #if defined(DEBUG)
     debug_led = !debug_led;
-#endif
+#endif // defined(DEBUG)
 }
 
 //---------------------------------------------------------------------------------------
@@ -145,15 +141,11 @@
     ex_clock_freq = ex_clock;
     ex_clk_base = (uint32_t)(ex_clock_freq * 1000000); // MHz->Hz
     clk_hi_const = (uint32_t)(ex_clock_freq * 1000000 * 0.04);  // 40mS
-#if defined(CLOCK_DIVIDED_BY_2)
     uint32_t err = (uint32_t)(ex_clock_freq * 1000000 * 0.00001);  // 10ppm error range
-#else
-    uint32_t err = (uint32_t)(ex_clock_freq * 1000000 * 0.1);    // error range
-#endif
     clk_upper_limit = ex_clk_base + err;
     clk_lower_limit = ex_clk_base - err;
     PRINTF("EXTERNAL Clock mode\r\n");
-#else
+#else // defined(BASE_EXTERNAL_CLOCK)
     ex_clock_freq = 100;     // Internal 100MHz
     ex_clk_base = 100000000; // MHz->Hz
     clk_hi_const = 4000000;  // 40mS
@@ -161,7 +153,7 @@
     clk_upper_limit = ex_clk_base + err;
     clk_lower_limit = ex_clk_base - err;
     PRINTF("INTERNAL Clock mode\r\n");
-#endif
+#endif // defined(BASE_EXTERNAL_CLOCK)
 }
 
 // Read new frequency data
@@ -206,7 +198,7 @@
     }
 }
 
-// Avarage measued data GPS 1PPS by 50MHz Internal Clock
+// Avarage measued data GPS 1PPS by 25MHz External Clock
 uint32_t FRQ_CUNTR::read_avarage_1pps(void)
 {
     uint64_t total = 0;
@@ -224,15 +216,13 @@
         PRINTF("not");
     }
     PRINTF(" full, num= %3d , 1PPS/new= %9d\r\n", onepps_num, onepps_newest);
-#if defined(BASE_EXTERNAL_CLOCK)
-#if defined(ONEPPS_AVE)
     return onepps_cnt_avarage;
-#else
+}
+
+// Newest measued data GPS 1PPS
+uint32_t FRQ_CUNTR::read_newest_1pps(void)
+{
     return onepps_newest;
-#endif
-#else
-    return onepps_newest;
-#endif
 }
 
 // Check GPS condition
@@ -399,13 +389,9 @@
     TIM2->CCMR1 &= (uint16_t)~(TIM_CCMR1_IC1F | TIM_CCMR1_CC1S);    // input filter + input select
     TIM2->CCMR1 |= (uint16_t)TIM_CCMR1_CC1S_0;
     TIM2->CCER &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NE | TIM_CCER_CC1NP); // positive edge
-#if defined(CLOCK_DIVIDED_BY_2)
     TIM2->SMCR  = (uint16_t)(TIM_SMCR_ECE| TIM_SMCR_ETPS_0 | TIM_SMCR_TS);  // clock/2 !!
-#else
-    TIM2->SMCR  = (uint16_t)(TIM_SMCR_ECE| TIM_SMCR_TS);  // clock/1 !!
-#endif
     TIM2->CR1 |= (uint16_t)TIM_CR1_CEN;          // Enable the TIM Counter
-#else
+#else // defined(BASE_EXTERNAL_CLOCK)
     // Initialize Timer2(32bit) for an internal up counter mode
     RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
     TIM2->CR1 &= (uint16_t)(~(TIM_CR1_DIR | TIM_CR1_CMS | TIM_CR1_CKD));  // count_up + div by 1
@@ -416,7 +402,7 @@
     TIM2->SMCR &= (uint16_t)~(TIM_SMCR_ECE | TIM_SMCR_TS | TIM_SMCR_SMS);
     TIM2->SMCR |= (uint16_t)0;     // Internal clock = 100MHz
     TIM2->CR1 |= (uint16_t)TIM_CR1_CEN;          // Enable the TIM Counter
-#endif
+#endif // defined(BASE_EXTERNAL_CLOCK)
     // PA1 -> Input Capture pin as Timer2 IC2
     GPIOA->AFR[0] &= 0xffffff0f;
     GPIOA->AFR[0] |= GPIO_AF1_TIM2 << 4;
@@ -450,7 +436,6 @@
     oc_hi_time = oc_set_time0;
     oc_lo_time = oc_set_time1;
     TIM2->CCR3 = TIM2->CNT + oc_hi_time;// Set the Capture Compare Register value
-#if 1
     // Only for Debug purpose
     BAUD(9600);
     //  PA
@@ -477,7 +462,6 @@
     PRINTF("TIM2->CCER   0x%08x:0x%08x\r\n",&TIM2->CCER, TIM2->CCER);
     PRINTF("TIM2->SMCR   0x%08x:0x%08x\r\n",&TIM2->SMCR, TIM2->SMCR);
     PRINTF("TIM2->CCR3   0x%08x:0x%08x\r\n\r\n",&TIM2->CCR3, TIM2->CCR3);
-#endif
     // Interrupt Timer2 IC2
     for (uint32_t i = 0; i < CNT_BF_SIZE; i++) {
         onepps_cnt[i] = 0;
@@ -559,7 +543,6 @@
     TIM4->CCMR1 |= (uint16_t)TIM_CCMR1_CC1S_0;
     TIM4->CCER  &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP); // positive edge
     TIM4->CCER  |= (uint16_t)TIM_CCER_CC1E;     // enable capture
-#if 1
     // Only for Debug purpose
     //  PB
     PRINTF("// PB6 -> Input Capture pin as Timer4 CH1/TI1\r\n");
@@ -599,7 +582,6 @@
     PRINTF("TIM4->CCER   0x%08x:0x%08x\r\n",&TIM4->CCER, TIM4->CCER);
     PRINTF("TIM4->SMCR   0x%08x:0x%08x\r\n\r\n",&TIM4->SMCR, TIM4->SMCR);
     PRINTF("RCC->APB1ENR 0x%08x:0x%08x\r\n\r\n",&RCC->APB1ENR, RCC->APB1ENR);
-#endif
     // Interrupt Timer3 IC2
     tim3p4_ready_flg = 0;
     tim3p4_cnt_data = 0;
@@ -616,7 +598,6 @@
 //---------------------------------------------------------------------------------------
 void FRQ_CUNTR::debug_printf_internal_data(void)
 {
-#if 1
     PRINTF("Debug information\r\n");
     PRINTF("gate_time       %f\r\n", gate_time);
     PRINTF("ex_clock_freq   %f\r\n", ex_clock_freq);
@@ -625,7 +606,8 @@
     PRINTF("clk_upper_limit %9d\r\n", clk_upper_limit);
     PRINTF("clk_lower_limit %9d\r\n", clk_lower_limit);
     PRINTF("\r\n");
-#endif
 }
 
 }   // Frequency_counter
+
+#endif      // #if defined(TARGET_NUCLEO_F411RE)

diff -r 339307e1dc0d -r 9d3b3f0a3882 frq_cuntr_full.h
--- a/frq_cuntr_full.h	Tue Dec 23 23:26:49 2014 +0000
+++ b/frq_cuntr_full.h	Thu Jan 01 05:04:20 2015 +0000
@@ -8,7 +8,7 @@
  *  http://mbed.org/users/kenjiArai/
  *      Additional functions and modification
  *      started: October   18th, 2014
- *      Revised: December  24th, 2014
+ *      Revised: January    1st, 2015
  *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
  * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
@@ -38,9 +38,6 @@
 //  use avaraged 1pps data
 #define ONEPPS_AVE
 
-// External clock divided by 2
-#define CLOCK_DIVIDED_BY_2
-
 namespace Frequency_counter
 {
 
@@ -57,13 +54,13 @@
  * // PC_6,PC_7 & PB_6 use for Timer3 & 4(16+16bit)
  * // PA_0,PA_1 & PB_10 use for Timer2(32bit)
  * // PA_8 & PC_7 use for MCO (Test purpose)
- * FRQ_CUNTR   fc(PC_6, 1.0, 50.000000);// Input port, gate time[sec] and External clock freq.
+ * FRQ_CUNTR   fc(PC_6, 1.0, 24.999982f); //Input port, gate time[sec] & External clock freq.
  *
  * int main() {
  *   uint32_t counter_1pps = 0;
  *   double new_frequency = 0;
  *   // This is for test purpose
- *   fc.port_mco1_mco2_set(2);      // Clk/2 ->1/1(100MHz) cannot measure!!
+ *   fc.port_mco1_mco2_set(4);      // Clk/4 ->1/1(100MHz) cannot measure!!
  *   fc.read_frequency_TIM2(1.0);   // read TIM2 source frequency (test)
  *   fc.read_frequency_TIM3P4(1.0); // read TIM3 source frequency (test)
  *   while(true) {
@@ -71,7 +68,7 @@
  *      counter_1pps = fc.read_avarage_1pps();
  *      while (fc.status_freq_update() == 0) {;}
  *      new_frequency = fc.read_freq_data();
- *       PRINTF("1PPS/ave = %9d , FREQUENCY = %11.3f\r\n", counter_1pps, new_frequency);
+ *      printf("1PPS/ave = %9d , FREQUENCY = %11.3f\r\n", counter_1pps, new_frequency);
  *   }
  * }
  * @endcode
@@ -92,6 +89,12 @@
       */
     double set_gate_time(double gt);
 
+    /** Set external clock frequency
+      * @param frequency e.g. 25.000000 [MHz]
+      * @return none
+      */
+    void set_external_clock(double ex_clock);
+
     /** Read gate time
       * @param none
       * @return gate time (range 50mS to 1 minute)
@@ -116,6 +119,12 @@
       */
     uint32_t read_avarage_1pps(void);
 
+    /** Read newest measued data GPS 1PPS
+      * @param none
+      * @return Frequency
+      */
+    uint32_t read_newest_1pps(void);
+
     /** Read status (new 1PPS data is available or not)
       * @param none
       * @return !=0: new data is avairable, 0: not yet
@@ -164,7 +173,6 @@
     void initialize_TIM2(void);
     // Initialize TIM3 and TIM4 as 32bit counter (TIM3(16bit) + TIM4(16bit))
     void initialize_TIM3P4(void);
-    void set_external_clock(double ex_clock); // Set external clock data
     uint32_t set_1PPS_data(void);           // Set GPS 1PPS counter value
     uint32_t read_ic2_counter_TIM2(void);   // Read TIM2 captured counter value
     uint32_t check_ic2_status_TIM2(void);   // Check TIM2 IC2 status