Comms between MAX 10 FPGA and ST uP
Diff: FPGA_bus.h
- Revision:
- 5:64c677e9995c
- Parent:
- 4:e5d36eee9245
- Child:
- 6:e68defb7b775
diff -r e5d36eee9245 -r 64c677e9995c FPGA_bus.h --- a/FPGA_bus.h Thu Apr 18 22:54:18 2019 +0000 +++ b/FPGA_bus.h Thu Apr 18 22:59:26 2019 +0000 @@ -128,6 +128,7 @@ void enable_RC_channel(uint32_t channel); void disable_RC_channel(uint32_t channel); void enable_speed_measure(uint32_t channel); + uint32_t read_speed_measure(uint32_t channel); int32_t global_FPGA_unit_error_flag;