NXP's driver library for LPC17xx, ported to mbed's online compiler. Not tested! I had to fix a lot of warings and found a couple of pretty obvious bugs, so the chances are there are more. Original: http://ics.nxp.com/support/documents/microcontrollers/zip/lpc17xx.cmsis.driver.library.zip
I2S_PinCFG_Type Struct Reference
[I2S_Public_Types]
I2S configuration structure. More...
#include <lpc17xx_i2s.h>
Data Fields | |
uint8_t | CLK_Pin |
Clock Pin, should be:
| |
uint8_t | WS_Pin |
Word Select, should be:
| |
uint8_t | SDA_Pin |
Data, should be:
| |
uint8_t | MCLK_Pin |
Master Clock output, should be:
|
Detailed Description
I2S configuration structure.
Definition at line 192 of file lpc17xx_i2s.h.
Field Documentation
uint8_t CLK_Pin |
Clock Pin, should be:
- I2S_SRX_CLK_P0_4: RX_CLK pin is on P0.4
- I2S_SRX_CLK_P0_23: RX_CLK pin is on P0.23
- I2S_STX_CLK_P0_7: TX_CLK pin is on P0.7
- I2S_STX_CLK_P2_11: TX_CLK pin is on P2.11.
Definition at line 193 of file lpc17xx_i2s.h.
uint8_t MCLK_Pin |
Master Clock output, should be:
- I2S_RX_MCLK_P4_28: RX_MCLK pin is on P4.28
- I2S_TX_MCLK_P4_29: TX_MCLK pin is on P4.29.
Definition at line 208 of file lpc17xx_i2s.h.
uint8_t SDA_Pin |
Data, should be:
- I2S_SRX_SDA_P0_6: RX_SDA pin is on P0.6
- I2S_SRX_SDA_P0_25: RX_SDA pin is on P0.25
- I2S_STX_SDA_P0_9: TX_SDA pin is on P0.8
- I2S_STX_SDA_P2_13: TX_SDA pin is on P2.13.
Definition at line 203 of file lpc17xx_i2s.h.
uint8_t WS_Pin |
Word Select, should be:
- I2S_SRX_WS_P0_5: RX_WS pin is on P0.5
- I2S_SRX_WS_P0_24: RX_WS pin is on P0.24
- I2S_STX_WS_P0_8: TX_WS pin is on P0.8
- I2S_STX_WS_P2_12: TX_WS pin is on P2.12.
Definition at line 198 of file lpc17xx_i2s.h.
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