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/**
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* @author Aaron Berk
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*
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* @section LICENSE
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*
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* Copyright (c) 2010 ARM Limited
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* @section DESCRIPTION
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*
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* ITG-3200 triple axis, digital interface, gyroscope.
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*
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* Datasheet:
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*
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* http://invensense.com/mems/gyro/documents/PS-ITG-3200-00-01.4.pdf
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*/
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#ifndef ITG3200_H
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#define ITG3200_H
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/**
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* Includes
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*/
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#include "mbed.h"
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/**
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* Defines
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*/
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#define ITG3200_I2C_ADDRESS 0x68 //7-bit address.
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//-----------
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// Registers
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//-----------
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#define WHO_AM_I_REG 0x00
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52
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#define SMPLRT_DIV_REG 0x15
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#define DLPF_FS_REG 0x16
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#define INT_CFG_REG 0x17
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#define INT_STATUS 0x1A
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#define TEMP_OUT_H_REG 0x1B
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#define TEMP_OUT_L_REG 0x1C
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#define GYRO_XOUT_H_REG 0x1D
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#define GYRO_XOUT_L_REG 0x1E
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#define GYRO_YOUT_H_REG 0x1F
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61
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#define GYRO_YOUT_L_REG 0x20
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#define GYRO_ZOUT_H_REG 0x21
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63
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#define GYRO_ZOUT_L_REG 0x22
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64
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#define PWR_MGM_REG 0x3E
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65
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66
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//----------------------------
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67
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// Low Pass Filter Bandwidths
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68
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//----------------------------
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69
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#define LPFBW_256HZ 0x00
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70
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#define LPFBW_188HZ 0x01
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71
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#define LPFBW_98HZ 0x02
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72
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#define LPFBW_42HZ 0x03
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73
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#define LPFBW_20HZ 0x04
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74
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#define LPFBW_10HZ 0x05
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75
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#define LPFBW_5HZ 0x06
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76
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/**
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* ITG-3200 triple axis digital gyroscope.
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79
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*/
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class ITG3200 {
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public:
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/**
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* Constructor.
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*
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* Sets FS_SEL to 0x03 for proper opertaion.
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*
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* @param sda - mbed pin to use for the SDA I2C line.
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* @param scl - mbed pin to use for the SCL I2C line.
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*/
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ITG3200(PinName sda, PinName scl);
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93
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/**
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* Get the identity of the device.
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*
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* @return The contents of the Who Am I register which contains the I2C
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* address of the device.
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*/
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char getWhoAmI(void);
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101
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/**
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* Set the address of the device.
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*
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* @param address The I2C slave address to write to the Who Am I register
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* on the device.
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*/
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void setWhoAmI(char address);
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109
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/**
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* Get the sample rate divider.
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*
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* @return The sample rate divider as a number from 0-255.
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*/
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char getSampleRateDivider(void);
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/**
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* Set the sample rate divider.
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*
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* Fsample = Finternal / (divider + 1), where Finternal = 1kHz or 8kHz,
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* as decidied by the DLPF_FS register.
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*
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* @param The sample rate divider as a number from 0-255.
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*/
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125
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void setSampleRateDivider(char divider);
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126
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127
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/**
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128
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* Get the internal sample rate.
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*
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* @return The internal sample rate in kHz - either 1 or 8.
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131
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*/
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132
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int getInternalSampleRate(void);
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133
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134
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/**
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135
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* Set the low pass filter bandwidth.
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*
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* Also used to set the internal sample rate.
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* Pass the #define bandwidth codes as a parameter.
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139
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*
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140
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* 256Hz -> 8kHz internal sample rate.
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141
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* Everything else -> 1kHz internal rate.
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142
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*
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143
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* @param bandwidth Low pass filter bandwidth code
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144
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*/
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145
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void setLpBandwidth(char bandwidth);
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146
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|
147
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/**
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148
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* Get the interrupt configuration.
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0:f5a5a0e5fefb
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149
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*
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150
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* See datasheet for register contents details.
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151
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*
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152
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* 7 6 5 4
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153
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* +------+------+--------------+------------------+
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154
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* | ACTL | OPEN | LATCH_INT_EN | INT_ANYRD_2CLEAR |
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155
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* +------+------+--------------+------------------+
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|
156
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*
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|
157
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* 3 2 1 0
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| higedura |
0:f5a5a0e5fefb
|
158
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* +---+------------+------------+---+
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| higedura |
0:f5a5a0e5fefb
|
159
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* | 0 | ITG_RDY_EN | RAW_RDY_EN | 0 |
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|
160
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* +---+------------+------------+---+
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0:f5a5a0e5fefb
|
161
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*
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162
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* ACTL Logic level for INT output pin; 1 = active low, 0 = active high.
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163
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* OPEN Drive type for INT output pin; 1 = open drain, 0 = push-pull.
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|
164
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* LATCH_INT_EN Latch mode; 1 = latch until interrupt is cleared,
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0:f5a5a0e5fefb
|
165
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* 0 = 50us pulse.
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0:f5a5a0e5fefb
|
166
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* INT_ANYRD_2CLEAR Latch clear method; 1 = any register read,
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|
167
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* 0 = status register read only.
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0:f5a5a0e5fefb
|
168
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* ITG_RDY_EN Enable interrupt when device is ready,
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0:f5a5a0e5fefb
|
169
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* (PLL ready after changing clock source).
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0:f5a5a0e5fefb
|
170
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* RAW_RDY_EN Enable interrupt when data is available.
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0:f5a5a0e5fefb
|
171
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* 0 Bits 1 and 3 of the INT_CFG register should be zero.
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|
172
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*
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|
173
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* @return the contents of the INT_CFG register.
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174
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*/
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|
175
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char getInterruptConfiguration(void);
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|
176
|
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|
177
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/**
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0:f5a5a0e5fefb
|
178
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* Set the interrupt configuration.
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|
179
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*
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0:f5a5a0e5fefb
|
180
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* See datasheet for configuration byte details.
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|
181
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*
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0:f5a5a0e5fefb
|
182
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* 7 6 5 4
|
| higedura |
0:f5a5a0e5fefb
|
183
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* +------+------+--------------+------------------+
|
| higedura |
0:f5a5a0e5fefb
|
184
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* | ACTL | OPEN | LATCH_INT_EN | INT_ANYRD_2CLEAR |
|
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0:f5a5a0e5fefb
|
185
|
* +------+------+--------------+------------------+
|
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0:f5a5a0e5fefb
|
186
|
*
|
| higedura |
0:f5a5a0e5fefb
|
187
|
* 3 2 1 0
|
| higedura |
0:f5a5a0e5fefb
|
188
|
* +---+------------+------------+---+
|
| higedura |
0:f5a5a0e5fefb
|
189
|
* | 0 | ITG_RDY_EN | RAW_RDY_EN | 0 |
|
| higedura |
0:f5a5a0e5fefb
|
190
|
* +---+------------+------------+---+
|
| higedura |
0:f5a5a0e5fefb
|
191
|
*
|
| higedura |
0:f5a5a0e5fefb
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192
|
* ACTL Logic level for INT output pin; 1 = active low, 0 = active high.
|
| higedura |
0:f5a5a0e5fefb
|
193
|
* OPEN Drive type for INT output pin; 1 = open drain, 0 = push-pull.
|
| higedura |
0:f5a5a0e5fefb
|
194
|
* LATCH_INT_EN Latch mode; 1 = latch until interrupt is cleared,
|
| higedura |
0:f5a5a0e5fefb
|
195
|
* 0 = 50us pulse.
|
| higedura |
0:f5a5a0e5fefb
|
196
|
* INT_ANYRD_2CLEAR Latch clear method; 1 = any register read,
|
| higedura |
0:f5a5a0e5fefb
|
197
|
* 0 = status register read only.
|
| higedura |
0:f5a5a0e5fefb
|
198
|
* ITG_RDY_EN Enable interrupt when device is ready,
|
| higedura |
0:f5a5a0e5fefb
|
199
|
* (PLL ready after changing clock source).
|
| higedura |
0:f5a5a0e5fefb
|
200
|
* RAW_RDY_EN Enable interrupt when data is available.
|
| higedura |
0:f5a5a0e5fefb
|
201
|
* 0 Bits 1 and 3 of the INT_CFG register should be zero.
|
| higedura |
0:f5a5a0e5fefb
|
202
|
*
|
| higedura |
0:f5a5a0e5fefb
|
203
|
* @param config Configuration byte to write to INT_CFG register.
|
| higedura |
0:f5a5a0e5fefb
|
204
|
*/
|
| higedura |
0:f5a5a0e5fefb
|
205
|
void setInterruptConfiguration(char config);
|
| higedura |
0:f5a5a0e5fefb
|
206
|
|
| higedura |
0:f5a5a0e5fefb
|
207
|
/**
|
| higedura |
0:f5a5a0e5fefb
|
208
|
* Check the ITG_RDY bit of the INT_STATUS register.
|
| higedura |
0:f5a5a0e5fefb
|
209
|
*
|
| higedura |
0:f5a5a0e5fefb
|
210
|
* @return True if the ITG_RDY bit is set, corresponding to PLL ready,
|
| higedura |
0:f5a5a0e5fefb
|
211
|
* false if the ITG_RDY bit is not set, corresponding to PLL not
|
| higedura |
0:f5a5a0e5fefb
|
212
|
* ready.
|
| higedura |
0:f5a5a0e5fefb
|
213
|
*/
|
| higedura |
0:f5a5a0e5fefb
|
214
|
bool isPllReady(void);
|
| higedura |
0:f5a5a0e5fefb
|
215
|
|
| higedura |
0:f5a5a0e5fefb
|
216
|
/**
|
| higedura |
0:f5a5a0e5fefb
|
217
|
* Check the RAW_DATA_RDY bit of the INT_STATUS register.
|
| higedura |
0:f5a5a0e5fefb
|
218
|
*
|
| higedura |
0:f5a5a0e5fefb
|
219
|
* @return True if the RAW_DATA_RDY bit is set, corresponding to new data
|
| higedura |
0:f5a5a0e5fefb
|
220
|
* in the sensor registers, false if the RAW_DATA_RDY bit is not
|
| higedura |
0:f5a5a0e5fefb
|
221
|
* set, corresponding to no new data yet in the sensor registers.
|
| higedura |
0:f5a5a0e5fefb
|
222
|
*/
|
| higedura |
0:f5a5a0e5fefb
|
223
|
bool isRawDataReady(void);
|
| higedura |
0:f5a5a0e5fefb
|
224
|
|
| higedura |
0:f5a5a0e5fefb
|
225
|
/**
|
| higedura |
0:f5a5a0e5fefb
|
226
|
* Get the temperature of the device.
|
| higedura |
0:f5a5a0e5fefb
|
227
|
*
|
| higedura |
0:f5a5a0e5fefb
|
228
|
* @return The temperature in degrees celsius.
|
| higedura |
0:f5a5a0e5fefb
|
229
|
*/
|
| higedura |
0:f5a5a0e5fefb
|
230
|
float getTemperature(void);
|
| higedura |
0:f5a5a0e5fefb
|
231
|
|
| higedura |
0:f5a5a0e5fefb
|
232
|
/**
|
| higedura |
0:f5a5a0e5fefb
|
233
|
* Get the output for the x-axis gyroscope.
|
| higedura |
0:f5a5a0e5fefb
|
234
|
*
|
| higedura |
0:f5a5a0e5fefb
|
235
|
* Typical sensitivity is 14.375 LSB/(degrees/sec).
|
| higedura |
0:f5a5a0e5fefb
|
236
|
*
|
| higedura |
0:f5a5a0e5fefb
|
237
|
* @return The output on the x-axis in raw ADC counts.
|
| higedura |
0:f5a5a0e5fefb
|
238
|
*/
|
| higedura |
0:f5a5a0e5fefb
|
239
|
int getGyroX(void);
|
| higedura |
0:f5a5a0e5fefb
|
240
|
|
| higedura |
0:f5a5a0e5fefb
|
241
|
/**
|
| higedura |
0:f5a5a0e5fefb
|
242
|
* Get the output for the y-axis gyroscope.
|
| higedura |
0:f5a5a0e5fefb
|
243
|
*
|
| higedura |
0:f5a5a0e5fefb
|
244
|
* Typical sensitivity is 14.375 LSB/(degrees/sec).
|
| higedura |
0:f5a5a0e5fefb
|
245
|
*
|
| higedura |
0:f5a5a0e5fefb
|
246
|
* @return The output on the y-axis in raw ADC counts.
|
| higedura |
0:f5a5a0e5fefb
|
247
|
*/
|
| higedura |
0:f5a5a0e5fefb
|
248
|
int getGyroY(void);
|
| higedura |
0:f5a5a0e5fefb
|
249
|
|
| higedura |
0:f5a5a0e5fefb
|
250
|
/**
|
| higedura |
0:f5a5a0e5fefb
|
251
|
* Get the output on the z-axis gyroscope.
|
| higedura |
0:f5a5a0e5fefb
|
252
|
*
|
| higedura |
0:f5a5a0e5fefb
|
253
|
* Typical sensitivity is 14.375 LSB/(degrees/sec).
|
| higedura |
0:f5a5a0e5fefb
|
254
|
*
|
| higedura |
0:f5a5a0e5fefb
|
255
|
* @return The output on the z-axis in raw ADC counts.
|
| higedura |
0:f5a5a0e5fefb
|
256
|
*/
|
| higedura |
0:f5a5a0e5fefb
|
257
|
int getGyroZ(void);
|
| higedura |
0:f5a5a0e5fefb
|
258
|
|
| higedura |
0:f5a5a0e5fefb
|
259
|
/**
|
| higedura |
0:f5a5a0e5fefb
|
260
|
* Get the power management configuration.
|
| higedura |
0:f5a5a0e5fefb
|
261
|
*
|
| higedura |
0:f5a5a0e5fefb
|
262
|
* See the datasheet for register contents details.
|
| higedura |
0:f5a5a0e5fefb
|
263
|
*
|
| higedura |
0:f5a5a0e5fefb
|
264
|
* 7 6 5 4
|
| higedura |
0:f5a5a0e5fefb
|
265
|
* +---------+-------+---------+---------+
|
| higedura |
0:f5a5a0e5fefb
|
266
|
* | H_RESET | SLEEP | STBY_XG | STBY_YG |
|
| higedura |
0:f5a5a0e5fefb
|
267
|
* +---------+-------+---------+---------+
|
| higedura |
0:f5a5a0e5fefb
|
268
|
*
|
| higedura |
0:f5a5a0e5fefb
|
269
|
* 3 2 1 0
|
| higedura |
0:f5a5a0e5fefb
|
270
|
* +---------+----------+----------+----------+
|
| higedura |
0:f5a5a0e5fefb
|
271
|
* | STBY_ZG | CLK_SEL2 | CLK_SEL1 | CLK_SEL0 |
|
| higedura |
0:f5a5a0e5fefb
|
272
|
* +---------+----------+----------+----------+
|
| higedura |
0:f5a5a0e5fefb
|
273
|
*
|
| higedura |
0:f5a5a0e5fefb
|
274
|
* H_RESET Reset device and internal registers to the power-up-default settings.
|
| higedura |
0:f5a5a0e5fefb
|
275
|
* SLEEP Enable low power sleep mode.
|
| higedura |
0:f5a5a0e5fefb
|
276
|
* STBY_XG Put gyro X in standby mode (1=standby, 0=normal).
|
| higedura |
0:f5a5a0e5fefb
|
277
|
* STBY_YG Put gyro Y in standby mode (1=standby, 0=normal).
|
| higedura |
0:f5a5a0e5fefb
|
278
|
* STBY_ZG Put gyro Z in standby mode (1=standby, 0=normal).
|
| higedura |
0:f5a5a0e5fefb
|
279
|
* CLK_SEL Select device clock source:
|
| higedura |
0:f5a5a0e5fefb
|
280
|
*
|
| higedura |
0:f5a5a0e5fefb
|
281
|
* CLK_SEL | Clock Source
|
| higedura |
0:f5a5a0e5fefb
|
282
|
* --------+--------------
|
| higedura |
0:f5a5a0e5fefb
|
283
|
* 0 Internal oscillator
|
| higedura |
0:f5a5a0e5fefb
|
284
|
* 1 PLL with X Gyro reference
|
| higedura |
0:f5a5a0e5fefb
|
285
|
* 2 PLL with Y Gyro reference
|
| higedura |
0:f5a5a0e5fefb
|
286
|
* 3 PLL with Z Gyro reference
|
| higedura |
0:f5a5a0e5fefb
|
287
|
* 4 PLL with external 32.768kHz reference
|
| higedura |
0:f5a5a0e5fefb
|
288
|
* 5 PLL with external 19.2MHz reference
|
| higedura |
0:f5a5a0e5fefb
|
289
|
* 6 Reserved
|
| higedura |
0:f5a5a0e5fefb
|
290
|
* 7 Reserved
|
| higedura |
0:f5a5a0e5fefb
|
291
|
*
|
| higedura |
0:f5a5a0e5fefb
|
292
|
* @return The contents of the PWR_MGM register.
|
| higedura |
0:f5a5a0e5fefb
|
293
|
*/
|
| higedura |
0:f5a5a0e5fefb
|
294
|
char getPowerManagement(void);
|
| higedura |
0:f5a5a0e5fefb
|
295
|
|
| higedura |
0:f5a5a0e5fefb
|
296
|
/**
|
| higedura |
0:f5a5a0e5fefb
|
297
|
* Set power management configuration.
|
| higedura |
0:f5a5a0e5fefb
|
298
|
*
|
| higedura |
0:f5a5a0e5fefb
|
299
|
* See the datasheet for configuration byte details
|
| higedura |
0:f5a5a0e5fefb
|
300
|
*
|
| higedura |
0:f5a5a0e5fefb
|
301
|
* 7 6 5 4
|
| higedura |
0:f5a5a0e5fefb
|
302
|
* +---------+-------+---------+---------+
|
| higedura |
0:f5a5a0e5fefb
|
303
|
* | H_RESET | SLEEP | STBY_XG | STBY_YG |
|
| higedura |
0:f5a5a0e5fefb
|
304
|
* +---------+-------+---------+---------+
|
| higedura |
0:f5a5a0e5fefb
|
305
|
*
|
| higedura |
0:f5a5a0e5fefb
|
306
|
* 3 2 1 0
|
| higedura |
0:f5a5a0e5fefb
|
307
|
* +---------+----------+----------+----------+
|
| higedura |
0:f5a5a0e5fefb
|
308
|
* | STBY_ZG | CLK_SEL2 | CLK_SEL1 | CLK_SEL0 |
|
| higedura |
0:f5a5a0e5fefb
|
309
|
* +---------+----------+----------+----------+
|
| higedura |
0:f5a5a0e5fefb
|
310
|
*
|
| higedura |
0:f5a5a0e5fefb
|
311
|
* H_RESET Reset device and internal registers to the power-up-default settings.
|
| higedura |
0:f5a5a0e5fefb
|
312
|
* SLEEP Enable low power sleep mode.
|
| higedura |
0:f5a5a0e5fefb
|
313
|
* STBY_XG Put gyro X in standby mode (1=standby, 0=normal).
|
| higedura |
0:f5a5a0e5fefb
|
314
|
* STBY_YG Put gyro Y in standby mode (1=standby, 0=normal).
|
| higedura |
0:f5a5a0e5fefb
|
315
|
* STBY_ZG Put gyro Z in standby mode (1=standby, 0=normal).
|
| higedura |
0:f5a5a0e5fefb
|
316
|
* CLK_SEL Select device clock source:
|
| higedura |
0:f5a5a0e5fefb
|
317
|
*
|
| higedura |
0:f5a5a0e5fefb
|
318
|
* CLK_SEL | Clock Source
|
| higedura |
0:f5a5a0e5fefb
|
319
|
* --------+--------------
|
| higedura |
0:f5a5a0e5fefb
|
320
|
* 0 Internal oscillator
|
| higedura |
0:f5a5a0e5fefb
|
321
|
* 1 PLL with X Gyro reference
|
| higedura |
0:f5a5a0e5fefb
|
322
|
* 2 PLL with Y Gyro reference
|
| higedura |
0:f5a5a0e5fefb
|
323
|
* 3 PLL with Z Gyro reference
|
| higedura |
0:f5a5a0e5fefb
|
324
|
* 4 PLL with external 32.768kHz reference
|
| higedura |
0:f5a5a0e5fefb
|
325
|
* 5 PLL with external 19.2MHz reference
|
| higedura |
0:f5a5a0e5fefb
|
326
|
* 6 Reserved
|
| higedura |
0:f5a5a0e5fefb
|
327
|
* 7 Reserved
|
| higedura |
0:f5a5a0e5fefb
|
328
|
*
|
| higedura |
0:f5a5a0e5fefb
|
329
|
* @param config The configuration byte to write to the PWR_MGM register.
|
| higedura |
0:f5a5a0e5fefb
|
330
|
*/
|
| higedura |
0:f5a5a0e5fefb
|
331
|
void setPowerManagement(char config);
|
| higedura |
0:f5a5a0e5fefb
|
332
|
|
| higedura |
0:f5a5a0e5fefb
|
333
|
private:
|
| higedura |
0:f5a5a0e5fefb
|
334
|
|
| higedura |
0:f5a5a0e5fefb
|
335
|
I2C i2c_;
|
| higedura |
0:f5a5a0e5fefb
|
336
|
|
| higedura |
0:f5a5a0e5fefb
|
337
|
};
|
| higedura |
0:f5a5a0e5fefb
|
338
|
|
| higedura |
0:f5a5a0e5fefb
|
339
|
#endif /* ITG3200_H */
|
hige dura