takaaki mastuzawa / pwm_all_out

MATSU-bed(LPC1549)でPWMを4つ以上出すプログラム

Dependents:   servo_controller_1549

pwm_all_api.cpp@5:88243d59b4df, 2018-03-12 (annotated)

Committer:
hardtail
Date:
Mon Mar 12 08:50:47 2018 +0000
Revision:
5:88243d59b4df
Parent:
4:49ee58dc8e4d
Child:
6:f9e8b982516e
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Who changed what in which revision?

UserRevisionLine numberNew contents of line
hardtail 0:64b18a3829f1 1 /* mbed Microcontroller Library
hardtail 0:64b18a3829f1 2 * Copyright (c) 2006-2013 ARM Limited
hardtail 0:64b18a3829f1 3 *
hardtail 0:64b18a3829f1 4 * Licensed under the Apache License, Version 2.0 (the "License");
hardtail 0:64b18a3829f1 5 * you may not use this file except in compliance with the License.
hardtail 0:64b18a3829f1 6 * You may obtain a copy of the License at
hardtail 0:64b18a3829f1 7 *
hardtail 0:64b18a3829f1 8 * http://www.apache.org/licenses/LICENSE-2.0
hardtail 0:64b18a3829f1 9 *
hardtail 0:64b18a3829f1 10 * Unless required by applicable law or agreed to in writing, software
hardtail 0:64b18a3829f1 11 * distributed under the License is distributed on an "AS IS" BASIS,
hardtail 0:64b18a3829f1 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
hardtail 0:64b18a3829f1 13 * See the License for the specific language governing permissions and
hardtail 0:64b18a3829f1 14 * limitations under the License.
hardtail 0:64b18a3829f1 15 */
hardtail 0:64b18a3829f1 16 #include "mbed_assert.h"
hardtail 0:64b18a3829f1 17 #include "pwm_all_api.h"
hardtail 0:64b18a3829f1 18 #include "cmsis.h"
hardtail 0:64b18a3829f1 19 #include "pinmap.h"
hardtail 0:64b18a3829f1 20 #include "mbed_error.h"
hardtail 0:64b18a3829f1 21
hardtail 0:64b18a3829f1 22 static LPC_SCT0_Type *SCTs[4] = {
hardtail 0:64b18a3829f1 23 (LPC_SCT0_Type*)LPC_SCT0,
hardtail 0:64b18a3829f1 24 (LPC_SCT0_Type*)LPC_SCT1,
hardtail 0:64b18a3829f1 25 (LPC_SCT0_Type*)LPC_SCT2,
hardtail 0:64b18a3829f1 26 (LPC_SCT0_Type*)LPC_SCT3,
hardtail 0:64b18a3829f1 27 };
hardtail 0:64b18a3829f1 28
hardtail 0:64b18a3829f1 29 // bit flags for used SCTs
hardtail 0:64b18a3829f1 30 static unsigned char sct_used = 0;
hardtail 0:64b18a3829f1 31 static int get_available_sct(void) {
hardtail 0:64b18a3829f1 32 int i;
hardtail 2:322ad3eef278 33 for (i=0; i<24; i++) {
hardtail 0:64b18a3829f1 34 if ((sct_used & (1 << i)) == 0)
hardtail 0:64b18a3829f1 35 return i;
hardtail 0:64b18a3829f1 36 }
hardtail 0:64b18a3829f1 37 return -1;
hardtail 0:64b18a3829f1 38 }
hardtail 0:64b18a3829f1 39
hardtail 2:322ad3eef278 40 static LPC_SCT0_Type *check_SCT_module(PinName pin){
hardtail 2:322ad3eef278 41 switch((int)pin){
hardtail 2:322ad3eef278 42 case P0_0:
hardtail 2:322ad3eef278 43 case P0_1:
hardtail 2:322ad3eef278 44 case P0_5:
hardtail 5:88243d59b4df 45 case P0_6:
hardtail 2:322ad3eef278 46 case P0_7:
hardtail 2:322ad3eef278 47 case P0_8:
hardtail 2:322ad3eef278 48 case P0_18:
hardtail 2:322ad3eef278 49 return (LPC_SCT0_Type*)LPC_SCT0;
hardtail 2:322ad3eef278 50
hardtail 2:322ad3eef278 51 case P0_2:
hardtail 2:322ad3eef278 52 case P0_3:
hardtail 2:322ad3eef278 53 case P0_9:
hardtail 2:322ad3eef278 54 case P0_10:
hardtail 2:322ad3eef278 55 case P0_11:
hardtail 2:322ad3eef278 56 case P0_14:
hardtail 2:322ad3eef278 57 case P0_20:
hardtail 2:322ad3eef278 58 return (LPC_SCT0_Type*)LPC_SCT1;
hardtail 2:322ad3eef278 59
hardtail 5:88243d59b4df 60 case P0_13:
hardtail 2:322ad3eef278 61 case P0_6:
hardtail 2:322ad3eef278 62 case P0_12:
hardtail 5:88243d59b4df 63 case P0_25:
hardtail 2:322ad3eef278 64 return (LPC_SCT0_Type*)LPC_SCT2;
hardtail 2:322ad3eef278 65
hardtail 2:322ad3eef278 66 case P0_15:
hardtail 2:322ad3eef278 67 case P0_17:
hardtail 2:322ad3eef278 68 case P0_19:
hardtail 2:322ad3eef278 69 return (LPC_SCT0_Type*)LPC_SCT3;
hardtail 2:322ad3eef278 70
hardtail 2:322ad3eef278 71 }
hardtail 2:322ad3eef278 72 }
hardtail 2:322ad3eef278 73
hardtail 2:322ad3eef278 74 uint32_t pwm_ch_map(PinName pin){
hardtail 2:322ad3eef278 75 switch((int)pin){
hardtail 2:322ad3eef278 76 case P0_0:
hardtail 2:322ad3eef278 77 case P0_1:
hardtail 2:322ad3eef278 78 case P0_5:
hardtail 5:88243d59b4df 79 case P0_6:
hardtail 2:322ad3eef278 80 case P0_7:
hardtail 2:322ad3eef278 81 case P0_8:
hardtail 2:322ad3eef278 82 case P0_18:
hardtail 2:322ad3eef278 83 return 0;
hardtail 2:322ad3eef278 84
hardtail 2:322ad3eef278 85 case P0_2:
hardtail 2:322ad3eef278 86 case P0_3:
hardtail 2:322ad3eef278 87 case P0_9:
hardtail 2:322ad3eef278 88 case P0_10:
hardtail 2:322ad3eef278 89 case P0_11:
hardtail 2:322ad3eef278 90 case P0_14:
hardtail 2:322ad3eef278 91 case P0_20:
hardtail 2:322ad3eef278 92 return 1;
hardtail 2:322ad3eef278 93
hardtail 5:88243d59b4df 94 case P0_13:
hardtail 2:322ad3eef278 95 case P0_6:
hardtail 2:322ad3eef278 96 case P0_12:
hardtail 5:88243d59b4df 97 case P0_25:
hardtail 2:322ad3eef278 98 return 2;
hardtail 2:322ad3eef278 99
hardtail 2:322ad3eef278 100 case P0_15:
hardtail 2:322ad3eef278 101 case P0_17:
hardtail 2:322ad3eef278 102 case P0_19:
hardtail 2:322ad3eef278 103 return 3;
hardtail 2:322ad3eef278 104
hardtail 2:322ad3eef278 105 }
hardtail 2:322ad3eef278 106 }
hardtail 2:322ad3eef278 107
hardtail 5:88243d59b4df 108 uint32_t pwm_out_map[] = {3, 4, 3, 4, 7, 0, 3, 1, 2, 0, 1, 2, 1, 2, 5, 0, 7, 1, 5, 2, 6, 7, 7, 7, 6, 0};
hardtail 2:322ad3eef278 109
hardtail 4:49ee58dc8e4d 110 void pwmout_all_init(pwmout_all_t* obj, PinName pin) {
hardtail 0:64b18a3829f1 111 MBED_ASSERT(pin != (uint32_t)NC);
hardtail 0:64b18a3829f1 112 int sct_n = get_available_sct();
hardtail 2:322ad3eef278 113
hardtail 0:64b18a3829f1 114 if (sct_n == -1) {
hardtail 0:64b18a3829f1 115 error("No available SCT");
hardtail 0:64b18a3829f1 116 }
hardtail 2:322ad3eef278 117
hardtail 0:64b18a3829f1 118 sct_used |= (1 << sct_n);
hardtail 2:322ad3eef278 119 //obj->pwm = SCTs[sct_n];
hardtail 2:322ad3eef278 120 obj->pwm = check_SCT_module(pin);
hardtail 2:322ad3eef278 121
hardtail 2:322ad3eef278 122 //obj->pwm_ch = sct_n;
hardtail 2:322ad3eef278 123 obj->pwm_ch = pwm_ch_map(pin);
hardtail 2:322ad3eef278 124
hardtail 2:322ad3eef278 125 obj->out_ch = pwm_out_map[pin];
hardtail 2:322ad3eef278 126 obj->pin = (int)pin;
hardtail 2:322ad3eef278 127
hardtail 0:64b18a3829f1 128 LPC_SCT0_Type* pwm = obj->pwm;
hardtail 0:64b18a3829f1 129
hardtail 0:64b18a3829f1 130 // Enable the SCT clock
hardtail 0:64b18a3829f1 131 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << (obj->pwm_ch + 2));
hardtail 0:64b18a3829f1 132
hardtail 0:64b18a3829f1 133 // Clear peripheral reset the SCT:
hardtail 2:322ad3eef278 134 //LPC_SYSCON->PRESETCTRL1 |= (1 << (obj->pwm_ch + 2));
hardtail 2:322ad3eef278 135 //LPC_SYSCON->PRESETCTRL1 &= ~(1 << (obj->pwm_ch + 2));
hardtail 2:322ad3eef278 136
hardtail 0:64b18a3829f1 137 switch(obj->pwm_ch) {
hardtail 0:64b18a3829f1 138 case 0:
hardtail 0:64b18a3829f1 139 // SCT0_OUT0
hardtail 2:322ad3eef278 140 //LPC_SWM->PINASSIGN[7] &= ~0x0000FF00;
hardtail 2:322ad3eef278 141 //LPC_SWM->PINASSIGN[7] |= (pin << 8);
hardtail 2:322ad3eef278 142
hardtail 2:322ad3eef278 143 switch(obj->out_ch){
hardtail 2:322ad3eef278 144 case 0:
hardtail 2:322ad3eef278 145 LPC_SWM->PINASSIGN[7] &= ~0x0000FF00;
hardtail 2:322ad3eef278 146 LPC_SWM->PINASSIGN[7] |= (pin << 8);
hardtail 2:322ad3eef278 147 break;
hardtail 2:322ad3eef278 148
hardtail 2:322ad3eef278 149 case 1:
hardtail 2:322ad3eef278 150 LPC_SWM->PINASSIGN[7] &= ~0x00FF0000;
hardtail 2:322ad3eef278 151 LPC_SWM->PINASSIGN[7] |= (pin << 16);
hardtail 2:322ad3eef278 152 break;
hardtail 2:322ad3eef278 153
hardtail 2:322ad3eef278 154 case 2:
hardtail 2:322ad3eef278 155 LPC_SWM->PINASSIGN[7] &= ~0xFF000000;
hardtail 2:322ad3eef278 156 LPC_SWM->PINASSIGN[7] |= (pin << 24);
hardtail 2:322ad3eef278 157 break;
hardtail 2:322ad3eef278 158
hardtail 2:322ad3eef278 159 case 3:
hardtail 2:322ad3eef278 160 LPC_SWM->PINENABLE1 &= ~(1 << 5);
hardtail 2:322ad3eef278 161 break;
hardtail 2:322ad3eef278 162
hardtail 2:322ad3eef278 163 case 4:
hardtail 2:322ad3eef278 164 LPC_SWM->PINENABLE1 &= ~(1 << 6);
hardtail 2:322ad3eef278 165 break;
hardtail 2:322ad3eef278 166
hardtail 2:322ad3eef278 167 case 5:
hardtail 2:322ad3eef278 168 LPC_SWM->PINENABLE1 &= ~(1 << 7);
hardtail 2:322ad3eef278 169 break;
hardtail 2:322ad3eef278 170
hardtail 2:322ad3eef278 171 case 6:
hardtail 2:322ad3eef278 172 LPC_SWM->PINENABLE1 &= ~(1 << 8);
hardtail 2:322ad3eef278 173 break;
hardtail 2:322ad3eef278 174 }
hardtail 0:64b18a3829f1 175 break;
hardtail 2:322ad3eef278 176
hardtail 0:64b18a3829f1 177 case 1:
hardtail 0:64b18a3829f1 178 // SCT1_OUT0
hardtail 2:322ad3eef278 179 //LPC_SWM->PINASSIGN[8] &= ~0x000000FF;
hardtail 2:322ad3eef278 180 //LPC_SWM->PINASSIGN[8] |= (pin);
hardtail 2:322ad3eef278 181
hardtail 2:322ad3eef278 182 switch(obj->out_ch){
hardtail 2:322ad3eef278 183 case 0:
hardtail 2:322ad3eef278 184 LPC_SWM->PINASSIGN[8] &= ~0x000000FF;
hardtail 2:322ad3eef278 185 LPC_SWM->PINASSIGN[8] |= (pin);
hardtail 2:322ad3eef278 186 break;
hardtail 2:322ad3eef278 187
hardtail 2:322ad3eef278 188 case 1:
hardtail 2:322ad3eef278 189 LPC_SWM->PINASSIGN[8] &= ~0x0000FF00;
hardtail 2:322ad3eef278 190 LPC_SWM->PINASSIGN[8] |= (pin << 8);
hardtail 2:322ad3eef278 191 break;
hardtail 2:322ad3eef278 192
hardtail 2:322ad3eef278 193 case 2:
hardtail 2:322ad3eef278 194 LPC_SWM->PINASSIGN[8] &= ~0x00FF0000;
hardtail 2:322ad3eef278 195 LPC_SWM->PINASSIGN[8] |= (pin << 16);
hardtail 2:322ad3eef278 196 break;
hardtail 2:322ad3eef278 197
hardtail 2:322ad3eef278 198 case 3:
hardtail 2:322ad3eef278 199 LPC_SWM->PINENABLE1 &= ~(1 << 10);
hardtail 2:322ad3eef278 200 break;
hardtail 2:322ad3eef278 201
hardtail 2:322ad3eef278 202 case 4:
hardtail 2:322ad3eef278 203 LPC_SWM->PINENABLE1 &= ~(1 << 11);
hardtail 2:322ad3eef278 204 break;
hardtail 2:322ad3eef278 205
hardtail 2:322ad3eef278 206 case 5:
hardtail 2:322ad3eef278 207 LPC_SWM->PINENABLE1 &= ~(1 << 12);
hardtail 2:322ad3eef278 208 break;
hardtail 2:322ad3eef278 209
hardtail 2:322ad3eef278 210 case 6:
hardtail 2:322ad3eef278 211 LPC_SWM->PINENABLE1 &= ~(1 << 13);
hardtail 2:322ad3eef278 212 LPC_SWM->PINENABLE1 |= (1 << 22);
hardtail 2:322ad3eef278 213 LPC_SWM->PINENABLE1 |= (1 << 23);
hardtail 2:322ad3eef278 214 break;
hardtail 2:322ad3eef278 215 }
hardtail 0:64b18a3829f1 216 break;
hardtail 2:322ad3eef278 217
hardtail 0:64b18a3829f1 218 case 2:
hardtail 0:64b18a3829f1 219 // SCT2_OUT0
hardtail 2:322ad3eef278 220 // LPC_SWM->PINASSIGN[8] &= ~0xFF000000;
hardtail 2:322ad3eef278 221 //LPC_SWM->PINASSIGN[8] |= (pin << 24);
hardtail 2:322ad3eef278 222
hardtail 2:322ad3eef278 223 switch(obj->out_ch){
hardtail 2:322ad3eef278 224 case 0:
hardtail 2:322ad3eef278 225 LPC_SWM->PINASSIGN[8] &= ~0xFF000000;
hardtail 2:322ad3eef278 226 LPC_SWM->PINASSIGN[8] |= (pin << 24);
hardtail 2:322ad3eef278 227 break;
hardtail 2:322ad3eef278 228
hardtail 2:322ad3eef278 229 case 1:
hardtail 2:322ad3eef278 230 LPC_SWM->PINASSIGN[9] &= ~0x000000FF;
hardtail 2:322ad3eef278 231 LPC_SWM->PINASSIGN[9] |= (pin );
hardtail 2:322ad3eef278 232 break;
hardtail 2:322ad3eef278 233
hardtail 2:322ad3eef278 234 case 2:
hardtail 2:322ad3eef278 235 LPC_SWM->PINASSIGN[9] &= ~0x0000FF00;
hardtail 2:322ad3eef278 236 LPC_SWM->PINASSIGN[9] |= (pin << 8);
hardtail 2:322ad3eef278 237 break;
hardtail 2:322ad3eef278 238
hardtail 2:322ad3eef278 239 case 3:
hardtail 2:322ad3eef278 240 LPC_SWM->PINENABLE1 &= ~(1 << 15);
hardtail 2:322ad3eef278 241 break;
hardtail 2:322ad3eef278 242
hardtail 2:322ad3eef278 243 case 4:
hardtail 2:322ad3eef278 244 LPC_SWM->PINENABLE1 &= ~(1 << 16);
hardtail 2:322ad3eef278 245 break;
hardtail 2:322ad3eef278 246
hardtail 2:322ad3eef278 247 }
hardtail 2:322ad3eef278 248 break;
hardtail 0:64b18a3829f1 249 case 3:
hardtail 0:64b18a3829f1 250 // SCT3_OUT0
hardtail 2:322ad3eef278 251 //LPC_SWM->PINASSIGN[9] &= ~0x00FF0000;
hardtail 2:322ad3eef278 252 //LPC_SWM->PINASSIGN[9] |= (pin << 16);
hardtail 2:322ad3eef278 253
hardtail 2:322ad3eef278 254 switch(obj->out_ch){
hardtail 2:322ad3eef278 255 case 0:
hardtail 2:322ad3eef278 256 LPC_SWM->PINASSIGN[9] &= ~0x00FF0000;
hardtail 2:322ad3eef278 257 LPC_SWM->PINASSIGN[9] |= (pin << 16);
hardtail 2:322ad3eef278 258 break;
hardtail 2:322ad3eef278 259
hardtail 2:322ad3eef278 260 case 1:
hardtail 2:322ad3eef278 261 LPC_SWM->PINASSIGN[9] &= ~0xFF000000;
hardtail 2:322ad3eef278 262 LPC_SWM->PINASSIGN[9] |= (pin )<<24;
hardtail 2:322ad3eef278 263 break;
hardtail 2:322ad3eef278 264
hardtail 2:322ad3eef278 265 case 2:
hardtail 2:322ad3eef278 266 LPC_SWM->PINASSIGN[10] &= ~0x000000FF;
hardtail 2:322ad3eef278 267 LPC_SWM->PINASSIGN[10] |= (pin );
hardtail 2:322ad3eef278 268 break;
hardtail 2:322ad3eef278 269
hardtail 2:322ad3eef278 270 case 3:
hardtail 2:322ad3eef278 271 LPC_SWM->PINENABLE1 &= ~(1 << 18);
hardtail 2:322ad3eef278 272 break;
hardtail 2:322ad3eef278 273
hardtail 2:322ad3eef278 274 }
hardtail 0:64b18a3829f1 275 break;
hardtail 0:64b18a3829f1 276 default:
hardtail 0:64b18a3829f1 277 break;
hardtail 0:64b18a3829f1 278 }
hardtail 2:322ad3eef278 279
hardtail 0:64b18a3829f1 280 // Unified 32-bit counter, autolimit
hardtail 0:64b18a3829f1 281 pwm->CONFIG |= ((0x3 << 17) | 0x01);
hardtail 0:64b18a3829f1 282
hardtail 0:64b18a3829f1 283 // halt and clear the counter
hardtail 0:64b18a3829f1 284 pwm->CTRL |= (1 << 2) | (1 << 3);
hardtail 0:64b18a3829f1 285
hardtail 0:64b18a3829f1 286 // System Clock -> us_ticker (1)MHz
hardtail 0:64b18a3829f1 287 pwm->CTRL &= ~(0x7F << 5);
hardtail 0:64b18a3829f1 288 pwm->CTRL |= (((SystemCoreClock/1000000 - 1) & 0x7F) << 5);
hardtail 0:64b18a3829f1 289
hardtail 0:64b18a3829f1 290 // Match reload register
hardtail 0:64b18a3829f1 291 pwm->MATCHREL0 = 20000; // 20ms
hardtail 2:322ad3eef278 292 //pwm->MATCHREL1 = (pwm->MATCHREL0 / 4); // 50% duty
hardtail 2:322ad3eef278 293 switch(obj->out_ch){
hardtail 2:322ad3eef278 294 case 0:
hardtail 2:322ad3eef278 295 pwm->MATCHREL1 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 296 break;
hardtail 2:322ad3eef278 297
hardtail 2:322ad3eef278 298 case 1:
hardtail 2:322ad3eef278 299 pwm->MATCHREL2 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 300 break;
hardtail 2:322ad3eef278 301
hardtail 2:322ad3eef278 302 case 2:
hardtail 2:322ad3eef278 303 pwm->MATCHREL3 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 304 break;
hardtail 2:322ad3eef278 305
hardtail 2:322ad3eef278 306 case 3:
hardtail 2:322ad3eef278 307 pwm->MATCHREL4 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 308 break;
hardtail 2:322ad3eef278 309
hardtail 2:322ad3eef278 310 case 4:
hardtail 2:322ad3eef278 311 pwm->MATCHREL5 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 312 break;
hardtail 2:322ad3eef278 313
hardtail 2:322ad3eef278 314 case 5:
hardtail 2:322ad3eef278 315 pwm->MATCHREL6 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 316 break;
hardtail 2:322ad3eef278 317
hardtail 2:322ad3eef278 318 case 6:
hardtail 2:322ad3eef278 319 pwm->MATCHREL7 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 320 break;
hardtail 2:322ad3eef278 321 }
hardtail 2:322ad3eef278 322
hardtail 0:64b18a3829f1 323
hardtail 2:322ad3eef278 324 //pwm->OUT0_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 325 //pwm->OUT0_CLR = (1 << 1); // event 1
hardtail 2:322ad3eef278 326 switch(obj->out_ch){
hardtail 2:322ad3eef278 327 case 0:
hardtail 2:322ad3eef278 328 pwm->OUT0_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 329 break;
hardtail 2:322ad3eef278 330
hardtail 2:322ad3eef278 331 case 1:
hardtail 2:322ad3eef278 332 pwm->OUT1_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 333 break;
hardtail 2:322ad3eef278 334
hardtail 2:322ad3eef278 335 case 2:
hardtail 2:322ad3eef278 336 pwm->OUT2_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 337 break;
hardtail 2:322ad3eef278 338
hardtail 2:322ad3eef278 339 case 3:
hardtail 2:322ad3eef278 340 pwm->OUT3_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 341 break;
hardtail 2:322ad3eef278 342
hardtail 2:322ad3eef278 343 case 4:
hardtail 2:322ad3eef278 344 pwm->OUT4_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 345 break;
hardtail 2:322ad3eef278 346
hardtail 2:322ad3eef278 347 case 5:
hardtail 2:322ad3eef278 348 pwm->OUT5_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 349 break;
hardtail 2:322ad3eef278 350
hardtail 2:322ad3eef278 351 case 6:
hardtail 2:322ad3eef278 352 pwm->OUT6_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 353 break;
hardtail 2:322ad3eef278 354 }
hardtail 2:322ad3eef278 355
hardtail 2:322ad3eef278 356 switch(obj->out_ch){
hardtail 2:322ad3eef278 357 case 0:
hardtail 2:322ad3eef278 358 pwm->OUT0_CLR = (1 << 1); // event 1
hardtail 2:322ad3eef278 359 break;
hardtail 2:322ad3eef278 360
hardtail 2:322ad3eef278 361 case 1:
hardtail 2:322ad3eef278 362 pwm->OUT1_CLR = (1 << 2); // event 2
hardtail 2:322ad3eef278 363 break;
hardtail 2:322ad3eef278 364
hardtail 2:322ad3eef278 365 case 2:
hardtail 2:322ad3eef278 366 pwm->OUT2_CLR = (1 << 3); // event 3
hardtail 2:322ad3eef278 367 break;
hardtail 2:322ad3eef278 368
hardtail 2:322ad3eef278 369 case 3:
hardtail 2:322ad3eef278 370 pwm->OUT3_CLR = (1 << 4); // event 4
hardtail 2:322ad3eef278 371 break;
hardtail 2:322ad3eef278 372
hardtail 2:322ad3eef278 373 case 4:
hardtail 2:322ad3eef278 374 pwm->OUT4_CLR = (1 << 5); // event 5
hardtail 2:322ad3eef278 375 break;
hardtail 2:322ad3eef278 376
hardtail 2:322ad3eef278 377 case 5:
hardtail 2:322ad3eef278 378 pwm->OUT5_CLR = (1 << 6); // event 6
hardtail 2:322ad3eef278 379 break;
hardtail 2:322ad3eef278 380
hardtail 2:322ad3eef278 381 case 6:
hardtail 2:322ad3eef278 382 pwm->OUT6_CLR = (1 << 7); // event 7
hardtail 2:322ad3eef278 383 break;
hardtail 2:322ad3eef278 384 }
hardtail 2:322ad3eef278 385
hardtail 2:322ad3eef278 386
hardtail 0:64b18a3829f1 387 pwm->EV0_CTRL = (1 << 12);
hardtail 0:64b18a3829f1 388 pwm->EV0_STATE = 0xFFFFFFFF;
hardtail 2:322ad3eef278 389
hardtail 2:322ad3eef278 390 //pwm->EV1_CTRL = (1 << 12) | (1 << 0);
hardtail 2:322ad3eef278 391 //pwm->EV1_STATE = 0xFFFFFFFF;
hardtail 2:322ad3eef278 392 switch(obj->out_ch){
hardtail 2:322ad3eef278 393 case 0:
hardtail 2:322ad3eef278 394 pwm->EV1_CTRL = (1 << 12) | (1);
hardtail 2:322ad3eef278 395 pwm->EV1_STATE = 0xFFFFFFFF; // event 1
hardtail 2:322ad3eef278 396 break;
hardtail 2:322ad3eef278 397
hardtail 2:322ad3eef278 398 case 1:
hardtail 2:322ad3eef278 399 pwm->EV2_CTRL = (1 << 12) | (2);
hardtail 2:322ad3eef278 400 pwm->EV2_STATE = 0xFFFFFFFF; // event 2
hardtail 2:322ad3eef278 401 break;
hardtail 2:322ad3eef278 402
hardtail 2:322ad3eef278 403 case 2:
hardtail 2:322ad3eef278 404 pwm->EV3_CTRL = (1 << 12) | (3);
hardtail 2:322ad3eef278 405 pwm->EV3_STATE = 0xFFFFFFFF; // event 3
hardtail 2:322ad3eef278 406 break;
hardtail 2:322ad3eef278 407
hardtail 2:322ad3eef278 408 case 3:
hardtail 2:322ad3eef278 409 pwm->EV4_CTRL = (1 << 12) | (4);
hardtail 2:322ad3eef278 410 pwm->EV4_STATE = 0xFFFFFFFF; // event 4
hardtail 2:322ad3eef278 411 break;
hardtail 2:322ad3eef278 412
hardtail 2:322ad3eef278 413 case 4:
hardtail 2:322ad3eef278 414 pwm->EV5_CTRL = (1 << 12) | (5);
hardtail 2:322ad3eef278 415 pwm->EV5_STATE = 0xFFFFFFFF; // event 5
hardtail 2:322ad3eef278 416 break;
hardtail 2:322ad3eef278 417
hardtail 2:322ad3eef278 418 case 5:
hardtail 2:322ad3eef278 419 pwm->EV6_CTRL = (1 << 12) | (6);
hardtail 2:322ad3eef278 420 pwm->EV6_STATE = 0xFFFFFFFF; // event 6
hardtail 2:322ad3eef278 421 break;
hardtail 2:322ad3eef278 422
hardtail 2:322ad3eef278 423 case 6:
hardtail 2:322ad3eef278 424 pwm->EV7_CTRL = (1 << 12) | (7);
hardtail 2:322ad3eef278 425 pwm->EV7_STATE = 0xFFFFFFFF; // event 6
hardtail 2:322ad3eef278 426 break;
hardtail 2:322ad3eef278 427
hardtail 2:322ad3eef278 428 }
hardtail 0:64b18a3829f1 429
hardtail 0:64b18a3829f1 430 // unhalt the counter:
hardtail 0:64b18a3829f1 431 // - clearing bit 2 of the CTRL register
hardtail 0:64b18a3829f1 432 pwm->CTRL &= ~(1 << 2);
hardtail 0:64b18a3829f1 433
hardtail 0:64b18a3829f1 434 // default to 20ms: standard for servos, and fine for e.g. brightness control
hardtail 4:49ee58dc8e4d 435 pwmout_all_period_ms(obj, 20);
hardtail 4:49ee58dc8e4d 436 pwmout_all_write (obj, 0.5);
hardtail 0:64b18a3829f1 437 }
hardtail 0:64b18a3829f1 438
hardtail 4:49ee58dc8e4d 439
hardtail 4:49ee58dc8e4d 440 void pwmout_all_free(pwmout_all_t* obj) {
hardtail 0:64b18a3829f1 441 // Disable the SCT clock
hardtail 0:64b18a3829f1 442 LPC_SYSCON->SYSAHBCLKCTRL1 &= ~(1 << (obj->pwm_ch + 2));
hardtail 0:64b18a3829f1 443 sct_used &= ~(1 << obj->pwm_ch);
hardtail 0:64b18a3829f1 444 }
hardtail 0:64b18a3829f1 445
hardtail 4:49ee58dc8e4d 446 void pwmout_all_write(pwmout_all_t* obj, float value) {
hardtail 0:64b18a3829f1 447 LPC_SCT0_Type* pwm = obj->pwm;
hardtail 0:64b18a3829f1 448 if (value < 0.0f) {
hardtail 0:64b18a3829f1 449 value = 0.0;
hardtail 0:64b18a3829f1 450 } else if (value > 1.0f) {
hardtail 0:64b18a3829f1 451 value = 1.0;
hardtail 0:64b18a3829f1 452 }
hardtail 0:64b18a3829f1 453 uint32_t t_on = (uint32_t)((float)(pwm->MATCHREL0) * value);
hardtail 2:322ad3eef278 454 //pwm->MATCHREL1 = t_on;
hardtail 2:322ad3eef278 455 switch(obj->out_ch){
hardtail 2:322ad3eef278 456 case 0:
hardtail 2:322ad3eef278 457 pwm->MATCHREL1 = t_on;
hardtail 2:322ad3eef278 458 break;
hardtail 2:322ad3eef278 459
hardtail 2:322ad3eef278 460 case 1:
hardtail 2:322ad3eef278 461 pwm->MATCHREL2 = t_on;
hardtail 2:322ad3eef278 462 break;
hardtail 2:322ad3eef278 463
hardtail 2:322ad3eef278 464 case 2:
hardtail 2:322ad3eef278 465 pwm->MATCHREL3 = t_on;
hardtail 2:322ad3eef278 466 break;
hardtail 2:322ad3eef278 467
hardtail 2:322ad3eef278 468 case 3:
hardtail 2:322ad3eef278 469 pwm->MATCHREL4 = t_on;
hardtail 2:322ad3eef278 470 break;
hardtail 2:322ad3eef278 471
hardtail 2:322ad3eef278 472 case 4:
hardtail 2:322ad3eef278 473 pwm->MATCHREL5 = t_on;
hardtail 2:322ad3eef278 474 break;
hardtail 2:322ad3eef278 475
hardtail 2:322ad3eef278 476 case 5:
hardtail 2:322ad3eef278 477 pwm->MATCHREL6 = t_on;
hardtail 2:322ad3eef278 478 break;
hardtail 2:322ad3eef278 479
hardtail 2:322ad3eef278 480 case 6:
hardtail 2:322ad3eef278 481 pwm->MATCHREL7 = t_on;
hardtail 2:322ad3eef278 482 break;
hardtail 2:322ad3eef278 483 }
hardtail 0:64b18a3829f1 484 }
hardtail 0:64b18a3829f1 485
hardtail 4:49ee58dc8e4d 486 float pwmout_all_read(pwmout_all_t* obj) {
hardtail 0:64b18a3829f1 487 uint32_t t_off = obj->pwm->MATCHREL0;
hardtail 0:64b18a3829f1 488 uint32_t t_on = obj->pwm->MATCHREL1;
hardtail 0:64b18a3829f1 489 float v = (float)t_on/(float)t_off;
hardtail 0:64b18a3829f1 490 return (v > 1.0f) ? (1.0f) : (v);
hardtail 0:64b18a3829f1 491 }
hardtail 0:64b18a3829f1 492
hardtail 4:49ee58dc8e4d 493 void pwmout_all_period(pwmout_all_t* obj, float seconds) {
hardtail 4:49ee58dc8e4d 494 pwmout_all_period_us(obj, seconds * 1000000.0f);
hardtail 0:64b18a3829f1 495 }
hardtail 0:64b18a3829f1 496
hardtail 4:49ee58dc8e4d 497 void pwmout_all_period_ms(pwmout_all_t* obj, int ms) {
hardtail 4:49ee58dc8e4d 498 pwmout_all_period_us(obj, ms * 1000);
hardtail 0:64b18a3829f1 499 }
hardtail 0:64b18a3829f1 500
hardtail 0:64b18a3829f1 501 // Set the PWM period, keeping the duty cycle the same.
hardtail 4:49ee58dc8e4d 502 void pwmout_all_period_us(pwmout_all_t* obj, int us) {
hardtail 0:64b18a3829f1 503 LPC_SCT0_Type* pwm = obj->pwm;
hardtail 0:64b18a3829f1 504 uint32_t t_off = pwm->MATCHREL0;
hardtail 0:64b18a3829f1 505 uint32_t t_on = pwm->MATCHREL1;
hardtail 0:64b18a3829f1 506 float v = (float)t_on/(float)t_off;
hardtail 0:64b18a3829f1 507 pwm->MATCHREL0 = (uint32_t)us;
hardtail 2:322ad3eef278 508 //pwm->MATCHREL1 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 509 switch(obj->out_ch){
hardtail 2:322ad3eef278 510 case 0:
hardtail 2:322ad3eef278 511 pwm->MATCHREL1 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 512 break;
hardtail 2:322ad3eef278 513
hardtail 2:322ad3eef278 514 case 1:
hardtail 2:322ad3eef278 515 pwm->MATCHREL2 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 516 break;
hardtail 2:322ad3eef278 517
hardtail 2:322ad3eef278 518 case 2:
hardtail 2:322ad3eef278 519 pwm->MATCHREL3 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 520 break;
hardtail 2:322ad3eef278 521
hardtail 2:322ad3eef278 522 case 3:
hardtail 2:322ad3eef278 523 pwm->MATCHREL4 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 524 break;
hardtail 2:322ad3eef278 525
hardtail 2:322ad3eef278 526 case 4:
hardtail 2:322ad3eef278 527 pwm->MATCHREL5 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 528 break;
hardtail 2:322ad3eef278 529
hardtail 2:322ad3eef278 530 case 5:
hardtail 2:322ad3eef278 531 pwm->MATCHREL6 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 532 break;
hardtail 2:322ad3eef278 533
hardtail 2:322ad3eef278 534 case 6:
hardtail 2:322ad3eef278 535 pwm->MATCHREL7 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 536 break;
hardtail 2:322ad3eef278 537 }
hardtail 0:64b18a3829f1 538 }
hardtail 0:64b18a3829f1 539
hardtail 4:49ee58dc8e4d 540 void pwmout_all_pulsewidth(pwmout_all_t* obj, float seconds) {
hardtail 4:49ee58dc8e4d 541 pwmout_all_pulsewidth_us(obj, seconds * 1000000.0f);
hardtail 0:64b18a3829f1 542 }
hardtail 0:64b18a3829f1 543
hardtail 4:49ee58dc8e4d 544 void pwmout_all_pulsewidth_ms(pwmout_all_t* obj, int ms) {
hardtail 4:49ee58dc8e4d 545 pwmout_all_pulsewidth_us(obj, ms * 1000);
hardtail 0:64b18a3829f1 546 }
hardtail 0:64b18a3829f1 547
hardtail 4:49ee58dc8e4d 548 void pwmout_all_pulsewidth_us(pwmout_all_t* obj, int us) {
hardtail 2:322ad3eef278 549 //obj->pwm->MATCHREL1 = (uint32_t)us;
hardtail 2:322ad3eef278 550 switch(obj->out_ch){
hardtail 2:322ad3eef278 551 case 0:
hardtail 2:322ad3eef278 552 obj->pwm->MATCHREL1 = (uint32_t)us;
hardtail 2:322ad3eef278 553 break;
hardtail 2:322ad3eef278 554
hardtail 2:322ad3eef278 555 case 1:
hardtail 2:322ad3eef278 556 obj->pwm->MATCHREL2 = (uint32_t)us;
hardtail 2:322ad3eef278 557 break;
hardtail 2:322ad3eef278 558
hardtail 2:322ad3eef278 559 case 2:
hardtail 2:322ad3eef278 560 obj->pwm->MATCHREL3 = (uint32_t)us;
hardtail 2:322ad3eef278 561 break;
hardtail 2:322ad3eef278 562
hardtail 2:322ad3eef278 563 case 3:
hardtail 2:322ad3eef278 564 obj->pwm->MATCHREL4 = (uint32_t)us;
hardtail 2:322ad3eef278 565 break;
hardtail 2:322ad3eef278 566
hardtail 2:322ad3eef278 567 case 4:
hardtail 2:322ad3eef278 568 obj->pwm->MATCHREL5 = (uint32_t)us;
hardtail 2:322ad3eef278 569 break;
hardtail 2:322ad3eef278 570
hardtail 2:322ad3eef278 571 case 5:
hardtail 2:322ad3eef278 572 obj->pwm->MATCHREL6 = (uint32_t)us;
hardtail 2:322ad3eef278 573 break;
hardtail 2:322ad3eef278 574
hardtail 2:322ad3eef278 575 case 6:
hardtail 2:322ad3eef278 576 obj->pwm->MATCHREL7 = (uint32_t)us;
hardtail 2:322ad3eef278 577 break;
hardtail 2:322ad3eef278 578 }
hardtail 0:64b18a3829f1 579 }