takaaki mastuzawa / pwm_all_out

MATSU-bed(LPC1549)でPWMを4つ以上出すプログラム

Dependents:   servo_controller_1549

pwm_all_api.c@2:322ad3eef278, 2018-01-09 (annotated)

Committer:
hardtail
Date:
Tue Jan 09 10:08:34 2018 +0000
Revision:
2:322ad3eef278
Parent:
1:aefedd6b2a6f 
update;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hardtail 0:64b18a3829f1 1 /* mbed Microcontroller Library
hardtail 0:64b18a3829f1 2 * Copyright (c) 2006-2013 ARM Limited
hardtail 0:64b18a3829f1 3 *
hardtail 0:64b18a3829f1 4 * Licensed under the Apache License, Version 2.0 (the "License");
hardtail 0:64b18a3829f1 5 * you may not use this file except in compliance with the License.
hardtail 0:64b18a3829f1 6 * You may obtain a copy of the License at
hardtail 0:64b18a3829f1 7 *
hardtail 0:64b18a3829f1 8 * http://www.apache.org/licenses/LICENSE-2.0
hardtail 0:64b18a3829f1 9 *
hardtail 0:64b18a3829f1 10 * Unless required by applicable law or agreed to in writing, software
hardtail 0:64b18a3829f1 11 * distributed under the License is distributed on an "AS IS" BASIS,
hardtail 0:64b18a3829f1 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
hardtail 0:64b18a3829f1 13 * See the License for the specific language governing permissions and
hardtail 0:64b18a3829f1 14 * limitations under the License.
hardtail 0:64b18a3829f1 15 */
hardtail 0:64b18a3829f1 16 #include "mbed_assert.h"
hardtail 0:64b18a3829f1 17 #include "pwm_all_api.h"
hardtail 0:64b18a3829f1 18 #include "cmsis.h"
hardtail 0:64b18a3829f1 19 #include "pinmap.h"
hardtail 0:64b18a3829f1 20 #include "mbed_error.h"
hardtail 0:64b18a3829f1 21
hardtail 0:64b18a3829f1 22 static LPC_SCT0_Type *SCTs[4] = {
hardtail 0:64b18a3829f1 23 (LPC_SCT0_Type*)LPC_SCT0,
hardtail 0:64b18a3829f1 24 (LPC_SCT0_Type*)LPC_SCT1,
hardtail 0:64b18a3829f1 25 (LPC_SCT0_Type*)LPC_SCT2,
hardtail 0:64b18a3829f1 26 (LPC_SCT0_Type*)LPC_SCT3,
hardtail 0:64b18a3829f1 27 };
hardtail 0:64b18a3829f1 28
hardtail 0:64b18a3829f1 29 // bit flags for used SCTs
hardtail 0:64b18a3829f1 30 static unsigned char sct_used = 0;
hardtail 0:64b18a3829f1 31 static int get_available_sct(void) {
hardtail 0:64b18a3829f1 32 int i;
hardtail 2:322ad3eef278 33 for (i=0; i<24; i++) {
hardtail 0:64b18a3829f1 34 if ((sct_used & (1 << i)) == 0)
hardtail 0:64b18a3829f1 35 return i;
hardtail 0:64b18a3829f1 36 }
hardtail 0:64b18a3829f1 37 return -1;
hardtail 0:64b18a3829f1 38 }
hardtail 0:64b18a3829f1 39
hardtail 2:322ad3eef278 40 static LPC_SCT0_Type *check_SCT_module(PinName pin){
hardtail 2:322ad3eef278 41 switch((int)pin){
hardtail 2:322ad3eef278 42 case P0_0:
hardtail 2:322ad3eef278 43 case P0_1:
hardtail 2:322ad3eef278 44 case P0_5:
hardtail 2:322ad3eef278 45 case P0_7:
hardtail 2:322ad3eef278 46 case P0_8:
hardtail 2:322ad3eef278 47 case P0_18:
hardtail 2:322ad3eef278 48 return (LPC_SCT0_Type*)LPC_SCT0;
hardtail 2:322ad3eef278 49 break;
hardtail 2:322ad3eef278 50
hardtail 2:322ad3eef278 51 case P0_2:
hardtail 2:322ad3eef278 52 case P0_3:
hardtail 2:322ad3eef278 53 case P0_9:
hardtail 2:322ad3eef278 54 case P0_10:
hardtail 2:322ad3eef278 55 case P0_11:
hardtail 2:322ad3eef278 56 case P0_14:
hardtail 2:322ad3eef278 57 case P0_20:
hardtail 2:322ad3eef278 58 return (LPC_SCT0_Type*)LPC_SCT1;
hardtail 2:322ad3eef278 59 break;
hardtail 2:322ad3eef278 60
hardtail 2:322ad3eef278 61 case P0_6:
hardtail 2:322ad3eef278 62 case P0_12:
hardtail 2:322ad3eef278 63 return (LPC_SCT0_Type*)LPC_SCT2;
hardtail 2:322ad3eef278 64 break;
hardtail 2:322ad3eef278 65
hardtail 2:322ad3eef278 66 case P0_15:
hardtail 2:322ad3eef278 67 case P0_17:
hardtail 2:322ad3eef278 68 case P0_19:
hardtail 2:322ad3eef278 69 return (LPC_SCT0_Type*)LPC_SCT3;
hardtail 2:322ad3eef278 70 break;
hardtail 2:322ad3eef278 71
hardtail 2:322ad3eef278 72 }
hardtail 2:322ad3eef278 73 }
hardtail 2:322ad3eef278 74
hardtail 2:322ad3eef278 75 uint32_t pwm_ch_map(PinName pin){
hardtail 2:322ad3eef278 76 switch((int)pin){
hardtail 2:322ad3eef278 77 case P0_0:
hardtail 2:322ad3eef278 78 case P0_1:
hardtail 2:322ad3eef278 79 case P0_5:
hardtail 2:322ad3eef278 80 case P0_7:
hardtail 2:322ad3eef278 81 case P0_8:
hardtail 2:322ad3eef278 82 case P0_18:
hardtail 2:322ad3eef278 83 return 0;
hardtail 2:322ad3eef278 84 break;
hardtail 2:322ad3eef278 85
hardtail 2:322ad3eef278 86 case P0_2:
hardtail 2:322ad3eef278 87 case P0_3:
hardtail 2:322ad3eef278 88 case P0_9:
hardtail 2:322ad3eef278 89 case P0_10:
hardtail 2:322ad3eef278 90 case P0_11:
hardtail 2:322ad3eef278 91 case P0_14:
hardtail 2:322ad3eef278 92 case P0_20:
hardtail 2:322ad3eef278 93 return 1;
hardtail 2:322ad3eef278 94 break;
hardtail 2:322ad3eef278 95
hardtail 2:322ad3eef278 96 case P0_6:
hardtail 2:322ad3eef278 97 case P0_12:
hardtail 2:322ad3eef278 98 return 2;
hardtail 2:322ad3eef278 99 break;
hardtail 2:322ad3eef278 100
hardtail 2:322ad3eef278 101 case P0_15:
hardtail 2:322ad3eef278 102 case P0_17:
hardtail 2:322ad3eef278 103 case P0_19:
hardtail 2:322ad3eef278 104 return 3;
hardtail 2:322ad3eef278 105 break;
hardtail 2:322ad3eef278 106
hardtail 2:322ad3eef278 107 }
hardtail 2:322ad3eef278 108 }
hardtail 2:322ad3eef278 109
hardtail 2:322ad3eef278 110 uint32_t pwm_out_map[] = {3, 4, 3, 4, 0, 0, 3, 1, 2, 0, 1, 2, 1, 0, 5, 0, 0, 1, 5, 2, 6, 6, 0};
hardtail 2:322ad3eef278 111
hardtail 2:322ad3eef278 112 void pwmout_init(pwmout_t* obj, PinName pin) {
hardtail 0:64b18a3829f1 113 MBED_ASSERT(pin != (uint32_t)NC);
hardtail 0:64b18a3829f1 114 int sct_n = get_available_sct();
hardtail 2:322ad3eef278 115
hardtail 0:64b18a3829f1 116 if (sct_n == -1) {
hardtail 0:64b18a3829f1 117 error("No available SCT");
hardtail 0:64b18a3829f1 118 }
hardtail 2:322ad3eef278 119
hardtail 0:64b18a3829f1 120 sct_used |= (1 << sct_n);
hardtail 2:322ad3eef278 121 //obj->pwm = SCTs[sct_n];
hardtail 2:322ad3eef278 122 obj->pwm = check_SCT_module(pin);
hardtail 2:322ad3eef278 123
hardtail 2:322ad3eef278 124 //obj->pwm_ch = sct_n;
hardtail 2:322ad3eef278 125 obj->pwm_ch = pwm_ch_map(pin);
hardtail 2:322ad3eef278 126
hardtail 2:322ad3eef278 127 obj->out_ch = pwm_out_map[pin];
hardtail 2:322ad3eef278 128 obj->pin = (int)pin;
hardtail 2:322ad3eef278 129
hardtail 0:64b18a3829f1 130 LPC_SCT0_Type* pwm = obj->pwm;
hardtail 0:64b18a3829f1 131
hardtail 0:64b18a3829f1 132 // Enable the SCT clock
hardtail 0:64b18a3829f1 133 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << (obj->pwm_ch + 2));
hardtail 0:64b18a3829f1 134
hardtail 0:64b18a3829f1 135 // Clear peripheral reset the SCT:
hardtail 2:322ad3eef278 136 //LPC_SYSCON->PRESETCTRL1 |= (1 << (obj->pwm_ch + 2));
hardtail 2:322ad3eef278 137 //LPC_SYSCON->PRESETCTRL1 &= ~(1 << (obj->pwm_ch + 2));
hardtail 2:322ad3eef278 138
hardtail 0:64b18a3829f1 139 switch(obj->pwm_ch) {
hardtail 0:64b18a3829f1 140 case 0:
hardtail 0:64b18a3829f1 141 // SCT0_OUT0
hardtail 2:322ad3eef278 142 //LPC_SWM->PINASSIGN[7] &= ~0x0000FF00;
hardtail 2:322ad3eef278 143 //LPC_SWM->PINASSIGN[7] |= (pin << 8);
hardtail 2:322ad3eef278 144
hardtail 2:322ad3eef278 145 switch(obj->out_ch){
hardtail 2:322ad3eef278 146 case 0:
hardtail 2:322ad3eef278 147 LPC_SWM->PINASSIGN[7] &= ~0x0000FF00;
hardtail 2:322ad3eef278 148 LPC_SWM->PINASSIGN[7] |= (pin << 8);
hardtail 2:322ad3eef278 149 break;
hardtail 2:322ad3eef278 150
hardtail 2:322ad3eef278 151 case 1:
hardtail 2:322ad3eef278 152 LPC_SWM->PINASSIGN[7] &= ~0x00FF0000;
hardtail 2:322ad3eef278 153 LPC_SWM->PINASSIGN[7] |= (pin << 16);
hardtail 2:322ad3eef278 154 break;
hardtail 2:322ad3eef278 155
hardtail 2:322ad3eef278 156 case 2:
hardtail 2:322ad3eef278 157 LPC_SWM->PINASSIGN[7] &= ~0xFF000000;
hardtail 2:322ad3eef278 158 LPC_SWM->PINASSIGN[7] |= (pin << 24);
hardtail 2:322ad3eef278 159 break;
hardtail 2:322ad3eef278 160
hardtail 2:322ad3eef278 161 case 3:
hardtail 2:322ad3eef278 162 LPC_SWM->PINENABLE1 &= ~(1 << 5);
hardtail 2:322ad3eef278 163 break;
hardtail 2:322ad3eef278 164
hardtail 2:322ad3eef278 165 case 4:
hardtail 2:322ad3eef278 166 LPC_SWM->PINENABLE1 &= ~(1 << 6);
hardtail 2:322ad3eef278 167 break;
hardtail 2:322ad3eef278 168
hardtail 2:322ad3eef278 169 case 5:
hardtail 2:322ad3eef278 170 LPC_SWM->PINENABLE1 &= ~(1 << 7);
hardtail 2:322ad3eef278 171 break;
hardtail 2:322ad3eef278 172
hardtail 2:322ad3eef278 173 case 6:
hardtail 2:322ad3eef278 174 LPC_SWM->PINENABLE1 &= ~(1 << 8);
hardtail 2:322ad3eef278 175 break;
hardtail 2:322ad3eef278 176 }
hardtail 0:64b18a3829f1 177 break;
hardtail 2:322ad3eef278 178
hardtail 0:64b18a3829f1 179 case 1:
hardtail 0:64b18a3829f1 180 // SCT1_OUT0
hardtail 2:322ad3eef278 181 //LPC_SWM->PINASSIGN[8] &= ~0x000000FF;
hardtail 2:322ad3eef278 182 //LPC_SWM->PINASSIGN[8] |= (pin);
hardtail 2:322ad3eef278 183
hardtail 2:322ad3eef278 184 switch(obj->out_ch){
hardtail 2:322ad3eef278 185 case 0:
hardtail 2:322ad3eef278 186 LPC_SWM->PINASSIGN[8] &= ~0x000000FF;
hardtail 2:322ad3eef278 187 LPC_SWM->PINASSIGN[8] |= (pin);
hardtail 2:322ad3eef278 188 break;
hardtail 2:322ad3eef278 189
hardtail 2:322ad3eef278 190 case 1:
hardtail 2:322ad3eef278 191 LPC_SWM->PINASSIGN[8] &= ~0x0000FF00;
hardtail 2:322ad3eef278 192 LPC_SWM->PINASSIGN[8] |= (pin << 8);
hardtail 2:322ad3eef278 193 break;
hardtail 2:322ad3eef278 194
hardtail 2:322ad3eef278 195 case 2:
hardtail 2:322ad3eef278 196 LPC_SWM->PINASSIGN[8] &= ~0x00FF0000;
hardtail 2:322ad3eef278 197 LPC_SWM->PINASSIGN[8] |= (pin << 16);
hardtail 2:322ad3eef278 198 break;
hardtail 2:322ad3eef278 199
hardtail 2:322ad3eef278 200 case 3:
hardtail 2:322ad3eef278 201 LPC_SWM->PINENABLE1 &= ~(1 << 10);
hardtail 2:322ad3eef278 202 break;
hardtail 2:322ad3eef278 203
hardtail 2:322ad3eef278 204 case 4:
hardtail 2:322ad3eef278 205 LPC_SWM->PINENABLE1 &= ~(1 << 11);
hardtail 2:322ad3eef278 206 break;
hardtail 2:322ad3eef278 207
hardtail 2:322ad3eef278 208 case 5:
hardtail 2:322ad3eef278 209 LPC_SWM->PINENABLE1 &= ~(1 << 12);
hardtail 2:322ad3eef278 210 break;
hardtail 2:322ad3eef278 211
hardtail 2:322ad3eef278 212 case 6:
hardtail 2:322ad3eef278 213 LPC_SWM->PINENABLE1 &= ~(1 << 13);
hardtail 2:322ad3eef278 214 LPC_SWM->PINENABLE1 |= (1 << 22);
hardtail 2:322ad3eef278 215 LPC_SWM->PINENABLE1 |= (1 << 23);
hardtail 2:322ad3eef278 216 break;
hardtail 2:322ad3eef278 217 }
hardtail 0:64b18a3829f1 218 break;
hardtail 2:322ad3eef278 219
hardtail 0:64b18a3829f1 220 case 2:
hardtail 0:64b18a3829f1 221 // SCT2_OUT0
hardtail 2:322ad3eef278 222 // LPC_SWM->PINASSIGN[8] &= ~0xFF000000;
hardtail 2:322ad3eef278 223 //LPC_SWM->PINASSIGN[8] |= (pin << 24);
hardtail 2:322ad3eef278 224
hardtail 2:322ad3eef278 225 switch(obj->out_ch){
hardtail 2:322ad3eef278 226 case 0:
hardtail 2:322ad3eef278 227 LPC_SWM->PINASSIGN[8] &= ~0xFF000000;
hardtail 2:322ad3eef278 228 LPC_SWM->PINASSIGN[8] |= (pin << 24);
hardtail 2:322ad3eef278 229 break;
hardtail 2:322ad3eef278 230
hardtail 2:322ad3eef278 231 case 1:
hardtail 2:322ad3eef278 232 LPC_SWM->PINASSIGN[9] &= ~0x000000FF;
hardtail 2:322ad3eef278 233 LPC_SWM->PINASSIGN[9] |= (pin );
hardtail 2:322ad3eef278 234 break;
hardtail 2:322ad3eef278 235
hardtail 2:322ad3eef278 236 case 2:
hardtail 2:322ad3eef278 237 LPC_SWM->PINASSIGN[9] &= ~0x0000FF00;
hardtail 2:322ad3eef278 238 LPC_SWM->PINASSIGN[9] |= (pin << 8);
hardtail 2:322ad3eef278 239 break;
hardtail 2:322ad3eef278 240
hardtail 2:322ad3eef278 241 case 3:
hardtail 2:322ad3eef278 242 LPC_SWM->PINENABLE1 &= ~(1 << 15);
hardtail 2:322ad3eef278 243 break;
hardtail 2:322ad3eef278 244
hardtail 2:322ad3eef278 245 case 4:
hardtail 2:322ad3eef278 246 LPC_SWM->PINENABLE1 &= ~(1 << 16);
hardtail 2:322ad3eef278 247 break;
hardtail 2:322ad3eef278 248
hardtail 2:322ad3eef278 249 }
hardtail 2:322ad3eef278 250 break;
hardtail 0:64b18a3829f1 251 case 3:
hardtail 0:64b18a3829f1 252 // SCT3_OUT0
hardtail 2:322ad3eef278 253 //LPC_SWM->PINASSIGN[9] &= ~0x00FF0000;
hardtail 2:322ad3eef278 254 //LPC_SWM->PINASSIGN[9] |= (pin << 16);
hardtail 2:322ad3eef278 255
hardtail 2:322ad3eef278 256 switch(obj->out_ch){
hardtail 2:322ad3eef278 257 case 0:
hardtail 2:322ad3eef278 258 LPC_SWM->PINASSIGN[9] &= ~0x00FF0000;
hardtail 2:322ad3eef278 259 LPC_SWM->PINASSIGN[9] |= (pin << 16);
hardtail 2:322ad3eef278 260 break;
hardtail 2:322ad3eef278 261
hardtail 2:322ad3eef278 262 case 1:
hardtail 2:322ad3eef278 263 LPC_SWM->PINASSIGN[9] &= ~0xFF000000;
hardtail 2:322ad3eef278 264 LPC_SWM->PINASSIGN[9] |= (pin )<<24;
hardtail 2:322ad3eef278 265 break;
hardtail 2:322ad3eef278 266
hardtail 2:322ad3eef278 267 case 2:
hardtail 2:322ad3eef278 268 LPC_SWM->PINASSIGN[10] &= ~0x000000FF;
hardtail 2:322ad3eef278 269 LPC_SWM->PINASSIGN[10] |= (pin );
hardtail 2:322ad3eef278 270 break;
hardtail 2:322ad3eef278 271
hardtail 2:322ad3eef278 272 case 3:
hardtail 2:322ad3eef278 273 LPC_SWM->PINENABLE1 &= ~(1 << 18);
hardtail 2:322ad3eef278 274 break;
hardtail 2:322ad3eef278 275
hardtail 2:322ad3eef278 276 }
hardtail 0:64b18a3829f1 277 break;
hardtail 0:64b18a3829f1 278 default:
hardtail 0:64b18a3829f1 279 break;
hardtail 0:64b18a3829f1 280 }
hardtail 2:322ad3eef278 281
hardtail 0:64b18a3829f1 282 // Unified 32-bit counter, autolimit
hardtail 0:64b18a3829f1 283 pwm->CONFIG |= ((0x3 << 17) | 0x01);
hardtail 0:64b18a3829f1 284
hardtail 0:64b18a3829f1 285 // halt and clear the counter
hardtail 0:64b18a3829f1 286 pwm->CTRL |= (1 << 2) | (1 << 3);
hardtail 0:64b18a3829f1 287
hardtail 0:64b18a3829f1 288 // System Clock -> us_ticker (1)MHz
hardtail 0:64b18a3829f1 289 pwm->CTRL &= ~(0x7F << 5);
hardtail 0:64b18a3829f1 290 pwm->CTRL |= (((SystemCoreClock/1000000 - 1) & 0x7F) << 5);
hardtail 0:64b18a3829f1 291
hardtail 0:64b18a3829f1 292 // Match reload register
hardtail 0:64b18a3829f1 293 pwm->MATCHREL0 = 20000; // 20ms
hardtail 2:322ad3eef278 294 //pwm->MATCHREL1 = (pwm->MATCHREL0 / 4); // 50% duty
hardtail 2:322ad3eef278 295 switch(obj->out_ch){
hardtail 2:322ad3eef278 296 case 0:
hardtail 2:322ad3eef278 297 pwm->MATCHREL1 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 298 break;
hardtail 2:322ad3eef278 299
hardtail 2:322ad3eef278 300 case 1:
hardtail 2:322ad3eef278 301 pwm->MATCHREL2 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 302 break;
hardtail 2:322ad3eef278 303
hardtail 2:322ad3eef278 304 case 2:
hardtail 2:322ad3eef278 305 pwm->MATCHREL3 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 306 break;
hardtail 2:322ad3eef278 307
hardtail 2:322ad3eef278 308 case 3:
hardtail 2:322ad3eef278 309 pwm->MATCHREL4 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 310 break;
hardtail 2:322ad3eef278 311
hardtail 2:322ad3eef278 312 case 4:
hardtail 2:322ad3eef278 313 pwm->MATCHREL5 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 314 break;
hardtail 2:322ad3eef278 315
hardtail 2:322ad3eef278 316 case 5:
hardtail 2:322ad3eef278 317 pwm->MATCHREL6 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 318 break;
hardtail 2:322ad3eef278 319
hardtail 2:322ad3eef278 320 case 6:
hardtail 2:322ad3eef278 321 pwm->MATCHREL7 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 322 break;
hardtail 2:322ad3eef278 323 }
hardtail 2:322ad3eef278 324
hardtail 0:64b18a3829f1 325
hardtail 2:322ad3eef278 326 //pwm->OUT0_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 327 //pwm->OUT0_CLR = (1 << 1); // event 1
hardtail 2:322ad3eef278 328 switch(obj->out_ch){
hardtail 2:322ad3eef278 329 case 0:
hardtail 2:322ad3eef278 330 pwm->OUT0_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 331 break;
hardtail 2:322ad3eef278 332
hardtail 2:322ad3eef278 333 case 1:
hardtail 2:322ad3eef278 334 pwm->OUT1_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 335 break;
hardtail 2:322ad3eef278 336
hardtail 2:322ad3eef278 337 case 2:
hardtail 2:322ad3eef278 338 pwm->OUT2_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 339 break;
hardtail 2:322ad3eef278 340
hardtail 2:322ad3eef278 341 case 3:
hardtail 2:322ad3eef278 342 pwm->OUT3_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 343 break;
hardtail 2:322ad3eef278 344
hardtail 2:322ad3eef278 345 case 4:
hardtail 2:322ad3eef278 346 pwm->OUT4_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 347 break;
hardtail 2:322ad3eef278 348
hardtail 2:322ad3eef278 349 case 5:
hardtail 2:322ad3eef278 350 pwm->OUT5_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 351 break;
hardtail 2:322ad3eef278 352
hardtail 2:322ad3eef278 353 case 6:
hardtail 2:322ad3eef278 354 pwm->OUT6_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 355 break;
hardtail 2:322ad3eef278 356 }
hardtail 2:322ad3eef278 357
hardtail 2:322ad3eef278 358 switch(obj->out_ch){
hardtail 2:322ad3eef278 359 case 0:
hardtail 2:322ad3eef278 360 pwm->OUT0_CLR = (1 << 1); // event 1
hardtail 2:322ad3eef278 361 break;
hardtail 2:322ad3eef278 362
hardtail 2:322ad3eef278 363 case 1:
hardtail 2:322ad3eef278 364 pwm->OUT1_CLR = (1 << 2); // event 2
hardtail 2:322ad3eef278 365 break;
hardtail 2:322ad3eef278 366
hardtail 2:322ad3eef278 367 case 2:
hardtail 2:322ad3eef278 368 pwm->OUT2_CLR = (1 << 3); // event 3
hardtail 2:322ad3eef278 369 break;
hardtail 2:322ad3eef278 370
hardtail 2:322ad3eef278 371 case 3:
hardtail 2:322ad3eef278 372 pwm->OUT3_CLR = (1 << 4); // event 4
hardtail 2:322ad3eef278 373 break;
hardtail 2:322ad3eef278 374
hardtail 2:322ad3eef278 375 case 4:
hardtail 2:322ad3eef278 376 pwm->OUT4_CLR = (1 << 5); // event 5
hardtail 2:322ad3eef278 377 break;
hardtail 2:322ad3eef278 378
hardtail 2:322ad3eef278 379 case 5:
hardtail 2:322ad3eef278 380 pwm->OUT5_CLR = (1 << 6); // event 6
hardtail 2:322ad3eef278 381 break;
hardtail 2:322ad3eef278 382
hardtail 2:322ad3eef278 383 case 6:
hardtail 2:322ad3eef278 384 pwm->OUT6_CLR = (1 << 7); // event 7
hardtail 2:322ad3eef278 385 break;
hardtail 2:322ad3eef278 386 }
hardtail 2:322ad3eef278 387
hardtail 2:322ad3eef278 388
hardtail 0:64b18a3829f1 389 pwm->EV0_CTRL = (1 << 12);
hardtail 0:64b18a3829f1 390 pwm->EV0_STATE = 0xFFFFFFFF;
hardtail 2:322ad3eef278 391
hardtail 2:322ad3eef278 392 //pwm->EV1_CTRL = (1 << 12) | (1 << 0);
hardtail 2:322ad3eef278 393 //pwm->EV1_STATE = 0xFFFFFFFF;
hardtail 2:322ad3eef278 394 switch(obj->out_ch){
hardtail 2:322ad3eef278 395 case 0:
hardtail 2:322ad3eef278 396 pwm->EV1_CTRL = (1 << 12) | (1);
hardtail 2:322ad3eef278 397 pwm->EV1_STATE = 0xFFFFFFFF; // event 1
hardtail 2:322ad3eef278 398 break;
hardtail 2:322ad3eef278 399
hardtail 2:322ad3eef278 400 case 1:
hardtail 2:322ad3eef278 401 pwm->EV2_CTRL = (1 << 12) | (2);
hardtail 2:322ad3eef278 402 pwm->EV2_STATE = 0xFFFFFFFF; // event 2
hardtail 2:322ad3eef278 403 break;
hardtail 2:322ad3eef278 404
hardtail 2:322ad3eef278 405 case 2:
hardtail 2:322ad3eef278 406 pwm->EV3_CTRL = (1 << 12) | (3);
hardtail 2:322ad3eef278 407 pwm->EV3_STATE = 0xFFFFFFFF; // event 3
hardtail 2:322ad3eef278 408 break;
hardtail 2:322ad3eef278 409
hardtail 2:322ad3eef278 410 case 3:
hardtail 2:322ad3eef278 411 pwm->EV4_CTRL = (1 << 12) | (4);
hardtail 2:322ad3eef278 412 pwm->EV4_STATE = 0xFFFFFFFF; // event 4
hardtail 2:322ad3eef278 413 break;
hardtail 2:322ad3eef278 414
hardtail 2:322ad3eef278 415 case 4:
hardtail 2:322ad3eef278 416 pwm->EV5_CTRL = (1 << 12) | (5);
hardtail 2:322ad3eef278 417 pwm->EV5_STATE = 0xFFFFFFFF; // event 5
hardtail 2:322ad3eef278 418 break;
hardtail 2:322ad3eef278 419
hardtail 2:322ad3eef278 420 case 5:
hardtail 2:322ad3eef278 421 pwm->EV6_CTRL = (1 << 12) | (6);
hardtail 2:322ad3eef278 422 pwm->EV6_STATE = 0xFFFFFFFF; // event 6
hardtail 2:322ad3eef278 423 break;
hardtail 2:322ad3eef278 424
hardtail 2:322ad3eef278 425 case 6:
hardtail 2:322ad3eef278 426 pwm->EV7_CTRL = (1 << 12) | (7);
hardtail 2:322ad3eef278 427 pwm->EV7_STATE = 0xFFFFFFFF; // event 6
hardtail 2:322ad3eef278 428 break;
hardtail 2:322ad3eef278 429
hardtail 2:322ad3eef278 430 }
hardtail 0:64b18a3829f1 431
hardtail 0:64b18a3829f1 432 // unhalt the counter:
hardtail 0:64b18a3829f1 433 // - clearing bit 2 of the CTRL register
hardtail 0:64b18a3829f1 434 pwm->CTRL &= ~(1 << 2);
hardtail 0:64b18a3829f1 435
hardtail 0:64b18a3829f1 436 // default to 20ms: standard for servos, and fine for e.g. brightness control
hardtail 2:322ad3eef278 437 pwmout_period_ms(obj, 20);
hardtail 2:322ad3eef278 438 pwmout_write (obj, 0.5);
hardtail 0:64b18a3829f1 439 }
hardtail 0:64b18a3829f1 440
hardtail 2:322ad3eef278 441 void pwmout_free(pwmout_t* obj) {
hardtail 0:64b18a3829f1 442 // Disable the SCT clock
hardtail 0:64b18a3829f1 443 LPC_SYSCON->SYSAHBCLKCTRL1 &= ~(1 << (obj->pwm_ch + 2));
hardtail 0:64b18a3829f1 444 sct_used &= ~(1 << obj->pwm_ch);
hardtail 0:64b18a3829f1 445 }
hardtail 0:64b18a3829f1 446
hardtail 2:322ad3eef278 447 void pwmout_write(pwmout_t* obj, float value) {
hardtail 0:64b18a3829f1 448 LPC_SCT0_Type* pwm = obj->pwm;
hardtail 0:64b18a3829f1 449 if (value < 0.0f) {
hardtail 0:64b18a3829f1 450 value = 0.0;
hardtail 0:64b18a3829f1 451 } else if (value > 1.0f) {
hardtail 0:64b18a3829f1 452 value = 1.0;
hardtail 0:64b18a3829f1 453 }
hardtail 0:64b18a3829f1 454 uint32_t t_on = (uint32_t)((float)(pwm->MATCHREL0) * value);
hardtail 2:322ad3eef278 455 //pwm->MATCHREL1 = t_on;
hardtail 2:322ad3eef278 456 switch(obj->out_ch){
hardtail 2:322ad3eef278 457 case 0:
hardtail 2:322ad3eef278 458 pwm->MATCHREL1 = t_on;
hardtail 2:322ad3eef278 459 break;
hardtail 2:322ad3eef278 460
hardtail 2:322ad3eef278 461 case 1:
hardtail 2:322ad3eef278 462 pwm->MATCHREL2 = t_on;
hardtail 2:322ad3eef278 463 break;
hardtail 2:322ad3eef278 464
hardtail 2:322ad3eef278 465 case 2:
hardtail 2:322ad3eef278 466 pwm->MATCHREL3 = t_on;
hardtail 2:322ad3eef278 467 break;
hardtail 2:322ad3eef278 468
hardtail 2:322ad3eef278 469 case 3:
hardtail 2:322ad3eef278 470 pwm->MATCHREL4 = t_on;
hardtail 2:322ad3eef278 471 break;
hardtail 2:322ad3eef278 472
hardtail 2:322ad3eef278 473 case 4:
hardtail 2:322ad3eef278 474 pwm->MATCHREL5 = t_on;
hardtail 2:322ad3eef278 475 break;
hardtail 2:322ad3eef278 476
hardtail 2:322ad3eef278 477 case 5:
hardtail 2:322ad3eef278 478 pwm->MATCHREL6 = t_on;
hardtail 2:322ad3eef278 479 break;
hardtail 2:322ad3eef278 480
hardtail 2:322ad3eef278 481 case 6:
hardtail 2:322ad3eef278 482 pwm->MATCHREL7 = t_on;
hardtail 2:322ad3eef278 483 break;
hardtail 2:322ad3eef278 484 }
hardtail 0:64b18a3829f1 485 }
hardtail 0:64b18a3829f1 486
hardtail 2:322ad3eef278 487 float pwmout_read(pwmout_t* obj) {
hardtail 0:64b18a3829f1 488 uint32_t t_off = obj->pwm->MATCHREL0;
hardtail 0:64b18a3829f1 489 uint32_t t_on = obj->pwm->MATCHREL1;
hardtail 0:64b18a3829f1 490 float v = (float)t_on/(float)t_off;
hardtail 0:64b18a3829f1 491 return (v > 1.0f) ? (1.0f) : (v);
hardtail 0:64b18a3829f1 492 }
hardtail 0:64b18a3829f1 493
hardtail 2:322ad3eef278 494 void pwmout_period(pwmout_t* obj, float seconds) {
hardtail 2:322ad3eef278 495 pwmout_period_us(obj, seconds * 1000000.0f);
hardtail 0:64b18a3829f1 496 }
hardtail 0:64b18a3829f1 497
hardtail 2:322ad3eef278 498 void pwmout_period_ms(pwmout_t* obj, int ms) {
hardtail 2:322ad3eef278 499 pwmout_period_us(obj, ms * 1000);
hardtail 0:64b18a3829f1 500 }
hardtail 0:64b18a3829f1 501
hardtail 0:64b18a3829f1 502 // Set the PWM period, keeping the duty cycle the same.
hardtail 2:322ad3eef278 503 void pwmout_period_us(pwmout_t* obj, int us) {
hardtail 0:64b18a3829f1 504 LPC_SCT0_Type* pwm = obj->pwm;
hardtail 0:64b18a3829f1 505 uint32_t t_off = pwm->MATCHREL0;
hardtail 0:64b18a3829f1 506 uint32_t t_on = pwm->MATCHREL1;
hardtail 0:64b18a3829f1 507 float v = (float)t_on/(float)t_off;
hardtail 0:64b18a3829f1 508 pwm->MATCHREL0 = (uint32_t)us;
hardtail 2:322ad3eef278 509 //pwm->MATCHREL1 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 510 switch(obj->out_ch){
hardtail 2:322ad3eef278 511 case 0:
hardtail 2:322ad3eef278 512 pwm->MATCHREL1 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 513 break;
hardtail 2:322ad3eef278 514
hardtail 2:322ad3eef278 515 case 1:
hardtail 2:322ad3eef278 516 pwm->MATCHREL2 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 517 break;
hardtail 2:322ad3eef278 518
hardtail 2:322ad3eef278 519 case 2:
hardtail 2:322ad3eef278 520 pwm->MATCHREL3 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 521 break;
hardtail 2:322ad3eef278 522
hardtail 2:322ad3eef278 523 case 3:
hardtail 2:322ad3eef278 524 pwm->MATCHREL4 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 525 break;
hardtail 2:322ad3eef278 526
hardtail 2:322ad3eef278 527 case 4:
hardtail 2:322ad3eef278 528 pwm->MATCHREL5 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 529 break;
hardtail 2:322ad3eef278 530
hardtail 2:322ad3eef278 531 case 5:
hardtail 2:322ad3eef278 532 pwm->MATCHREL6 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 533 break;
hardtail 2:322ad3eef278 534
hardtail 2:322ad3eef278 535 case 6:
hardtail 2:322ad3eef278 536 pwm->MATCHREL7 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 537 break;
hardtail 2:322ad3eef278 538 }
hardtail 0:64b18a3829f1 539 }
hardtail 0:64b18a3829f1 540
hardtail 2:322ad3eef278 541 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
hardtail 2:322ad3eef278 542 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
hardtail 0:64b18a3829f1 543 }
hardtail 0:64b18a3829f1 544
hardtail 2:322ad3eef278 545 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
hardtail 2:322ad3eef278 546 pwmout_pulsewidth_us(obj, ms * 1000);
hardtail 0:64b18a3829f1 547 }
hardtail 0:64b18a3829f1 548
hardtail 2:322ad3eef278 549 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
hardtail 2:322ad3eef278 550 //obj->pwm->MATCHREL1 = (uint32_t)us;
hardtail 2:322ad3eef278 551 switch(obj->out_ch){
hardtail 2:322ad3eef278 552 case 0:
hardtail 2:322ad3eef278 553 obj->pwm->MATCHREL1 = (uint32_t)us;
hardtail 2:322ad3eef278 554 break;
hardtail 2:322ad3eef278 555
hardtail 2:322ad3eef278 556 case 1:
hardtail 2:322ad3eef278 557 obj->pwm->MATCHREL2 = (uint32_t)us;
hardtail 2:322ad3eef278 558 break;
hardtail 2:322ad3eef278 559
hardtail 2:322ad3eef278 560 case 2:
hardtail 2:322ad3eef278 561 obj->pwm->MATCHREL3 = (uint32_t)us;
hardtail 2:322ad3eef278 562 break;
hardtail 2:322ad3eef278 563
hardtail 2:322ad3eef278 564 case 3:
hardtail 2:322ad3eef278 565 obj->pwm->MATCHREL4 = (uint32_t)us;
hardtail 2:322ad3eef278 566 break;
hardtail 2:322ad3eef278 567
hardtail 2:322ad3eef278 568 case 4:
hardtail 2:322ad3eef278 569 obj->pwm->MATCHREL5 = (uint32_t)us;
hardtail 2:322ad3eef278 570 break;
hardtail 2:322ad3eef278 571
hardtail 2:322ad3eef278 572 case 5:
hardtail 2:322ad3eef278 573 obj->pwm->MATCHREL6 = (uint32_t)us;
hardtail 2:322ad3eef278 574 break;
hardtail 2:322ad3eef278 575
hardtail 2:322ad3eef278 576 case 6:
hardtail 2:322ad3eef278 577 obj->pwm->MATCHREL7 = (uint32_t)us;
hardtail 2:322ad3eef278 578 break;
hardtail 2:322ad3eef278 579 }
hardtail 0:64b18a3829f1 580 }