takaaki mastuzawa / pwm_all_out

MATSU-bed(LPC1549)でPWMを4つ以上出すプログラム

Dependents:   servo_controller_1549

pwm_all_api.cpp@4:49ee58dc8e4d, 2018-02-17 (annotated)

Committer:
hardtail
Date:
Sat Feb 17 07:23:48 2018 +0000
Revision:
4:49ee58dc8e4d
Parent:
3:af461f11cef6
Child:
5:88243d59b4df
??????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hardtail 0:64b18a3829f1 1 /* mbed Microcontroller Library
hardtail 0:64b18a3829f1 2 * Copyright (c) 2006-2013 ARM Limited
hardtail 0:64b18a3829f1 3 *
hardtail 0:64b18a3829f1 4 * Licensed under the Apache License, Version 2.0 (the "License");
hardtail 0:64b18a3829f1 5 * you may not use this file except in compliance with the License.
hardtail 0:64b18a3829f1 6 * You may obtain a copy of the License at
hardtail 0:64b18a3829f1 7 *
hardtail 0:64b18a3829f1 8 * http://www.apache.org/licenses/LICENSE-2.0
hardtail 0:64b18a3829f1 9 *
hardtail 0:64b18a3829f1 10 * Unless required by applicable law or agreed to in writing, software
hardtail 0:64b18a3829f1 11 * distributed under the License is distributed on an "AS IS" BASIS,
hardtail 0:64b18a3829f1 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
hardtail 0:64b18a3829f1 13 * See the License for the specific language governing permissions and
hardtail 0:64b18a3829f1 14 * limitations under the License.
hardtail 0:64b18a3829f1 15 */
hardtail 0:64b18a3829f1 16 #include "mbed_assert.h"
hardtail 0:64b18a3829f1 17 #include "pwm_all_api.h"
hardtail 0:64b18a3829f1 18 #include "cmsis.h"
hardtail 0:64b18a3829f1 19 #include "pinmap.h"
hardtail 0:64b18a3829f1 20 #include "mbed_error.h"
hardtail 0:64b18a3829f1 21
hardtail 0:64b18a3829f1 22 static LPC_SCT0_Type *SCTs[4] = {
hardtail 0:64b18a3829f1 23 (LPC_SCT0_Type*)LPC_SCT0,
hardtail 0:64b18a3829f1 24 (LPC_SCT0_Type*)LPC_SCT1,
hardtail 0:64b18a3829f1 25 (LPC_SCT0_Type*)LPC_SCT2,
hardtail 0:64b18a3829f1 26 (LPC_SCT0_Type*)LPC_SCT3,
hardtail 0:64b18a3829f1 27 };
hardtail 0:64b18a3829f1 28
hardtail 0:64b18a3829f1 29 // bit flags for used SCTs
hardtail 0:64b18a3829f1 30 static unsigned char sct_used = 0;
hardtail 0:64b18a3829f1 31 static int get_available_sct(void) {
hardtail 0:64b18a3829f1 32 int i;
hardtail 2:322ad3eef278 33 for (i=0; i<24; i++) {
hardtail 0:64b18a3829f1 34 if ((sct_used & (1 << i)) == 0)
hardtail 0:64b18a3829f1 35 return i;
hardtail 0:64b18a3829f1 36 }
hardtail 0:64b18a3829f1 37 return -1;
hardtail 0:64b18a3829f1 38 }
hardtail 0:64b18a3829f1 39
hardtail 2:322ad3eef278 40 static LPC_SCT0_Type *check_SCT_module(PinName pin){
hardtail 2:322ad3eef278 41 switch((int)pin){
hardtail 2:322ad3eef278 42 case P0_0:
hardtail 2:322ad3eef278 43 case P0_1:
hardtail 2:322ad3eef278 44 case P0_5:
hardtail 2:322ad3eef278 45 case P0_7:
hardtail 2:322ad3eef278 46 case P0_8:
hardtail 2:322ad3eef278 47 case P0_18:
hardtail 2:322ad3eef278 48 return (LPC_SCT0_Type*)LPC_SCT0;
hardtail 2:322ad3eef278 49
hardtail 2:322ad3eef278 50 case P0_2:
hardtail 2:322ad3eef278 51 case P0_3:
hardtail 2:322ad3eef278 52 case P0_9:
hardtail 2:322ad3eef278 53 case P0_10:
hardtail 2:322ad3eef278 54 case P0_11:
hardtail 2:322ad3eef278 55 case P0_14:
hardtail 2:322ad3eef278 56 case P0_20:
hardtail 2:322ad3eef278 57 return (LPC_SCT0_Type*)LPC_SCT1;
hardtail 2:322ad3eef278 58
hardtail 2:322ad3eef278 59 case P0_6:
hardtail 2:322ad3eef278 60 case P0_12:
hardtail 2:322ad3eef278 61 return (LPC_SCT0_Type*)LPC_SCT2;
hardtail 2:322ad3eef278 62
hardtail 2:322ad3eef278 63 case P0_15:
hardtail 2:322ad3eef278 64 case P0_17:
hardtail 2:322ad3eef278 65 case P0_19:
hardtail 2:322ad3eef278 66 return (LPC_SCT0_Type*)LPC_SCT3;
hardtail 2:322ad3eef278 67
hardtail 2:322ad3eef278 68 }
hardtail 2:322ad3eef278 69 }
hardtail 2:322ad3eef278 70
hardtail 2:322ad3eef278 71 uint32_t pwm_ch_map(PinName pin){
hardtail 2:322ad3eef278 72 switch((int)pin){
hardtail 2:322ad3eef278 73 case P0_0:
hardtail 2:322ad3eef278 74 case P0_1:
hardtail 2:322ad3eef278 75 case P0_5:
hardtail 2:322ad3eef278 76 case P0_7:
hardtail 2:322ad3eef278 77 case P0_8:
hardtail 2:322ad3eef278 78 case P0_18:
hardtail 2:322ad3eef278 79 return 0;
hardtail 2:322ad3eef278 80
hardtail 2:322ad3eef278 81 case P0_2:
hardtail 2:322ad3eef278 82 case P0_3:
hardtail 2:322ad3eef278 83 case P0_9:
hardtail 2:322ad3eef278 84 case P0_10:
hardtail 2:322ad3eef278 85 case P0_11:
hardtail 2:322ad3eef278 86 case P0_14:
hardtail 2:322ad3eef278 87 case P0_20:
hardtail 2:322ad3eef278 88 return 1;
hardtail 2:322ad3eef278 89
hardtail 2:322ad3eef278 90 case P0_6:
hardtail 2:322ad3eef278 91 case P0_12:
hardtail 2:322ad3eef278 92 return 2;
hardtail 2:322ad3eef278 93
hardtail 2:322ad3eef278 94 case P0_15:
hardtail 2:322ad3eef278 95 case P0_17:
hardtail 2:322ad3eef278 96 case P0_19:
hardtail 2:322ad3eef278 97 return 3;
hardtail 2:322ad3eef278 98
hardtail 2:322ad3eef278 99 }
hardtail 2:322ad3eef278 100 }
hardtail 2:322ad3eef278 101
hardtail 2:322ad3eef278 102 uint32_t pwm_out_map[] = {3, 4, 3, 4, 0, 0, 3, 1, 2, 0, 1, 2, 1, 0, 5, 0, 0, 1, 5, 2, 6, 6, 0};
hardtail 2:322ad3eef278 103
hardtail 4:49ee58dc8e4d 104 void pwmout_all_init(pwmout_all_t* obj, PinName pin) {
hardtail 0:64b18a3829f1 105 MBED_ASSERT(pin != (uint32_t)NC);
hardtail 0:64b18a3829f1 106 int sct_n = get_available_sct();
hardtail 2:322ad3eef278 107
hardtail 0:64b18a3829f1 108 if (sct_n == -1) {
hardtail 0:64b18a3829f1 109 error("No available SCT");
hardtail 0:64b18a3829f1 110 }
hardtail 2:322ad3eef278 111
hardtail 0:64b18a3829f1 112 sct_used |= (1 << sct_n);
hardtail 2:322ad3eef278 113 //obj->pwm = SCTs[sct_n];
hardtail 2:322ad3eef278 114 obj->pwm = check_SCT_module(pin);
hardtail 2:322ad3eef278 115
hardtail 2:322ad3eef278 116 //obj->pwm_ch = sct_n;
hardtail 2:322ad3eef278 117 obj->pwm_ch = pwm_ch_map(pin);
hardtail 2:322ad3eef278 118
hardtail 2:322ad3eef278 119 obj->out_ch = pwm_out_map[pin];
hardtail 2:322ad3eef278 120 obj->pin = (int)pin;
hardtail 2:322ad3eef278 121
hardtail 0:64b18a3829f1 122 LPC_SCT0_Type* pwm = obj->pwm;
hardtail 0:64b18a3829f1 123
hardtail 0:64b18a3829f1 124 // Enable the SCT clock
hardtail 0:64b18a3829f1 125 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << (obj->pwm_ch + 2));
hardtail 0:64b18a3829f1 126
hardtail 0:64b18a3829f1 127 // Clear peripheral reset the SCT:
hardtail 2:322ad3eef278 128 //LPC_SYSCON->PRESETCTRL1 |= (1 << (obj->pwm_ch + 2));
hardtail 2:322ad3eef278 129 //LPC_SYSCON->PRESETCTRL1 &= ~(1 << (obj->pwm_ch + 2));
hardtail 2:322ad3eef278 130
hardtail 0:64b18a3829f1 131 switch(obj->pwm_ch) {
hardtail 0:64b18a3829f1 132 case 0:
hardtail 0:64b18a3829f1 133 // SCT0_OUT0
hardtail 2:322ad3eef278 134 //LPC_SWM->PINASSIGN[7] &= ~0x0000FF00;
hardtail 2:322ad3eef278 135 //LPC_SWM->PINASSIGN[7] |= (pin << 8);
hardtail 2:322ad3eef278 136
hardtail 2:322ad3eef278 137 switch(obj->out_ch){
hardtail 2:322ad3eef278 138 case 0:
hardtail 2:322ad3eef278 139 LPC_SWM->PINASSIGN[7] &= ~0x0000FF00;
hardtail 2:322ad3eef278 140 LPC_SWM->PINASSIGN[7] |= (pin << 8);
hardtail 2:322ad3eef278 141 break;
hardtail 2:322ad3eef278 142
hardtail 2:322ad3eef278 143 case 1:
hardtail 2:322ad3eef278 144 LPC_SWM->PINASSIGN[7] &= ~0x00FF0000;
hardtail 2:322ad3eef278 145 LPC_SWM->PINASSIGN[7] |= (pin << 16);
hardtail 2:322ad3eef278 146 break;
hardtail 2:322ad3eef278 147
hardtail 2:322ad3eef278 148 case 2:
hardtail 2:322ad3eef278 149 LPC_SWM->PINASSIGN[7] &= ~0xFF000000;
hardtail 2:322ad3eef278 150 LPC_SWM->PINASSIGN[7] |= (pin << 24);
hardtail 2:322ad3eef278 151 break;
hardtail 2:322ad3eef278 152
hardtail 2:322ad3eef278 153 case 3:
hardtail 2:322ad3eef278 154 LPC_SWM->PINENABLE1 &= ~(1 << 5);
hardtail 2:322ad3eef278 155 break;
hardtail 2:322ad3eef278 156
hardtail 2:322ad3eef278 157 case 4:
hardtail 2:322ad3eef278 158 LPC_SWM->PINENABLE1 &= ~(1 << 6);
hardtail 2:322ad3eef278 159 break;
hardtail 2:322ad3eef278 160
hardtail 2:322ad3eef278 161 case 5:
hardtail 2:322ad3eef278 162 LPC_SWM->PINENABLE1 &= ~(1 << 7);
hardtail 2:322ad3eef278 163 break;
hardtail 2:322ad3eef278 164
hardtail 2:322ad3eef278 165 case 6:
hardtail 2:322ad3eef278 166 LPC_SWM->PINENABLE1 &= ~(1 << 8);
hardtail 2:322ad3eef278 167 break;
hardtail 2:322ad3eef278 168 }
hardtail 0:64b18a3829f1 169 break;
hardtail 2:322ad3eef278 170
hardtail 0:64b18a3829f1 171 case 1:
hardtail 0:64b18a3829f1 172 // SCT1_OUT0
hardtail 2:322ad3eef278 173 //LPC_SWM->PINASSIGN[8] &= ~0x000000FF;
hardtail 2:322ad3eef278 174 //LPC_SWM->PINASSIGN[8] |= (pin);
hardtail 2:322ad3eef278 175
hardtail 2:322ad3eef278 176 switch(obj->out_ch){
hardtail 2:322ad3eef278 177 case 0:
hardtail 2:322ad3eef278 178 LPC_SWM->PINASSIGN[8] &= ~0x000000FF;
hardtail 2:322ad3eef278 179 LPC_SWM->PINASSIGN[8] |= (pin);
hardtail 2:322ad3eef278 180 break;
hardtail 2:322ad3eef278 181
hardtail 2:322ad3eef278 182 case 1:
hardtail 2:322ad3eef278 183 LPC_SWM->PINASSIGN[8] &= ~0x0000FF00;
hardtail 2:322ad3eef278 184 LPC_SWM->PINASSIGN[8] |= (pin << 8);
hardtail 2:322ad3eef278 185 break;
hardtail 2:322ad3eef278 186
hardtail 2:322ad3eef278 187 case 2:
hardtail 2:322ad3eef278 188 LPC_SWM->PINASSIGN[8] &= ~0x00FF0000;
hardtail 2:322ad3eef278 189 LPC_SWM->PINASSIGN[8] |= (pin << 16);
hardtail 2:322ad3eef278 190 break;
hardtail 2:322ad3eef278 191
hardtail 2:322ad3eef278 192 case 3:
hardtail 2:322ad3eef278 193 LPC_SWM->PINENABLE1 &= ~(1 << 10);
hardtail 2:322ad3eef278 194 break;
hardtail 2:322ad3eef278 195
hardtail 2:322ad3eef278 196 case 4:
hardtail 2:322ad3eef278 197 LPC_SWM->PINENABLE1 &= ~(1 << 11);
hardtail 2:322ad3eef278 198 break;
hardtail 2:322ad3eef278 199
hardtail 2:322ad3eef278 200 case 5:
hardtail 2:322ad3eef278 201 LPC_SWM->PINENABLE1 &= ~(1 << 12);
hardtail 2:322ad3eef278 202 break;
hardtail 2:322ad3eef278 203
hardtail 2:322ad3eef278 204 case 6:
hardtail 2:322ad3eef278 205 LPC_SWM->PINENABLE1 &= ~(1 << 13);
hardtail 2:322ad3eef278 206 LPC_SWM->PINENABLE1 |= (1 << 22);
hardtail 2:322ad3eef278 207 LPC_SWM->PINENABLE1 |= (1 << 23);
hardtail 2:322ad3eef278 208 break;
hardtail 2:322ad3eef278 209 }
hardtail 0:64b18a3829f1 210 break;
hardtail 2:322ad3eef278 211
hardtail 0:64b18a3829f1 212 case 2:
hardtail 0:64b18a3829f1 213 // SCT2_OUT0
hardtail 2:322ad3eef278 214 // LPC_SWM->PINASSIGN[8] &= ~0xFF000000;
hardtail 2:322ad3eef278 215 //LPC_SWM->PINASSIGN[8] |= (pin << 24);
hardtail 2:322ad3eef278 216
hardtail 2:322ad3eef278 217 switch(obj->out_ch){
hardtail 2:322ad3eef278 218 case 0:
hardtail 2:322ad3eef278 219 LPC_SWM->PINASSIGN[8] &= ~0xFF000000;
hardtail 2:322ad3eef278 220 LPC_SWM->PINASSIGN[8] |= (pin << 24);
hardtail 2:322ad3eef278 221 break;
hardtail 2:322ad3eef278 222
hardtail 2:322ad3eef278 223 case 1:
hardtail 2:322ad3eef278 224 LPC_SWM->PINASSIGN[9] &= ~0x000000FF;
hardtail 2:322ad3eef278 225 LPC_SWM->PINASSIGN[9] |= (pin );
hardtail 2:322ad3eef278 226 break;
hardtail 2:322ad3eef278 227
hardtail 2:322ad3eef278 228 case 2:
hardtail 2:322ad3eef278 229 LPC_SWM->PINASSIGN[9] &= ~0x0000FF00;
hardtail 2:322ad3eef278 230 LPC_SWM->PINASSIGN[9] |= (pin << 8);
hardtail 2:322ad3eef278 231 break;
hardtail 2:322ad3eef278 232
hardtail 2:322ad3eef278 233 case 3:
hardtail 2:322ad3eef278 234 LPC_SWM->PINENABLE1 &= ~(1 << 15);
hardtail 2:322ad3eef278 235 break;
hardtail 2:322ad3eef278 236
hardtail 2:322ad3eef278 237 case 4:
hardtail 2:322ad3eef278 238 LPC_SWM->PINENABLE1 &= ~(1 << 16);
hardtail 2:322ad3eef278 239 break;
hardtail 2:322ad3eef278 240
hardtail 2:322ad3eef278 241 }
hardtail 2:322ad3eef278 242 break;
hardtail 0:64b18a3829f1 243 case 3:
hardtail 0:64b18a3829f1 244 // SCT3_OUT0
hardtail 2:322ad3eef278 245 //LPC_SWM->PINASSIGN[9] &= ~0x00FF0000;
hardtail 2:322ad3eef278 246 //LPC_SWM->PINASSIGN[9] |= (pin << 16);
hardtail 2:322ad3eef278 247
hardtail 2:322ad3eef278 248 switch(obj->out_ch){
hardtail 2:322ad3eef278 249 case 0:
hardtail 2:322ad3eef278 250 LPC_SWM->PINASSIGN[9] &= ~0x00FF0000;
hardtail 2:322ad3eef278 251 LPC_SWM->PINASSIGN[9] |= (pin << 16);
hardtail 2:322ad3eef278 252 break;
hardtail 2:322ad3eef278 253
hardtail 2:322ad3eef278 254 case 1:
hardtail 2:322ad3eef278 255 LPC_SWM->PINASSIGN[9] &= ~0xFF000000;
hardtail 2:322ad3eef278 256 LPC_SWM->PINASSIGN[9] |= (pin )<<24;
hardtail 2:322ad3eef278 257 break;
hardtail 2:322ad3eef278 258
hardtail 2:322ad3eef278 259 case 2:
hardtail 2:322ad3eef278 260 LPC_SWM->PINASSIGN[10] &= ~0x000000FF;
hardtail 2:322ad3eef278 261 LPC_SWM->PINASSIGN[10] |= (pin );
hardtail 2:322ad3eef278 262 break;
hardtail 2:322ad3eef278 263
hardtail 2:322ad3eef278 264 case 3:
hardtail 2:322ad3eef278 265 LPC_SWM->PINENABLE1 &= ~(1 << 18);
hardtail 2:322ad3eef278 266 break;
hardtail 2:322ad3eef278 267
hardtail 2:322ad3eef278 268 }
hardtail 0:64b18a3829f1 269 break;
hardtail 0:64b18a3829f1 270 default:
hardtail 0:64b18a3829f1 271 break;
hardtail 0:64b18a3829f1 272 }
hardtail 2:322ad3eef278 273
hardtail 0:64b18a3829f1 274 // Unified 32-bit counter, autolimit
hardtail 0:64b18a3829f1 275 pwm->CONFIG |= ((0x3 << 17) | 0x01);
hardtail 0:64b18a3829f1 276
hardtail 0:64b18a3829f1 277 // halt and clear the counter
hardtail 0:64b18a3829f1 278 pwm->CTRL |= (1 << 2) | (1 << 3);
hardtail 0:64b18a3829f1 279
hardtail 0:64b18a3829f1 280 // System Clock -> us_ticker (1)MHz
hardtail 0:64b18a3829f1 281 pwm->CTRL &= ~(0x7F << 5);
hardtail 0:64b18a3829f1 282 pwm->CTRL |= (((SystemCoreClock/1000000 - 1) & 0x7F) << 5);
hardtail 0:64b18a3829f1 283
hardtail 0:64b18a3829f1 284 // Match reload register
hardtail 0:64b18a3829f1 285 pwm->MATCHREL0 = 20000; // 20ms
hardtail 2:322ad3eef278 286 //pwm->MATCHREL1 = (pwm->MATCHREL0 / 4); // 50% duty
hardtail 2:322ad3eef278 287 switch(obj->out_ch){
hardtail 2:322ad3eef278 288 case 0:
hardtail 2:322ad3eef278 289 pwm->MATCHREL1 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 290 break;
hardtail 2:322ad3eef278 291
hardtail 2:322ad3eef278 292 case 1:
hardtail 2:322ad3eef278 293 pwm->MATCHREL2 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 294 break;
hardtail 2:322ad3eef278 295
hardtail 2:322ad3eef278 296 case 2:
hardtail 2:322ad3eef278 297 pwm->MATCHREL3 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 298 break;
hardtail 2:322ad3eef278 299
hardtail 2:322ad3eef278 300 case 3:
hardtail 2:322ad3eef278 301 pwm->MATCHREL4 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 302 break;
hardtail 2:322ad3eef278 303
hardtail 2:322ad3eef278 304 case 4:
hardtail 2:322ad3eef278 305 pwm->MATCHREL5 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 306 break;
hardtail 2:322ad3eef278 307
hardtail 2:322ad3eef278 308 case 5:
hardtail 2:322ad3eef278 309 pwm->MATCHREL6 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 310 break;
hardtail 2:322ad3eef278 311
hardtail 2:322ad3eef278 312 case 6:
hardtail 2:322ad3eef278 313 pwm->MATCHREL7 = (pwm->MATCHREL0 / 4);
hardtail 2:322ad3eef278 314 break;
hardtail 2:322ad3eef278 315 }
hardtail 2:322ad3eef278 316
hardtail 0:64b18a3829f1 317
hardtail 2:322ad3eef278 318 //pwm->OUT0_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 319 //pwm->OUT0_CLR = (1 << 1); // event 1
hardtail 2:322ad3eef278 320 switch(obj->out_ch){
hardtail 2:322ad3eef278 321 case 0:
hardtail 2:322ad3eef278 322 pwm->OUT0_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 323 break;
hardtail 2:322ad3eef278 324
hardtail 2:322ad3eef278 325 case 1:
hardtail 2:322ad3eef278 326 pwm->OUT1_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 327 break;
hardtail 2:322ad3eef278 328
hardtail 2:322ad3eef278 329 case 2:
hardtail 2:322ad3eef278 330 pwm->OUT2_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 331 break;
hardtail 2:322ad3eef278 332
hardtail 2:322ad3eef278 333 case 3:
hardtail 2:322ad3eef278 334 pwm->OUT3_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 335 break;
hardtail 2:322ad3eef278 336
hardtail 2:322ad3eef278 337 case 4:
hardtail 2:322ad3eef278 338 pwm->OUT4_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 339 break;
hardtail 2:322ad3eef278 340
hardtail 2:322ad3eef278 341 case 5:
hardtail 2:322ad3eef278 342 pwm->OUT5_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 343 break;
hardtail 2:322ad3eef278 344
hardtail 2:322ad3eef278 345 case 6:
hardtail 2:322ad3eef278 346 pwm->OUT6_SET = (1 << 0); // event 0
hardtail 2:322ad3eef278 347 break;
hardtail 2:322ad3eef278 348 }
hardtail 2:322ad3eef278 349
hardtail 2:322ad3eef278 350 switch(obj->out_ch){
hardtail 2:322ad3eef278 351 case 0:
hardtail 2:322ad3eef278 352 pwm->OUT0_CLR = (1 << 1); // event 1
hardtail 2:322ad3eef278 353 break;
hardtail 2:322ad3eef278 354
hardtail 2:322ad3eef278 355 case 1:
hardtail 2:322ad3eef278 356 pwm->OUT1_CLR = (1 << 2); // event 2
hardtail 2:322ad3eef278 357 break;
hardtail 2:322ad3eef278 358
hardtail 2:322ad3eef278 359 case 2:
hardtail 2:322ad3eef278 360 pwm->OUT2_CLR = (1 << 3); // event 3
hardtail 2:322ad3eef278 361 break;
hardtail 2:322ad3eef278 362
hardtail 2:322ad3eef278 363 case 3:
hardtail 2:322ad3eef278 364 pwm->OUT3_CLR = (1 << 4); // event 4
hardtail 2:322ad3eef278 365 break;
hardtail 2:322ad3eef278 366
hardtail 2:322ad3eef278 367 case 4:
hardtail 2:322ad3eef278 368 pwm->OUT4_CLR = (1 << 5); // event 5
hardtail 2:322ad3eef278 369 break;
hardtail 2:322ad3eef278 370
hardtail 2:322ad3eef278 371 case 5:
hardtail 2:322ad3eef278 372 pwm->OUT5_CLR = (1 << 6); // event 6
hardtail 2:322ad3eef278 373 break;
hardtail 2:322ad3eef278 374
hardtail 2:322ad3eef278 375 case 6:
hardtail 2:322ad3eef278 376 pwm->OUT6_CLR = (1 << 7); // event 7
hardtail 2:322ad3eef278 377 break;
hardtail 2:322ad3eef278 378 }
hardtail 2:322ad3eef278 379
hardtail 2:322ad3eef278 380
hardtail 0:64b18a3829f1 381 pwm->EV0_CTRL = (1 << 12);
hardtail 0:64b18a3829f1 382 pwm->EV0_STATE = 0xFFFFFFFF;
hardtail 2:322ad3eef278 383
hardtail 2:322ad3eef278 384 //pwm->EV1_CTRL = (1 << 12) | (1 << 0);
hardtail 2:322ad3eef278 385 //pwm->EV1_STATE = 0xFFFFFFFF;
hardtail 2:322ad3eef278 386 switch(obj->out_ch){
hardtail 2:322ad3eef278 387 case 0:
hardtail 2:322ad3eef278 388 pwm->EV1_CTRL = (1 << 12) | (1);
hardtail 2:322ad3eef278 389 pwm->EV1_STATE = 0xFFFFFFFF; // event 1
hardtail 2:322ad3eef278 390 break;
hardtail 2:322ad3eef278 391
hardtail 2:322ad3eef278 392 case 1:
hardtail 2:322ad3eef278 393 pwm->EV2_CTRL = (1 << 12) | (2);
hardtail 2:322ad3eef278 394 pwm->EV2_STATE = 0xFFFFFFFF; // event 2
hardtail 2:322ad3eef278 395 break;
hardtail 2:322ad3eef278 396
hardtail 2:322ad3eef278 397 case 2:
hardtail 2:322ad3eef278 398 pwm->EV3_CTRL = (1 << 12) | (3);
hardtail 2:322ad3eef278 399 pwm->EV3_STATE = 0xFFFFFFFF; // event 3
hardtail 2:322ad3eef278 400 break;
hardtail 2:322ad3eef278 401
hardtail 2:322ad3eef278 402 case 3:
hardtail 2:322ad3eef278 403 pwm->EV4_CTRL = (1 << 12) | (4);
hardtail 2:322ad3eef278 404 pwm->EV4_STATE = 0xFFFFFFFF; // event 4
hardtail 2:322ad3eef278 405 break;
hardtail 2:322ad3eef278 406
hardtail 2:322ad3eef278 407 case 4:
hardtail 2:322ad3eef278 408 pwm->EV5_CTRL = (1 << 12) | (5);
hardtail 2:322ad3eef278 409 pwm->EV5_STATE = 0xFFFFFFFF; // event 5
hardtail 2:322ad3eef278 410 break;
hardtail 2:322ad3eef278 411
hardtail 2:322ad3eef278 412 case 5:
hardtail 2:322ad3eef278 413 pwm->EV6_CTRL = (1 << 12) | (6);
hardtail 2:322ad3eef278 414 pwm->EV6_STATE = 0xFFFFFFFF; // event 6
hardtail 2:322ad3eef278 415 break;
hardtail 2:322ad3eef278 416
hardtail 2:322ad3eef278 417 case 6:
hardtail 2:322ad3eef278 418 pwm->EV7_CTRL = (1 << 12) | (7);
hardtail 2:322ad3eef278 419 pwm->EV7_STATE = 0xFFFFFFFF; // event 6
hardtail 2:322ad3eef278 420 break;
hardtail 2:322ad3eef278 421
hardtail 2:322ad3eef278 422 }
hardtail 0:64b18a3829f1 423
hardtail 0:64b18a3829f1 424 // unhalt the counter:
hardtail 0:64b18a3829f1 425 // - clearing bit 2 of the CTRL register
hardtail 0:64b18a3829f1 426 pwm->CTRL &= ~(1 << 2);
hardtail 0:64b18a3829f1 427
hardtail 0:64b18a3829f1 428 // default to 20ms: standard for servos, and fine for e.g. brightness control
hardtail 4:49ee58dc8e4d 429 pwmout_all_period_ms(obj, 20);
hardtail 4:49ee58dc8e4d 430 pwmout_all_write (obj, 0.5);
hardtail 0:64b18a3829f1 431 }
hardtail 0:64b18a3829f1 432
hardtail 4:49ee58dc8e4d 433
hardtail 4:49ee58dc8e4d 434 void pwmout_all_free(pwmout_all_t* obj) {
hardtail 0:64b18a3829f1 435 // Disable the SCT clock
hardtail 0:64b18a3829f1 436 LPC_SYSCON->SYSAHBCLKCTRL1 &= ~(1 << (obj->pwm_ch + 2));
hardtail 0:64b18a3829f1 437 sct_used &= ~(1 << obj->pwm_ch);
hardtail 0:64b18a3829f1 438 }
hardtail 0:64b18a3829f1 439
hardtail 4:49ee58dc8e4d 440 void pwmout_all_write(pwmout_all_t* obj, float value) {
hardtail 0:64b18a3829f1 441 LPC_SCT0_Type* pwm = obj->pwm;
hardtail 0:64b18a3829f1 442 if (value < 0.0f) {
hardtail 0:64b18a3829f1 443 value = 0.0;
hardtail 0:64b18a3829f1 444 } else if (value > 1.0f) {
hardtail 0:64b18a3829f1 445 value = 1.0;
hardtail 0:64b18a3829f1 446 }
hardtail 0:64b18a3829f1 447 uint32_t t_on = (uint32_t)((float)(pwm->MATCHREL0) * value);
hardtail 2:322ad3eef278 448 //pwm->MATCHREL1 = t_on;
hardtail 2:322ad3eef278 449 switch(obj->out_ch){
hardtail 2:322ad3eef278 450 case 0:
hardtail 2:322ad3eef278 451 pwm->MATCHREL1 = t_on;
hardtail 2:322ad3eef278 452 break;
hardtail 2:322ad3eef278 453
hardtail 2:322ad3eef278 454 case 1:
hardtail 2:322ad3eef278 455 pwm->MATCHREL2 = t_on;
hardtail 2:322ad3eef278 456 break;
hardtail 2:322ad3eef278 457
hardtail 2:322ad3eef278 458 case 2:
hardtail 2:322ad3eef278 459 pwm->MATCHREL3 = t_on;
hardtail 2:322ad3eef278 460 break;
hardtail 2:322ad3eef278 461
hardtail 2:322ad3eef278 462 case 3:
hardtail 2:322ad3eef278 463 pwm->MATCHREL4 = t_on;
hardtail 2:322ad3eef278 464 break;
hardtail 2:322ad3eef278 465
hardtail 2:322ad3eef278 466 case 4:
hardtail 2:322ad3eef278 467 pwm->MATCHREL5 = t_on;
hardtail 2:322ad3eef278 468 break;
hardtail 2:322ad3eef278 469
hardtail 2:322ad3eef278 470 case 5:
hardtail 2:322ad3eef278 471 pwm->MATCHREL6 = t_on;
hardtail 2:322ad3eef278 472 break;
hardtail 2:322ad3eef278 473
hardtail 2:322ad3eef278 474 case 6:
hardtail 2:322ad3eef278 475 pwm->MATCHREL7 = t_on;
hardtail 2:322ad3eef278 476 break;
hardtail 2:322ad3eef278 477 }
hardtail 0:64b18a3829f1 478 }
hardtail 0:64b18a3829f1 479
hardtail 4:49ee58dc8e4d 480 float pwmout_all_read(pwmout_all_t* obj) {
hardtail 0:64b18a3829f1 481 uint32_t t_off = obj->pwm->MATCHREL0;
hardtail 0:64b18a3829f1 482 uint32_t t_on = obj->pwm->MATCHREL1;
hardtail 0:64b18a3829f1 483 float v = (float)t_on/(float)t_off;
hardtail 0:64b18a3829f1 484 return (v > 1.0f) ? (1.0f) : (v);
hardtail 0:64b18a3829f1 485 }
hardtail 0:64b18a3829f1 486
hardtail 4:49ee58dc8e4d 487 void pwmout_all_period(pwmout_all_t* obj, float seconds) {
hardtail 4:49ee58dc8e4d 488 pwmout_all_period_us(obj, seconds * 1000000.0f);
hardtail 0:64b18a3829f1 489 }
hardtail 0:64b18a3829f1 490
hardtail 4:49ee58dc8e4d 491 void pwmout_all_period_ms(pwmout_all_t* obj, int ms) {
hardtail 4:49ee58dc8e4d 492 pwmout_all_period_us(obj, ms * 1000);
hardtail 0:64b18a3829f1 493 }
hardtail 0:64b18a3829f1 494
hardtail 0:64b18a3829f1 495 // Set the PWM period, keeping the duty cycle the same.
hardtail 4:49ee58dc8e4d 496 void pwmout_all_period_us(pwmout_all_t* obj, int us) {
hardtail 0:64b18a3829f1 497 LPC_SCT0_Type* pwm = obj->pwm;
hardtail 0:64b18a3829f1 498 uint32_t t_off = pwm->MATCHREL0;
hardtail 0:64b18a3829f1 499 uint32_t t_on = pwm->MATCHREL1;
hardtail 0:64b18a3829f1 500 float v = (float)t_on/(float)t_off;
hardtail 0:64b18a3829f1 501 pwm->MATCHREL0 = (uint32_t)us;
hardtail 2:322ad3eef278 502 //pwm->MATCHREL1 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 503 switch(obj->out_ch){
hardtail 2:322ad3eef278 504 case 0:
hardtail 2:322ad3eef278 505 pwm->MATCHREL1 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 506 break;
hardtail 2:322ad3eef278 507
hardtail 2:322ad3eef278 508 case 1:
hardtail 2:322ad3eef278 509 pwm->MATCHREL2 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 510 break;
hardtail 2:322ad3eef278 511
hardtail 2:322ad3eef278 512 case 2:
hardtail 2:322ad3eef278 513 pwm->MATCHREL3 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 514 break;
hardtail 2:322ad3eef278 515
hardtail 2:322ad3eef278 516 case 3:
hardtail 2:322ad3eef278 517 pwm->MATCHREL4 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 518 break;
hardtail 2:322ad3eef278 519
hardtail 2:322ad3eef278 520 case 4:
hardtail 2:322ad3eef278 521 pwm->MATCHREL5 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 522 break;
hardtail 2:322ad3eef278 523
hardtail 2:322ad3eef278 524 case 5:
hardtail 2:322ad3eef278 525 pwm->MATCHREL6 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 526 break;
hardtail 2:322ad3eef278 527
hardtail 2:322ad3eef278 528 case 6:
hardtail 2:322ad3eef278 529 pwm->MATCHREL7 = (uint32_t)((float)us * (float)v);
hardtail 2:322ad3eef278 530 break;
hardtail 2:322ad3eef278 531 }
hardtail 0:64b18a3829f1 532 }
hardtail 0:64b18a3829f1 533
hardtail 4:49ee58dc8e4d 534 void pwmout_all_pulsewidth(pwmout_all_t* obj, float seconds) {
hardtail 4:49ee58dc8e4d 535 pwmout_all_pulsewidth_us(obj, seconds * 1000000.0f);
hardtail 0:64b18a3829f1 536 }
hardtail 0:64b18a3829f1 537
hardtail 4:49ee58dc8e4d 538 void pwmout_all_pulsewidth_ms(pwmout_all_t* obj, int ms) {
hardtail 4:49ee58dc8e4d 539 pwmout_all_pulsewidth_us(obj, ms * 1000);
hardtail 0:64b18a3829f1 540 }
hardtail 0:64b18a3829f1 541
hardtail 4:49ee58dc8e4d 542 void pwmout_all_pulsewidth_us(pwmout_all_t* obj, int us) {
hardtail 2:322ad3eef278 543 //obj->pwm->MATCHREL1 = (uint32_t)us;
hardtail 2:322ad3eef278 544 switch(obj->out_ch){
hardtail 2:322ad3eef278 545 case 0:
hardtail 2:322ad3eef278 546 obj->pwm->MATCHREL1 = (uint32_t)us;
hardtail 2:322ad3eef278 547 break;
hardtail 2:322ad3eef278 548
hardtail 2:322ad3eef278 549 case 1:
hardtail 2:322ad3eef278 550 obj->pwm->MATCHREL2 = (uint32_t)us;
hardtail 2:322ad3eef278 551 break;
hardtail 2:322ad3eef278 552
hardtail 2:322ad3eef278 553 case 2:
hardtail 2:322ad3eef278 554 obj->pwm->MATCHREL3 = (uint32_t)us;
hardtail 2:322ad3eef278 555 break;
hardtail 2:322ad3eef278 556
hardtail 2:322ad3eef278 557 case 3:
hardtail 2:322ad3eef278 558 obj->pwm->MATCHREL4 = (uint32_t)us;
hardtail 2:322ad3eef278 559 break;
hardtail 2:322ad3eef278 560
hardtail 2:322ad3eef278 561 case 4:
hardtail 2:322ad3eef278 562 obj->pwm->MATCHREL5 = (uint32_t)us;
hardtail 2:322ad3eef278 563 break;
hardtail 2:322ad3eef278 564
hardtail 2:322ad3eef278 565 case 5:
hardtail 2:322ad3eef278 566 obj->pwm->MATCHREL6 = (uint32_t)us;
hardtail 2:322ad3eef278 567 break;
hardtail 2:322ad3eef278 568
hardtail 2:322ad3eef278 569 case 6:
hardtail 2:322ad3eef278 570 obj->pwm->MATCHREL7 = (uint32_t)us;
hardtail 2:322ad3eef278 571 break;
hardtail 2:322ad3eef278 572 }
hardtail 0:64b18a3829f1 573 }