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Fork of nRF51822 by Nordic Semiconductor

nordic-sdk/components/drivers_nrf/hal/nrf_gpio.h@361:d2405f5a4853, 2015-07-02 (annotated)

Committer:
rgrover1
Date:
Thu Jul 02 09:08:44 2015 +0100
Revision:
361:d2405f5a4853
Parent:
346:14b090482fd2
Child:
362:6fa0d4d555f6
Synchronized with git rev 9f72c4ba

Author: Rohit Grover

Release 0.3.7

=============



This is a minor set of enhancements mostly around reduce our global static

memory footprint.



Enhancements

~~~~~~~~~~~~



* Reduce the maximum number of CHARACTERISTICS and DESCRIPTORS that can be

  handled. This has memory implications for static global memory. It should

  be possible to re-architect our solution for add_characteristic() to not

  require these limits; hopefully we'll get there soon.



* Move nRF51GattServer::getInstance() into a .cpp file; same for nRF51Gap::getInstance().



* Reduce max bonds to managed by device-manager to 4; this has memory implications for static global memory.



* Reduce pStorage command queue size to 2; this has memory implications for static global memory.



* Replace uses of deprecated Gap::addr_type_t with Gap::AddressType_t.



* Some UUID-related types have moved into UUID class. Minor changes were needed to work around build errors.



Bugfixes

~~~~~~~~



* None.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rgrover1 361:d2405f5a4853 1 #ifndef NRF_GPIO_H__
rgrover1 361:d2405f5a4853 2 #define NRF_GPIO_H__
rgrover1 361:d2405f5a4853 3
rgrover1 361:d2405f5a4853 4 #include "nrf51.h"
rgrover1 361:d2405f5a4853 5 #include "nrf51_bitfields.h"
rgrover1 361:d2405f5a4853 6
rgrover1 361:d2405f5a4853 7 /**
rgrover1 361:d2405f5a4853 8 * @defgroup nrf_gpio GPIO abstraction
rgrover1 361:d2405f5a4853 9 * @{
rgrover1 361:d2405f5a4853 10 * @ingroup nrf_drivers
rgrover1 361:d2405f5a4853 11 * @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports.
rgrover1 361:d2405f5a4853 12 *
rgrover1 361:d2405f5a4853 13 * Here, the GPIO ports are defined as follows:
rgrover1 361:d2405f5a4853 14 * - Port 0 -> pin 0-7
rgrover1 361:d2405f5a4853 15 * - Port 1 -> pin 8-15
rgrover1 361:d2405f5a4853 16 * - Port 2 -> pin 16-23
rgrover1 361:d2405f5a4853 17 * - Port 3 -> pin 24-31
rgrover1 361:d2405f5a4853 18 */
rgrover1 361:d2405f5a4853 19
rgrover1 361:d2405f5a4853 20 /**
rgrover1 361:d2405f5a4853 21 * @enum nrf_gpio_port_dir_t
rgrover1 361:d2405f5a4853 22 * @brief Enumerator used for setting the direction of a GPIO port.
rgrover1 361:d2405f5a4853 23 */
rgrover1 361:d2405f5a4853 24 typedef enum
rgrover1 361:d2405f5a4853 25 {
rgrover1 361:d2405f5a4853 26 NRF_GPIO_PORT_DIR_OUTPUT, ///< Output
rgrover1 361:d2405f5a4853 27 NRF_GPIO_PORT_DIR_INPUT ///< Input
rgrover1 361:d2405f5a4853 28 } nrf_gpio_port_dir_t;
rgrover1 361:d2405f5a4853 29
rgrover1 361:d2405f5a4853 30 /**
rgrover1 361:d2405f5a4853 31 * @enum nrf_gpio_pin_dir_t
rgrover1 361:d2405f5a4853 32 * Pin direction definitions.
rgrover1 361:d2405f5a4853 33 */
rgrover1 361:d2405f5a4853 34 typedef enum
rgrover1 361:d2405f5a4853 35 {
rgrover1 361:d2405f5a4853 36 NRF_GPIO_PIN_DIR_INPUT, ///< Input
rgrover1 361:d2405f5a4853 37 NRF_GPIO_PIN_DIR_OUTPUT ///< Output
rgrover1 361:d2405f5a4853 38 } nrf_gpio_pin_dir_t;
rgrover1 361:d2405f5a4853 39
rgrover1 361:d2405f5a4853 40 /**
rgrover1 361:d2405f5a4853 41 * @enum nrf_gpio_port_select_t
rgrover1 361:d2405f5a4853 42 * @brief Enumerator used for selecting between port 0 - 3.
rgrover1 361:d2405f5a4853 43 */
rgrover1 361:d2405f5a4853 44 typedef enum
rgrover1 361:d2405f5a4853 45 {
rgrover1 361:d2405f5a4853 46 NRF_GPIO_PORT_SELECT_PORT0 = 0, ///< Port 0 (GPIO pin 0-7)
rgrover1 361:d2405f5a4853 47 NRF_GPIO_PORT_SELECT_PORT1, ///< Port 1 (GPIO pin 8-15)
rgrover1 361:d2405f5a4853 48 NRF_GPIO_PORT_SELECT_PORT2, ///< Port 2 (GPIO pin 16-23)
rgrover1 361:d2405f5a4853 49 NRF_GPIO_PORT_SELECT_PORT3, ///< Port 3 (GPIO pin 24-31)
rgrover1 361:d2405f5a4853 50 } nrf_gpio_port_select_t;
rgrover1 361:d2405f5a4853 51
rgrover1 361:d2405f5a4853 52 /**
rgrover1 361:d2405f5a4853 53 * @enum nrf_gpio_pin_pull_t
rgrover1 361:d2405f5a4853 54 * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration
rgrover1 361:d2405f5a4853 55 */
rgrover1 361:d2405f5a4853 56 typedef enum
rgrover1 361:d2405f5a4853 57 {
rgrover1 361:d2405f5a4853 58 NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pullup resistor disabled
rgrover1 361:d2405f5a4853 59 NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pulldown resistor enabled
rgrover1 361:d2405f5a4853 60 NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pullup resistor enabled
rgrover1 361:d2405f5a4853 61 } nrf_gpio_pin_pull_t;
rgrover1 361:d2405f5a4853 62
rgrover1 361:d2405f5a4853 63 /**
rgrover1 361:d2405f5a4853 64 * @enum nrf_gpio_pin_sense_t
rgrover1 361:d2405f5a4853 65 * @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
rgrover1 361:d2405f5a4853 66 */
rgrover1 361:d2405f5a4853 67 typedef enum
rgrover1 361:d2405f5a4853 68 {
rgrover1 361:d2405f5a4853 69 NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled.
rgrover1 361:d2405f5a4853 70 NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level.
rgrover1 361:d2405f5a4853 71 NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level.
rgrover1 361:d2405f5a4853 72 } nrf_gpio_pin_sense_t;
rgrover1 361:d2405f5a4853 73
rgrover1 361:d2405f5a4853 74 /**
rgrover1 361:d2405f5a4853 75 * @brief Function for configuring the GPIO pin range as outputs with normal drive strength.
rgrover1 361:d2405f5a4853 76 * This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 361:d2405f5a4853 77 *
rgrover1 361:d2405f5a4853 78 * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 361:d2405f5a4853 79 *
rgrover1 361:d2405f5a4853 80 * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 361:d2405f5a4853 81 *
rgrover1 361:d2405f5a4853 82 * @note For configuring only one pin as output use @ref nrf_gpio_cfg_output
rgrover1 361:d2405f5a4853 83 * Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
rgrover1 361:d2405f5a4853 84 */
rgrover1 361:d2405f5a4853 85 static __INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end)
rgrover1 361:d2405f5a4853 86 {
rgrover1 361:d2405f5a4853 87 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 361:d2405f5a4853 88 for (; pin_range_start <= pin_range_end; pin_range_start++)
rgrover1 361:d2405f5a4853 89 {
rgrover1 361:d2405f5a4853 90 NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 361:d2405f5a4853 91 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 361:d2405f5a4853 92 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 361:d2405f5a4853 93 | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 361:d2405f5a4853 94 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
rgrover1 361:d2405f5a4853 95 }
rgrover1 361:d2405f5a4853 96 }
rgrover1 361:d2405f5a4853 97
rgrover1 361:d2405f5a4853 98 /**
rgrover1 361:d2405f5a4853 99 * @brief Function for configuring the GPIO pin range as inputs with given initial value set, hiding inner details.
rgrover1 361:d2405f5a4853 100 * This function can be used to configure pin range as simple input.
rgrover1 361:d2405f5a4853 101 *
rgrover1 361:d2405f5a4853 102 * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 361:d2405f5a4853 103 *
rgrover1 361:d2405f5a4853 104 * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 361:d2405f5a4853 105 *
rgrover1 361:d2405f5a4853 106 * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
rgrover1 361:d2405f5a4853 107 *
rgrover1 361:d2405f5a4853 108 * @note For configuring only one pin as input use @ref nrf_gpio_cfg_input
rgrover1 361:d2405f5a4853 109 * Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
rgrover1 361:d2405f5a4853 110 */
rgrover1 361:d2405f5a4853 111 static __INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config)
rgrover1 361:d2405f5a4853 112 {
rgrover1 361:d2405f5a4853 113 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 361:d2405f5a4853 114 for (; pin_range_start <= pin_range_end; pin_range_start++)
rgrover1 361:d2405f5a4853 115 {
rgrover1 361:d2405f5a4853 116 NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 361:d2405f5a4853 117 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 361:d2405f5a4853 118 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 361:d2405f5a4853 119 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 361:d2405f5a4853 120 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 361:d2405f5a4853 121 }
rgrover1 361:d2405f5a4853 122 }
rgrover1 361:d2405f5a4853 123
rgrover1 361:d2405f5a4853 124 /**
rgrover1 361:d2405f5a4853 125 * @brief Function for configuring the given GPIO pin number as output with given initial value set, hiding inner details.
rgrover1 361:d2405f5a4853 126 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 361:d2405f5a4853 127 *
rgrover1 361:d2405f5a4853 128 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
rgrover1 361:d2405f5a4853 129 *
rgrover1 361:d2405f5a4853 130 * @note Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
rgrover1 361:d2405f5a4853 131 */
rgrover1 361:d2405f5a4853 132 static __INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
rgrover1 361:d2405f5a4853 133 {
rgrover1 361:d2405f5a4853 134 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 361:d2405f5a4853 135 NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 361:d2405f5a4853 136 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 361:d2405f5a4853 137 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 361:d2405f5a4853 138 | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 361:d2405f5a4853 139 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
rgrover1 361:d2405f5a4853 140 }
rgrover1 361:d2405f5a4853 141
rgrover1 361:d2405f5a4853 142 /**
rgrover1 361:d2405f5a4853 143 * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
rgrover1 361:d2405f5a4853 144 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 361:d2405f5a4853 145 *
rgrover1 361:d2405f5a4853 146 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
rgrover1 361:d2405f5a4853 147 *
rgrover1 361:d2405f5a4853 148 * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
rgrover1 361:d2405f5a4853 149 *
rgrover1 361:d2405f5a4853 150 * @note Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
rgrover1 361:d2405f5a4853 151 */
rgrover1 361:d2405f5a4853 152 static __INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
rgrover1 361:d2405f5a4853 153 {
rgrover1 361:d2405f5a4853 154 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 361:d2405f5a4853 155 NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 361:d2405f5a4853 156 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 361:d2405f5a4853 157 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 361:d2405f5a4853 158 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 361:d2405f5a4853 159 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 361:d2405f5a4853 160 }
rgrover1 361:d2405f5a4853 161
rgrover1 361:d2405f5a4853 162 /**
rgrover1 361:d2405f5a4853 163 * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
rgrover1 361:d2405f5a4853 164 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 361:d2405f5a4853 165 * Sense capability on the pin is configurable, and input is connected to buffer so that the GPIO->IN register is readable.
rgrover1 361:d2405f5a4853 166 *
rgrover1 361:d2405f5a4853 167 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30).
rgrover1 361:d2405f5a4853 168 *
rgrover1 361:d2405f5a4853 169 * @param pull_config state of the pin pull resistor (no pull, pulled down or pulled high).
rgrover1 361:d2405f5a4853 170 *
rgrover1 361:d2405f5a4853 171 * @param sense_config sense level of the pin (no sense, sense low or sense high).
rgrover1 361:d2405f5a4853 172 */
rgrover1 361:d2405f5a4853 173 static __INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config)
rgrover1 361:d2405f5a4853 174 {
rgrover1 361:d2405f5a4853 175 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 361:d2405f5a4853 176 NRF_GPIO->PIN_CNF[pin_number] = (sense_config << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 361:d2405f5a4853 177 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 361:d2405f5a4853 178 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 361:d2405f5a4853 179 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 361:d2405f5a4853 180 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 361:d2405f5a4853 181 }
rgrover1 361:d2405f5a4853 182
rgrover1 361:d2405f5a4853 183 /**
rgrover1 361:d2405f5a4853 184 * @brief Function for setting the direction for a GPIO pin.
rgrover1 361:d2405f5a4853 185 *
rgrover1 361:d2405f5a4853 186 * @param pin_number specifies the pin number [0:31] for which to
rgrover1 361:d2405f5a4853 187 * set the direction.
rgrover1 361:d2405f5a4853 188 *
rgrover1 361:d2405f5a4853 189 * @param direction specifies the direction
rgrover1 361:d2405f5a4853 190 */
rgrover1 361:d2405f5a4853 191 static __INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction)
rgrover1 361:d2405f5a4853 192 {
rgrover1 361:d2405f5a4853 193 if(direction == NRF_GPIO_PIN_DIR_INPUT)
rgrover1 361:d2405f5a4853 194 {
rgrover1 361:d2405f5a4853 195 NRF_GPIO->PIN_CNF[pin_number] =
rgrover1 361:d2405f5a4853 196 (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 361:d2405f5a4853 197 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 361:d2405f5a4853 198 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 361:d2405f5a4853 199 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 361:d2405f5a4853 200 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 361:d2405f5a4853 201 }
rgrover1 361:d2405f5a4853 202 else
rgrover1 361:d2405f5a4853 203 {
rgrover1 361:d2405f5a4853 204 NRF_GPIO->DIRSET = (1UL << pin_number);
rgrover1 361:d2405f5a4853 205 }
rgrover1 361:d2405f5a4853 206 }
rgrover1 361:d2405f5a4853 207
rgrover1 361:d2405f5a4853 208 /**
rgrover1 361:d2405f5a4853 209 * @brief Function for setting a GPIO pin.
rgrover1 361:d2405f5a4853 210 *
rgrover1 361:d2405f5a4853 211 * Note that the pin must be configured as an output for this
rgrover1 361:d2405f5a4853 212 * function to have any effect.
rgrover1 361:d2405f5a4853 213 *
rgrover1 361:d2405f5a4853 214 * @param pin_number specifies the pin number [0:31] to
rgrover1 361:d2405f5a4853 215 * set.
rgrover1 361:d2405f5a4853 216 */
rgrover1 361:d2405f5a4853 217 static __INLINE void nrf_gpio_pin_set(uint32_t pin_number)
rgrover1 361:d2405f5a4853 218 {
rgrover1 361:d2405f5a4853 219 NRF_GPIO->OUTSET = (1UL << pin_number);
rgrover1 361:d2405f5a4853 220 }
rgrover1 361:d2405f5a4853 221
rgrover1 361:d2405f5a4853 222 /**
rgrover1 361:d2405f5a4853 223 * @brief Function for clearing a GPIO pin.
rgrover1 361:d2405f5a4853 224 *
rgrover1 361:d2405f5a4853 225 * Note that the pin must be configured as an output for this
rgrover1 361:d2405f5a4853 226 * function to have any effect.
rgrover1 361:d2405f5a4853 227 *
rgrover1 361:d2405f5a4853 228 * @param pin_number specifies the pin number [0:31] to
rgrover1 361:d2405f5a4853 229 * clear.
rgrover1 361:d2405f5a4853 230 */
rgrover1 361:d2405f5a4853 231 static __INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
rgrover1 361:d2405f5a4853 232 {
rgrover1 361:d2405f5a4853 233 NRF_GPIO->OUTCLR = (1UL << pin_number);
rgrover1 361:d2405f5a4853 234 }
rgrover1 361:d2405f5a4853 235
rgrover1 361:d2405f5a4853 236 /**
rgrover1 361:d2405f5a4853 237 * @brief Function for toggling a GPIO pin.
rgrover1 361:d2405f5a4853 238 *
rgrover1 361:d2405f5a4853 239 * Note that the pin must be configured as an output for this
rgrover1 361:d2405f5a4853 240 * function to have any effect.
rgrover1 361:d2405f5a4853 241 *
rgrover1 361:d2405f5a4853 242 * @param pin_number specifies the pin number [0:31] to
rgrover1 361:d2405f5a4853 243 * toggle.
rgrover1 361:d2405f5a4853 244 */
rgrover1 361:d2405f5a4853 245 static __INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
rgrover1 361:d2405f5a4853 246 {
rgrover1 361:d2405f5a4853 247 const uint32_t pin_bit = 1UL << pin_number;
rgrover1 361:d2405f5a4853 248 const uint32_t pin_state = ((NRF_GPIO->OUT >> pin_number) & 1UL);
rgrover1 361:d2405f5a4853 249
rgrover1 361:d2405f5a4853 250 if (pin_state == 0)
rgrover1 361:d2405f5a4853 251 {
rgrover1 361:d2405f5a4853 252 // Current state low, set high.
rgrover1 361:d2405f5a4853 253 NRF_GPIO->OUTSET = pin_bit;
rgrover1 361:d2405f5a4853 254 }
rgrover1 361:d2405f5a4853 255 else
rgrover1 361:d2405f5a4853 256 {
rgrover1 361:d2405f5a4853 257 // Current state high, set low.
rgrover1 361:d2405f5a4853 258 NRF_GPIO->OUTCLR = pin_bit;
rgrover1 361:d2405f5a4853 259 }
rgrover1 361:d2405f5a4853 260 }
rgrover1 361:d2405f5a4853 261
rgrover1 361:d2405f5a4853 262 /**
rgrover1 361:d2405f5a4853 263 * @brief Function for writing a value to a GPIO pin.
rgrover1 361:d2405f5a4853 264 *
rgrover1 361:d2405f5a4853 265 * Note that the pin must be configured as an output for this
rgrover1 361:d2405f5a4853 266 * function to have any effect.
rgrover1 361:d2405f5a4853 267 *
rgrover1 361:d2405f5a4853 268 * @param pin_number specifies the pin number [0:31] to
rgrover1 361:d2405f5a4853 269 * write.
rgrover1 361:d2405f5a4853 270 *
rgrover1 361:d2405f5a4853 271 * @param value specifies the value to be written to the pin.
rgrover1 361:d2405f5a4853 272 * @arg 0 clears the pin
rgrover1 361:d2405f5a4853 273 * @arg >=1 sets the pin.
rgrover1 361:d2405f5a4853 274 */
rgrover1 361:d2405f5a4853 275 static __INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
rgrover1 361:d2405f5a4853 276 {
rgrover1 361:d2405f5a4853 277 if (value == 0)
rgrover1 361:d2405f5a4853 278 {
rgrover1 361:d2405f5a4853 279 nrf_gpio_pin_clear(pin_number);
rgrover1 361:d2405f5a4853 280 }
rgrover1 361:d2405f5a4853 281 else
rgrover1 361:d2405f5a4853 282 {
rgrover1 361:d2405f5a4853 283 nrf_gpio_pin_set(pin_number);
rgrover1 361:d2405f5a4853 284 }
rgrover1 361:d2405f5a4853 285 }
rgrover1 361:d2405f5a4853 286
rgrover1 361:d2405f5a4853 287 /**
rgrover1 361:d2405f5a4853 288 * @brief Function for reading the input level of a GPIO pin.
rgrover1 361:d2405f5a4853 289 *
rgrover1 361:d2405f5a4853 290 * Note that the pin must have input connected for the value
rgrover1 361:d2405f5a4853 291 * returned from this function to be valid.
rgrover1 361:d2405f5a4853 292 *
rgrover1 361:d2405f5a4853 293 * @param pin_number specifies the pin number [0:31] to
rgrover1 361:d2405f5a4853 294 * read.
rgrover1 361:d2405f5a4853 295 *
rgrover1 361:d2405f5a4853 296 * @return
rgrover1 361:d2405f5a4853 297 * @retval 0 if the pin input level is low.
rgrover1 361:d2405f5a4853 298 * @retval 1 if the pin input level is high.
rgrover1 361:d2405f5a4853 299 * @retval > 1 should never occur.
rgrover1 361:d2405f5a4853 300 */
rgrover1 361:d2405f5a4853 301 static __INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number)
rgrover1 361:d2405f5a4853 302 {
rgrover1 361:d2405f5a4853 303 return ((NRF_GPIO->IN >> pin_number) & 1UL);
rgrover1 361:d2405f5a4853 304 }
rgrover1 361:d2405f5a4853 305
rgrover1 361:d2405f5a4853 306 /**
rgrover1 361:d2405f5a4853 307 * @brief Generic function for writing a single byte of a 32 bit word at a given
rgrover1 361:d2405f5a4853 308 * address.
rgrover1 361:d2405f5a4853 309 *
rgrover1 361:d2405f5a4853 310 * This function should not be called from outside the nrf_gpio
rgrover1 361:d2405f5a4853 311 * abstraction layer.
rgrover1 361:d2405f5a4853 312 *
rgrover1 361:d2405f5a4853 313 * @param word_address is the address of the word to be written.
rgrover1 361:d2405f5a4853 314 *
rgrover1 361:d2405f5a4853 315 * @param byte_no is the the word byte number (0-3) to be written.
rgrover1 361:d2405f5a4853 316 *
rgrover1 361:d2405f5a4853 317 * @param value is the value to be written to byte "byte_no" of word
rgrover1 361:d2405f5a4853 318 * at address "word_address"
rgrover1 361:d2405f5a4853 319 */
rgrover1 361:d2405f5a4853 320 static __INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value)
rgrover1 361:d2405f5a4853 321 {
rgrover1 361:d2405f5a4853 322 *((volatile uint8_t*)(word_address) + byte_no) = value;
rgrover1 361:d2405f5a4853 323 }
rgrover1 361:d2405f5a4853 324
rgrover1 361:d2405f5a4853 325 /**
rgrover1 361:d2405f5a4853 326 * @brief Generic function for reading a single byte of a 32 bit word at a given
rgrover1 361:d2405f5a4853 327 * address.
rgrover1 361:d2405f5a4853 328 *
rgrover1 361:d2405f5a4853 329 * This function should not be called from outside the nrf_gpio
rgrover1 361:d2405f5a4853 330 * abstraction layer.
rgrover1 361:d2405f5a4853 331 *
rgrover1 361:d2405f5a4853 332 * @param word_address is the address of the word to be read.
rgrover1 361:d2405f5a4853 333 *
rgrover1 361:d2405f5a4853 334 * @param byte_no is the the byte number (0-3) of the word to be read.
rgrover1 361:d2405f5a4853 335 *
rgrover1 361:d2405f5a4853 336 * @return byte "byte_no" of word at address "word_address".
rgrover1 361:d2405f5a4853 337 */
rgrover1 361:d2405f5a4853 338 static __INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no)
rgrover1 361:d2405f5a4853 339 {
rgrover1 361:d2405f5a4853 340 return (*((const volatile uint8_t*)(word_address) + byte_no));
rgrover1 361:d2405f5a4853 341 }
rgrover1 361:d2405f5a4853 342
rgrover1 361:d2405f5a4853 343 /**
rgrover1 361:d2405f5a4853 344 * @brief Function for setting the direction of a port.
rgrover1 361:d2405f5a4853 345 *
rgrover1 361:d2405f5a4853 346 * @param port is the port for which to set the direction.
rgrover1 361:d2405f5a4853 347 *
rgrover1 361:d2405f5a4853 348 * @param dir direction to be set for this port.
rgrover1 361:d2405f5a4853 349 */
rgrover1 361:d2405f5a4853 350 static __INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir)
rgrover1 361:d2405f5a4853 351 {
rgrover1 361:d2405f5a4853 352 if (dir == NRF_GPIO_PORT_DIR_OUTPUT)
rgrover1 361:d2405f5a4853 353 {
rgrover1 361:d2405f5a4853 354 nrf_gpio_word_byte_write(&NRF_GPIO->DIRSET, port, 0xFF);
rgrover1 361:d2405f5a4853 355 }
rgrover1 361:d2405f5a4853 356 else
rgrover1 361:d2405f5a4853 357 {
rgrover1 361:d2405f5a4853 358 nrf_gpio_range_cfg_input(port*8, (port+1)*8-1, NRF_GPIO_PIN_NOPULL);
rgrover1 361:d2405f5a4853 359 }
rgrover1 361:d2405f5a4853 360 }
rgrover1 361:d2405f5a4853 361
rgrover1 361:d2405f5a4853 362 /**
rgrover1 361:d2405f5a4853 363 * @brief Function for reading a GPIO port.
rgrover1 361:d2405f5a4853 364 *
rgrover1 361:d2405f5a4853 365 * @param port is the port to read.
rgrover1 361:d2405f5a4853 366 *
rgrover1 361:d2405f5a4853 367 * @return the input value on this port.
rgrover1 361:d2405f5a4853 368 */
rgrover1 361:d2405f5a4853 369 static __INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port)
rgrover1 361:d2405f5a4853 370 {
rgrover1 361:d2405f5a4853 371 return nrf_gpio_word_byte_read(&NRF_GPIO->IN, port);
rgrover1 361:d2405f5a4853 372 }
rgrover1 361:d2405f5a4853 373
rgrover1 361:d2405f5a4853 374 /**
rgrover1 361:d2405f5a4853 375 * @brief Function for writing to a GPIO port.
rgrover1 361:d2405f5a4853 376 *
rgrover1 361:d2405f5a4853 377 * @param port is the port to write.
rgrover1 361:d2405f5a4853 378 *
rgrover1 361:d2405f5a4853 379 * @param value is the value to write to this port.
rgrover1 361:d2405f5a4853 380 *
rgrover1 361:d2405f5a4853 381 * @sa nrf_gpio_port_dir_set()
rgrover1 361:d2405f5a4853 382 */
rgrover1 361:d2405f5a4853 383 static __INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value)
rgrover1 361:d2405f5a4853 384 {
rgrover1 361:d2405f5a4853 385 nrf_gpio_word_byte_write(&NRF_GPIO->OUT, port, value);
rgrover1 361:d2405f5a4853 386 }
rgrover1 361:d2405f5a4853 387
rgrover1 361:d2405f5a4853 388 /**
rgrover1 361:d2405f5a4853 389 * @brief Function for setting individual pins on GPIO port.
rgrover1 361:d2405f5a4853 390 *
rgrover1 361:d2405f5a4853 391 * @param port is the port for which to set the pins.
rgrover1 361:d2405f5a4853 392 *
rgrover1 361:d2405f5a4853 393 * @param set_mask is a mask specifying which pins to set. A bit
rgrover1 361:d2405f5a4853 394 * set to 1 indicates that the corresponding port pin shall be
rgrover1 361:d2405f5a4853 395 * set.
rgrover1 361:d2405f5a4853 396 *
rgrover1 361:d2405f5a4853 397 * @sa nrf_gpio_port_dir_set()
rgrover1 361:d2405f5a4853 398 */
rgrover1 361:d2405f5a4853 399 static __INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask)
rgrover1 361:d2405f5a4853 400 {
rgrover1 361:d2405f5a4853 401 nrf_gpio_word_byte_write(&NRF_GPIO->OUTSET, port, set_mask);
rgrover1 361:d2405f5a4853 402 }
rgrover1 361:d2405f5a4853 403
rgrover1 361:d2405f5a4853 404 /**
rgrover1 361:d2405f5a4853 405 * @brief Function for clearing individual pins on GPIO port.
rgrover1 361:d2405f5a4853 406 *
rgrover1 361:d2405f5a4853 407 * @param port is the port for which to clear the pins.
rgrover1 361:d2405f5a4853 408 *
rgrover1 361:d2405f5a4853 409 * @param clr_mask is a mask specifying which pins to clear. A bit
rgrover1 361:d2405f5a4853 410 * set to 1 indicates that the corresponding port pin shall be
rgrover1 361:d2405f5a4853 411 * cleared.
rgrover1 361:d2405f5a4853 412 *
rgrover1 361:d2405f5a4853 413 * @sa nrf_gpio_port_dir_set()
rgrover1 361:d2405f5a4853 414 */
rgrover1 361:d2405f5a4853 415 static __INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask)
rgrover1 361:d2405f5a4853 416 {
rgrover1 361:d2405f5a4853 417 nrf_gpio_word_byte_write(&NRF_GPIO->OUTCLR, port, clr_mask);
rgrover1 361:d2405f5a4853 418 }
rgrover1 361:d2405f5a4853 419
rgrover1 361:d2405f5a4853 420 /** @} */
rgrover1 361:d2405f5a4853 421
rgrover1 361:d2405f5a4853 422 #endif